subject:"\[PATCH v2 2\/4\] drm\/mediatek\: Add support for mediatek SOC MT2712"

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

2018-05-24 Thread Stu Hsieh

Hi CK,

On Thu, 2018-05-24 at 09:26 +0800, CK Hu wrote:
> Hi, Stu:
> 
> On Wed, 2018-05-23 at 17:28 +0800, Stu Hsieh wrote:
> > On Wed, 2018-05-23 at 13:23 +0800, CK Hu wrote:
> > > Hi, Stu:
> > > 
> > > I've some inline comment.
> > > 
> > > On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> > > > This patch add support for the Mediatek MT2712 DISP subsystem.
> > > > There are two OVL engine and three disp output in MT2712.
> > > > 
> > > > Signed-off-by: Stu Hsieh 
> > > > ---
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 50 
> > > > +++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  8 +++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  7 ++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 47 
> > > > +--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  7 ++--
> > > >  5 files changed, 108 insertions(+), 11 deletions(-)
> > > > 
> > > > +#define MT2712_MUTEX_MOD_DISP_AAL0 BIT(20)
> > > > +#define MT2712_MUTEX_MOD_DISP_UFOE BIT(22)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM0 BIT(23)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM1 BIT(24)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM2 BIT(10)
> > > > +#define MT2712_MUTEX_MOD_DISP_OD0  BIT(25)
> > > > +/* modules more than 32, add BIT(31) when using DISP_REG_MUTEX_MOD2 
> > > > bit */
> > > > +#define MT2712_MUTEX_MOD2_DISP_AAL1(BIT(1) | BIT(31))
> > > 
> > > I think a better definition is
> > > 
> > > #define MT2712_MUTEX_MOD2_DISP_AAL1   BIT(33)
> > > 
> > > when you need to access this register,
> > > 
> > > if (ddp->mutex_mod[id] < BIT(32)) {
> > >   offset = DISP_REG_MUTEX_MOD(mutex->id);
> > >   reg = readl_relaxed(ddp->regs + offset);
> > >   reg |= ddp->mutex_mod[id];
> > >   writel_relaxed(reg, ddp->regs + offset);
> > > } else {
> > >   offset = DISP_REG_MUTEX_MOD2(mutex->id);
> > >   reg = readl_relaxed(ddp->regs + offset);
> > >   reg |= (ddp->mutex_mod[id] >> 32);
> > >   writel_relaxed(reg, ddp->regs + offset);
> > > }
> > > 
> > > because DISP_REG_MUTEX_MOD BIT(31) could be used for some module.
> > 
> > This modification is workable, but result some build warning like
> > following:
> > 1. #define BIT(nr)   (1UL << (nr)) in include/linux/bitops.h
> > 2. [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
> >=> we need to modify the definition about "static const unsigned int
> > mt2712_mutex_mod"
> > 
> 
> Currently, mutex_mod is a bitwise definition. I think it could be
> changed to index definition such as
> 
> 
> #define MT2712_MUTEX_MOD_DISP_PWM210
> #define MT2712_MUTEX_MOD_DISP_OD0 25
> #define MT2712_MUTEX_MOD2_DISP_AAL1   33
> 
> when you need to access this register,
> 
> if (ddp->mutex_mod[id] < 32) {
>   offset = DISP_REG_MUTEX_MOD(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= 1 << ddp->mutex_mod[id];
>   writel_relaxed(reg, ddp->regs + offset);
> } else {
>   offset = DISP_REG_MUTEX_MOD2(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= 1 << (ddp->mutex_mod[id] - 32);
>   writel_relaxed(reg, ddp->regs + offset);
> }
> 
> Regards,
> CK

This modification has no build warning.
I would also change the definition about 2701 and 8173 from bitwise to
index.

Regards,
Stu

> 
> > > > +#define MT2712_MUTEX_MOD2_DISP_OD1 (BIT(2) | BIT(31))
> > > > +
> > > >  #define MT2701_MUTEX_MOD_DISP_OVL  BIT(3)
> > > >  #define MT2701_MUTEX_MOD_DISP_WDMA BIT(6)
> > > >  #define MT2701_MUTEX_MOD_DISP_COLORBIT(7)
> > > > @@ -74,6 +96,7 @@
> > > >  
> > > >  
> > > 
> > > 
> > 
> > 
> 
> 


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Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

2018-05-24 Thread Stu Hsieh

Hi CK,

On Thu, 2018-05-24 at 09:26 +0800, CK Hu wrote:
> Hi, Stu:
> 
> On Wed, 2018-05-23 at 17:28 +0800, Stu Hsieh wrote:
> > On Wed, 2018-05-23 at 13:23 +0800, CK Hu wrote:
> > > Hi, Stu:
> > > 
> > > I've some inline comment.
> > > 
> > > On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> > > > This patch add support for the Mediatek MT2712 DISP subsystem.
> > > > There are two OVL engine and three disp output in MT2712.
> > > > 
> > > > Signed-off-by: Stu Hsieh 
> > > > ---
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 50 
> > > > +++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  8 +++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  7 ++--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 47 
> > > > +--
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  7 ++--
> > > >  5 files changed, 108 insertions(+), 11 deletions(-)
> > > > 
> > > > +#define MT2712_MUTEX_MOD_DISP_AAL0 BIT(20)
> > > > +#define MT2712_MUTEX_MOD_DISP_UFOE BIT(22)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM0 BIT(23)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM1 BIT(24)
> > > > +#define MT2712_MUTEX_MOD_DISP_PWM2 BIT(10)
> > > > +#define MT2712_MUTEX_MOD_DISP_OD0  BIT(25)
> > > > +/* modules more than 32, add BIT(31) when using DISP_REG_MUTEX_MOD2 
> > > > bit */
> > > > +#define MT2712_MUTEX_MOD2_DISP_AAL1(BIT(1) | BIT(31))
> > > 
> > > I think a better definition is
> > > 
> > > #define MT2712_MUTEX_MOD2_DISP_AAL1   BIT(33)
> > > 
> > > when you need to access this register,
> > > 
> > > if (ddp->mutex_mod[id] < BIT(32)) {
> > >   offset = DISP_REG_MUTEX_MOD(mutex->id);
> > >   reg = readl_relaxed(ddp->regs + offset);
> > >   reg |= ddp->mutex_mod[id];
> > >   writel_relaxed(reg, ddp->regs + offset);
> > > } else {
> > >   offset = DISP_REG_MUTEX_MOD2(mutex->id);
> > >   reg = readl_relaxed(ddp->regs + offset);
> > >   reg |= (ddp->mutex_mod[id] >> 32);
> > >   writel_relaxed(reg, ddp->regs + offset);
> > > }
> > > 
> > > because DISP_REG_MUTEX_MOD BIT(31) could be used for some module.
> > 
> > This modification is workable, but result some build warning like
> > following:
> > 1. #define BIT(nr)   (1UL << (nr)) in include/linux/bitops.h
> > 2. [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
> >=> we need to modify the definition about "static const unsigned int
> > mt2712_mutex_mod"
> > 
> 
> Currently, mutex_mod is a bitwise definition. I think it could be
> changed to index definition such as
> 
> 
> #define MT2712_MUTEX_MOD_DISP_PWM210
> #define MT2712_MUTEX_MOD_DISP_OD0 25
> #define MT2712_MUTEX_MOD2_DISP_AAL1   33
> 
> when you need to access this register,
> 
> if (ddp->mutex_mod[id] < 32) {
>   offset = DISP_REG_MUTEX_MOD(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= 1 << ddp->mutex_mod[id];
>   writel_relaxed(reg, ddp->regs + offset);
> } else {
>   offset = DISP_REG_MUTEX_MOD2(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= 1 << (ddp->mutex_mod[id] - 32);
>   writel_relaxed(reg, ddp->regs + offset);
> }
> 
> Regards,
> CK
ok, these modification has no build warning.
I would also change the definition about 2701 and 8173 from bitwise to
index.

> 
> > > > +#define MT2712_MUTEX_MOD2_DISP_OD1 (BIT(2) | BIT(31))
> > > > +
> > > >  #define MT2701_MUTEX_MOD_DISP_OVL  BIT(3)
> > > >  #define MT2701_MUTEX_MOD_DISP_WDMA BIT(6)
> > > >  #define MT2701_MUTEX_MOD_DISP_COLORBIT(7)
> > > > @@ -74,6 +96,7 @@
> > > >  
> > > >  
> > > 
> > > 
> > 
> > 
> 
> 


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Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

2018-05-23 Thread CK Hu

Hi, Stu:

On Wed, 2018-05-23 at 17:28 +0800, Stu Hsieh wrote:
> On Wed, 2018-05-23 at 13:23 +0800, CK Hu wrote:
> > Hi, Stu:
> > 
> > I've some inline comment.
> > 
> > On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> > > This patch add support for the Mediatek MT2712 DISP subsystem.
> > > There are two OVL engine and three disp output in MT2712.
> > > 
> > > Signed-off-by: Stu Hsieh 
> > > ---
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 50 
> > > +++--
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  8 +++--
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  7 ++--
> > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 47 
> > > +--
> > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  7 ++--
> > >  5 files changed, 108 insertions(+), 11 deletions(-)
> > > 
> > > +#define MT2712_MUTEX_MOD_DISP_AAL0   BIT(20)
> > > +#define MT2712_MUTEX_MOD_DISP_UFOE   BIT(22)
> > > +#define MT2712_MUTEX_MOD_DISP_PWM0   BIT(23)
> > > +#define MT2712_MUTEX_MOD_DISP_PWM1   BIT(24)
> > > +#define MT2712_MUTEX_MOD_DISP_PWM2   BIT(10)
> > > +#define MT2712_MUTEX_MOD_DISP_OD0BIT(25)
> > > +/* modules more than 32, add BIT(31) when using DISP_REG_MUTEX_MOD2 bit 
> > > */
> > > +#define MT2712_MUTEX_MOD2_DISP_AAL1  (BIT(1) | BIT(31))
> > 
> > I think a better definition is
> > 
> > #define MT2712_MUTEX_MOD2_DISP_AAL1 BIT(33)
> > 
> > when you need to access this register,
> > 
> > if (ddp->mutex_mod[id] < BIT(32)) {
> > offset = DISP_REG_MUTEX_MOD(mutex->id);
> > reg = readl_relaxed(ddp->regs + offset);
> > reg |= ddp->mutex_mod[id];
> > writel_relaxed(reg, ddp->regs + offset);
> > } else {
> > offset = DISP_REG_MUTEX_MOD2(mutex->id);
> > reg = readl_relaxed(ddp->regs + offset);
> > reg |= (ddp->mutex_mod[id] >> 32);
> > writel_relaxed(reg, ddp->regs + offset);
> > }
> > 
> > because DISP_REG_MUTEX_MOD BIT(31) could be used for some module.
> 
> This modification is workable, but result some build warning like
> following:
> 1. #define BIT(nr)   (1UL << (nr)) in include/linux/bitops.h
> 2. [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
>=> we need to modify the definition about "static const unsigned int
> mt2712_mutex_mod"
> 

Currently, mutex_mod is a bitwise definition. I think it could be
changed to index definition such as


#define MT2712_MUTEX_MOD_DISP_PWM2  10
#define MT2712_MUTEX_MOD_DISP_OD0   25
#define MT2712_MUTEX_MOD2_DISP_AAL1 33

when you need to access this register,

if (ddp->mutex_mod[id] < 32) {
offset = DISP_REG_MUTEX_MOD(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
reg |= 1 << ddp->mutex_mod[id];
writel_relaxed(reg, ddp->regs + offset);
} else {
offset = DISP_REG_MUTEX_MOD2(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
reg |= 1 << (ddp->mutex_mod[id] - 32);
writel_relaxed(reg, ddp->regs + offset);
}

Regards,
CK

> > > +#define MT2712_MUTEX_MOD2_DISP_OD1   (BIT(2) | BIT(31))
> > > +
> > >  #define MT2701_MUTEX_MOD_DISP_OVLBIT(3)
> > >  #define MT2701_MUTEX_MOD_DISP_WDMA   BIT(6)
> > >  #define MT2701_MUTEX_MOD_DISP_COLOR  BIT(7)
> > > @@ -74,6 +96,7 @@
> > >  
> > >  
> > 
> > 
> 
> 


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Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

2018-05-23 Thread Stu Hsieh

On Wed, 2018-05-23 at 13:23 +0800, CK Hu wrote:
> Hi, Stu:
> 
> I've some inline comment.
> 
> On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> > This patch add support for the Mediatek MT2712 DISP subsystem.
> > There are two OVL engine and three disp output in MT2712.
> > 
> > Signed-off-by: Stu Hsieh 
> > ---
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 50 
> > +++--
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  8 +++--
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  7 ++--
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 47 
> > +--
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  7 ++--
> >  5 files changed, 108 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> > b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > index 8130f3dab661..e563dedd1999 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > @@ -29,6 +29,8 @@
> >  #define DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x084
> >  #define DISP_REG_CONFIG_DISP_COLOR1_SEL_IN 0x088
> >  #define DISP_REG_CONFIG_DPI_SEL_IN 0x0ac
> > +#define DISP_REG_CONFIG_DISP_RDMA2_SOUT0x0b8
> > +#define DISP_REG_CONFIG_DISP_RDMA0_MOUT_EN 0x0c4
> 
> These two definition are useless, so remove it.
ok


> 
> >  #define DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN 0x0c8
> >  #define DISP_REG_CONFIG_MMSYS_CG_CON0  0x100
> >  
> > @@ -41,6 +43,7 @@
> >  #define DISP_REG_MUTEX_RST(n)  (0x28 + 0x20 * (n))
> >  #define DISP_REG_MUTEX_MOD(n)  (0x2c + 0x20 * (n))
> >  #define DISP_REG_MUTEX_SOF(n)  (0x30 + 0x20 * (n))
> > +#define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
> 
> Move this to the patch 'drm/mediatek: support maximum 64 mutex mod' and
> that patch should be applied before this patch.
> 
> >  
> >  #define INT_MUTEX  BIT(1)
> >  
> > @@ -60,6 +63,25 @@
> >  #define MT8173_MUTEX_MOD_DISP_PWM1 BIT(24)
> >  #define MT8173_MUTEX_MOD_DISP_OD   BIT(25)
> >  
> > +#define MT2712_MUTEX_MOD_DISP_OVL0 BIT(11)
> > +#define MT2712_MUTEX_MOD_DISP_OVL1 BIT(12)
> > +#define MT2712_MUTEX_MOD_DISP_RDMA0BIT(13)
> > +#define MT2712_MUTEX_MOD_DISP_RDMA1BIT(14)
> > +#define MT2712_MUTEX_MOD_DISP_RDMA2BIT(15)
> > +#define MT2712_MUTEX_MOD_DISP_WDMA0BIT(16)
> > +#define MT2712_MUTEX_MOD_DISP_WDMA1BIT(17)
> > +#define MT2712_MUTEX_MOD_DISP_COLOR0   BIT(18)
> > +#define MT2712_MUTEX_MOD_DISP_COLOR1   BIT(19)
> > +#define MT2712_MUTEX_MOD_DISP_AAL0 BIT(20)
> > +#define MT2712_MUTEX_MOD_DISP_UFOE BIT(22)
> > +#define MT2712_MUTEX_MOD_DISP_PWM0 BIT(23)
> > +#define MT2712_MUTEX_MOD_DISP_PWM1 BIT(24)
> > +#define MT2712_MUTEX_MOD_DISP_PWM2 BIT(10)
> > +#define MT2712_MUTEX_MOD_DISP_OD0  BIT(25)
> > +/* modules more than 32, add BIT(31) when using DISP_REG_MUTEX_MOD2 bit */
> > +#define MT2712_MUTEX_MOD2_DISP_AAL1(BIT(1) | BIT(31))
> 
> I think a better definition is
> 
> #define MT2712_MUTEX_MOD2_DISP_AAL1   BIT(33)
> 
> when you need to access this register,
> 
> if (ddp->mutex_mod[id] < BIT(32)) {
>   offset = DISP_REG_MUTEX_MOD(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= ddp->mutex_mod[id];
>   writel_relaxed(reg, ddp->regs + offset);
> } else {
>   offset = DISP_REG_MUTEX_MOD2(mutex->id);
>   reg = readl_relaxed(ddp->regs + offset);
>   reg |= (ddp->mutex_mod[id] >> 32);
>   writel_relaxed(reg, ddp->regs + offset);
> }
> 
> because DISP_REG_MUTEX_MOD BIT(31) could be used for some module.

This modification is workable, but result some build warning like
following:
1. #define BIT(nr)   (1UL << (nr)) in include/linux/bitops.h
2. [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
   => we need to modify the definition about "static const unsigned int
mt2712_mutex_mod"

> > +#define MT2712_MUTEX_MOD2_DISP_OD1 (BIT(2) | BIT(31))
> > +
> >  #define MT2701_MUTEX_MOD_DISP_OVL  BIT(3)
> >  #define MT2701_MUTEX_MOD_DISP_WDMA BIT(6)
> >  #define MT2701_MUTEX_MOD_DISP_COLORBIT(7)
> > @@ -74,6 +96,7 @@
> >  
> >  #define OVL0_MOUT_EN_COLOR00x1
> >  #define OD_MOUT_EN_RDMA0   0x1
> > +#define OD1_MOUT_EN_RDMA1  BIT(16)
> >  #define UFOE_MOUT_EN_DSI0  0x1
> >  #define COLOR0_SEL_IN_OVL0 0x1
> >  #define OVL1_MOUT_EN_COLOR10x1
> > @@ -108,12 +131,32 @@ static const unsigned int 
> > mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> > [DDP_COMPONENT_WDMA0] = MT2701_MUTEX_MOD_DISP_WDMA,
> >  };
> >  
> > +static const unsigned int mt2712_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> > +   [DDP_COMPONENT_AAL0] = MT2712_MUTEX_MOD_DISP_AAL0,
> > +   [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
> > +

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

2018-05-22 Thread CK Hu

Hi, Stu:

I've some inline comment.

On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> This patch add support for the Mediatek MT2712 DISP subsystem.
> There are two OVL engine and three disp output in MT2712.
> 
> Signed-off-by: Stu Hsieh 
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 50 
> +++--
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  8 +++--
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  7 ++--
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c  | 47 +--
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |  7 ++--
>  5 files changed, 108 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 8130f3dab661..e563dedd1999 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -29,6 +29,8 @@
>  #define DISP_REG_CONFIG_DISP_COLOR0_SEL_IN   0x084
>  #define DISP_REG_CONFIG_DISP_COLOR1_SEL_IN   0x088
>  #define DISP_REG_CONFIG_DPI_SEL_IN   0x0ac
> +#define DISP_REG_CONFIG_DISP_RDMA2_SOUT  0x0b8
> +#define DISP_REG_CONFIG_DISP_RDMA0_MOUT_EN   0x0c4

These two definition are useless, so remove it.

>  #define DISP_REG_CONFIG_DISP_RDMA1_MOUT_EN   0x0c8
>  #define DISP_REG_CONFIG_MMSYS_CG_CON00x100
>  
> @@ -41,6 +43,7 @@
>  #define DISP_REG_MUTEX_RST(n)(0x28 + 0x20 * (n))
>  #define DISP_REG_MUTEX_MOD(n)(0x2c + 0x20 * (n))
>  #define DISP_REG_MUTEX_SOF(n)(0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_MOD2(n)   (0x34 + 0x20 * (n))

Move this to the patch 'drm/mediatek: support maximum 64 mutex mod' and
that patch should be applied before this patch.

>  
>  #define INT_MUTEXBIT(1)
>  
> @@ -60,6 +63,25 @@
>  #define MT8173_MUTEX_MOD_DISP_PWM1   BIT(24)
>  #define MT8173_MUTEX_MOD_DISP_OD BIT(25)
>  
> +#define MT2712_MUTEX_MOD_DISP_OVL0   BIT(11)
> +#define MT2712_MUTEX_MOD_DISP_OVL1   BIT(12)
> +#define MT2712_MUTEX_MOD_DISP_RDMA0  BIT(13)
> +#define MT2712_MUTEX_MOD_DISP_RDMA1  BIT(14)
> +#define MT2712_MUTEX_MOD_DISP_RDMA2  BIT(15)
> +#define MT2712_MUTEX_MOD_DISP_WDMA0  BIT(16)
> +#define MT2712_MUTEX_MOD_DISP_WDMA1  BIT(17)
> +#define MT2712_MUTEX_MOD_DISP_COLOR0 BIT(18)
> +#define MT2712_MUTEX_MOD_DISP_COLOR1 BIT(19)
> +#define MT2712_MUTEX_MOD_DISP_AAL0   BIT(20)
> +#define MT2712_MUTEX_MOD_DISP_UFOE   BIT(22)
> +#define MT2712_MUTEX_MOD_DISP_PWM0   BIT(23)
> +#define MT2712_MUTEX_MOD_DISP_PWM1   BIT(24)
> +#define MT2712_MUTEX_MOD_DISP_PWM2   BIT(10)
> +#define MT2712_MUTEX_MOD_DISP_OD0BIT(25)
> +/* modules more than 32, add BIT(31) when using DISP_REG_MUTEX_MOD2 bit */
> +#define MT2712_MUTEX_MOD2_DISP_AAL1  (BIT(1) | BIT(31))

I think a better definition is

#define MT2712_MUTEX_MOD2_DISP_AAL1 BIT(33)

when you need to access this register,

if (ddp->mutex_mod[id] < BIT(32)) {
offset = DISP_REG_MUTEX_MOD(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
reg |= ddp->mutex_mod[id];
writel_relaxed(reg, ddp->regs + offset);
} else {
offset = DISP_REG_MUTEX_MOD2(mutex->id);
reg = readl_relaxed(ddp->regs + offset);
reg |= (ddp->mutex_mod[id] >> 32);
writel_relaxed(reg, ddp->regs + offset);
}

because DISP_REG_MUTEX_MOD BIT(31) could be used for some module.

> +#define MT2712_MUTEX_MOD2_DISP_OD1   (BIT(2) | BIT(31))
> +
>  #define MT2701_MUTEX_MOD_DISP_OVLBIT(3)
>  #define MT2701_MUTEX_MOD_DISP_WDMA   BIT(6)
>  #define MT2701_MUTEX_MOD_DISP_COLOR  BIT(7)
> @@ -74,6 +96,7 @@
>  
>  #define OVL0_MOUT_EN_COLOR0  0x1
>  #define OD_MOUT_EN_RDMA0 0x1
> +#define OD1_MOUT_EN_RDMA1BIT(16)
>  #define UFOE_MOUT_EN_DSI00x1
>  #define COLOR0_SEL_IN_OVL0   0x1
>  #define OVL1_MOUT_EN_COLOR1  0x1
> @@ -108,12 +131,32 @@ static const unsigned int 
> mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   [DDP_COMPONENT_WDMA0] = MT2701_MUTEX_MOD_DISP_WDMA,
>  };
>  
> +static const unsigned int mt2712_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> + [DDP_COMPONENT_AAL0] = MT2712_MUTEX_MOD_DISP_AAL0,
> + [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
> + [DDP_COMPONENT_COLOR0] = MT2712_MUTEX_MOD_DISP_COLOR0,
> + [DDP_COMPONENT_COLOR1] = MT2712_MUTEX_MOD_DISP_COLOR1,
> + [DDP_COMPONENT_OD0] = MT2712_MUTEX_MOD_DISP_OD0,
> + [DDP_COMPONENT_OD1] = MT2712_MUTEX_MOD2_DISP_OD1,
> + [DDP_COMPONENT_OVL0] = MT2712_MUTEX_MOD_DISP_OVL0,
> + [DDP_COMPONENT_OVL1] = MT2712_MUTEX_MOD_DISP_OVL1,
> + [DDP_COMPONENT_PWM0] = MT2712_MUTEX_MOD_DISP_PWM0,
> + [DDP_COMPONENT_PWM1] = MT2712_MUTEX_MOD_DISP_PWM1,
> + [DDP_COMPONENT_PWM2] = MT2712_MUTEX_MOD_DISP_PWM2,
> +

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

Re: [PATCH v2 2/4] drm/mediatek: Add support for mediatek SOC MT2712

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