On Wed, Sep 11, 2019 at 08:01:40AM -0600, Mathieu Poirier wrote:
> On Tue, 10 Sep 2019 at 08:36, Greg KH wrote:
> >
> > On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
> > > From: Roger Quadros
> > >
> > > commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
> > >
> > > Some
On Tue, 10 Sep 2019 at 08:36, Greg KH wrote:
>
> On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
> > From: Roger Quadros
> >
> > commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
> >
> > Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
> > with the
On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
> From: Roger Quadros
>
> commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
>
> Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
> with the metastability workaround as it supports only
> a High-Speed PHY and
From: Roger Quadros
commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
with the metastability workaround as it supports only
a High-Speed PHY and the PHY can enter into an Erratic state [1]
when the controller is set in