Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On Tue, Feb 16, 2021 at 7:21 AM wrote: > > On 2021-02-12 23:19, Rob Clark wrote: > > On Thu, Feb 11, 2021 at 7:31 AM wrote: > >> > >> On 2021-02-11 01:56, Rob Clark wrote: > >> > On Wed, Feb 10, 2021 at 3:41 AM wrote: > >> >> > >> >> On 2021-02-01 00:46, Rob Clark wrote: > >> >> > On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota > >> >> > wrote: > >> >> >> > >> >> >> Set the flag vblank_disable_immediate = true to turn off vblank irqs > >> >> >> immediately as soon as drm_vblank_put is requested so that there are > >> >> >> no irqs triggered during idle state. This will reduce cpu wakeups > >> >> >> and help in power saving. > >> >> >> > >> >> >> To enable vblank_disable_immediate flag the underlying KMS driver > >> >> >> needs to support high precision vblank timestamping and also a > >> >> >> reliable way of providing vblank counter which is incrementing > >> >> >> at the leading edge of vblank. > >> >> >> > >> >> >> This patch also brings in changes to support vblank_disable_immediate > >> >> >> requirement in dpu driver. > >> >> >> > >> >> >> Changes in v1: > >> >> >> - Specify reason to add vblank timestamp support. (Rob) > >> >> >> - Add changes to provide vblank counter from dpu driver. > >> >> >> > >> >> >> Signed-off-by: Kalyan Thota > >> >> > > >> >> > This seems to be triggering: > >> >> > > >> >> > [ +0.032668] [ cut here ] > >> >> > [ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank != > >> >> > vblank->last) > >> >> > [ +0.24] WARNING: CPU: 0 PID: 362 at > >> >> > drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258 > >> >> > [ +0.017154] Modules linked in: joydev > >> >> > [ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted > >> >> > 5.11.0-rc5-00037-g33d3504871dd #2 > >> >> > [ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT) > >> >> > [ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--) > >> >> > [ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258 > >> >> > [ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258 > >> >> > [ +0.005106] sp : ffc010003b70 > >> >> > [ +0.003409] x29: ffc010003b70 x28: ff80855d9d98 > >> >> > [ +0.005466] x27: x26: 00fe502a > >> >> > [ +0.005458] x25: 0001 x24: 0001 > >> >> > [ +0.005466] x23: 0001 x22: ff808561ce80 > >> >> > [ +0.005465] x21: x20: > >> >> > [ +0.005468] x19: ff80850d6800 x18: > >> >> > [ +0.005466] x17: x16: > >> >> > [ +0.005465] x15: 000a x14: 263b > >> >> > [ +0.005466] x13: 0006 x12: > >> >> > [ +0.005465] x11: 0010 x10: ffc090003797 > >> >> > [ +0.005466] x9 : ffed200e2a8c x8 : > >> >> > [ +0.005466] x7 : x6 : ffed213b2b51 > >> >> > [ +0.005465] x5 : c000dfff x4 : ffed21218048 > >> >> > [ +0.005465] x3 : x2 : > >> >> > [ +0.005465] x1 : x0 : > >> >> > [ +0.005466] Call trace: > >> >> > [ +0.002520] drm_update_vblank_count+0x1e4/0x258 > >> >> > [ +0.004748] drm_handle_vblank+0xd0/0x35c > >> >> > [ +0.004130] drm_crtc_handle_vblank+0x24/0x30 > >> >> > [ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4 > >> >> > [ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4 > >> >> > [ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c > >> >> > [ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc > >> >> > [ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120 > >> >> > [ +0.004834] dpu_core_irq+0x44/0x5c > >> >> > [ +0.003597] dpu_irq+0x1c/0x28 > >> >> > [ +0.003141] msm_irq+0x34/0x40 > >> >> > [ +0.003153] __handle_irq_event_percpu+0xfc/0x254 > >> >> > [ +0.004838] handle_irq_event_percpu+0x3c/0x94 > >> >> > [ +0.004574] handle_irq_event+0x54/0x98 > >> >> > [ +0.003944] handle_level_irq+0xa0/0xd0 > >> >> > [ +0.003943] generic_handle_irq+0x30/0x48 > >> >> > [ +0.004131] dpu_mdss_irq+0xe4/0x118 > >> >> > [ +0.003684] generic_handle_irq+0x30/0x48 > >> >> > [ +0.004127] __handle_domain_irq+0xa8/0xac > >> >> > [ +0.004215] gic_handle_irq+0xdc/0x150 > >> >> > [ +0.003856] el1_irq+0xb4/0x180 > >> >> > [ +0.003237] dpu_encoder_vsync_time+0x78/0x230 > >> >> > [ +0.004574] dpu_encoder_kickoff+0x190/0x354 > >> >> > [ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0 > >> >> > [ +0.004748] dpu_kms_flush_commit+0xf4/0x108 > >> >> > [ +0.004390] msm_atomic_commit_tail+0x2e8/0x384 > >> >> > [ +0.004661] commit_tail+0x80/0x108 > >> >> > [ +0.003588] drm_atomic_helper_commit+0x118/0x11c > >> >> > [ +0.004834] drm_atomic_commit+0x58/0x68 > >> >> > [ +0.004033] drm_atomic_helper_set_config+0x70/0x9c > >> >> > [ +0.005018] drm_mode_setcrtc+0x390/0x584 > >> >> > [ +0.004131] drm_ioctl_kernel+0xc8/0x11c > >> >> > [ +0.004035] drm_ioctl+0x2f8/0x34c > >> >>
Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On 2021-02-12 23:19, Rob Clark wrote: On Thu, Feb 11, 2021 at 7:31 AM wrote: On 2021-02-11 01:56, Rob Clark wrote: > On Wed, Feb 10, 2021 at 3:41 AM wrote: >> >> On 2021-02-01 00:46, Rob Clark wrote: >> > On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota >> > wrote: >> >> >> >> Set the flag vblank_disable_immediate = true to turn off vblank irqs >> >> immediately as soon as drm_vblank_put is requested so that there are >> >> no irqs triggered during idle state. This will reduce cpu wakeups >> >> and help in power saving. >> >> >> >> To enable vblank_disable_immediate flag the underlying KMS driver >> >> needs to support high precision vblank timestamping and also a >> >> reliable way of providing vblank counter which is incrementing >> >> at the leading edge of vblank. >> >> >> >> This patch also brings in changes to support vblank_disable_immediate >> >> requirement in dpu driver. >> >> >> >> Changes in v1: >> >> - Specify reason to add vblank timestamp support. (Rob) >> >> - Add changes to provide vblank counter from dpu driver. >> >> >> >> Signed-off-by: Kalyan Thota >> > >> > This seems to be triggering: >> > >> > [ +0.032668] [ cut here ] >> > [ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank != >> > vblank->last) >> > [ +0.24] WARNING: CPU: 0 PID: 362 at >> > drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258 >> > [ +0.017154] Modules linked in: joydev >> > [ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted >> > 5.11.0-rc5-00037-g33d3504871dd #2 >> > [ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT) >> > [ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--) >> > [ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258 >> > [ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258 >> > [ +0.005106] sp : ffc010003b70 >> > [ +0.003409] x29: ffc010003b70 x28: ff80855d9d98 >> > [ +0.005466] x27: x26: 00fe502a >> > [ +0.005458] x25: 0001 x24: 0001 >> > [ +0.005466] x23: 0001 x22: ff808561ce80 >> > [ +0.005465] x21: x20: >> > [ +0.005468] x19: ff80850d6800 x18: >> > [ +0.005466] x17: x16: >> > [ +0.005465] x15: 000a x14: 263b >> > [ +0.005466] x13: 0006 x12: >> > [ +0.005465] x11: 0010 x10: ffc090003797 >> > [ +0.005466] x9 : ffed200e2a8c x8 : >> > [ +0.005466] x7 : x6 : ffed213b2b51 >> > [ +0.005465] x5 : c000dfff x4 : ffed21218048 >> > [ +0.005465] x3 : x2 : >> > [ +0.005465] x1 : x0 : >> > [ +0.005466] Call trace: >> > [ +0.002520] drm_update_vblank_count+0x1e4/0x258 >> > [ +0.004748] drm_handle_vblank+0xd0/0x35c >> > [ +0.004130] drm_crtc_handle_vblank+0x24/0x30 >> > [ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4 >> > [ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4 >> > [ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c >> > [ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc >> > [ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120 >> > [ +0.004834] dpu_core_irq+0x44/0x5c >> > [ +0.003597] dpu_irq+0x1c/0x28 >> > [ +0.003141] msm_irq+0x34/0x40 >> > [ +0.003153] __handle_irq_event_percpu+0xfc/0x254 >> > [ +0.004838] handle_irq_event_percpu+0x3c/0x94 >> > [ +0.004574] handle_irq_event+0x54/0x98 >> > [ +0.003944] handle_level_irq+0xa0/0xd0 >> > [ +0.003943] generic_handle_irq+0x30/0x48 >> > [ +0.004131] dpu_mdss_irq+0xe4/0x118 >> > [ +0.003684] generic_handle_irq+0x30/0x48 >> > [ +0.004127] __handle_domain_irq+0xa8/0xac >> > [ +0.004215] gic_handle_irq+0xdc/0x150 >> > [ +0.003856] el1_irq+0xb4/0x180 >> > [ +0.003237] dpu_encoder_vsync_time+0x78/0x230 >> > [ +0.004574] dpu_encoder_kickoff+0x190/0x354 >> > [ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0 >> > [ +0.004748] dpu_kms_flush_commit+0xf4/0x108 >> > [ +0.004390] msm_atomic_commit_tail+0x2e8/0x384 >> > [ +0.004661] commit_tail+0x80/0x108 >> > [ +0.003588] drm_atomic_helper_commit+0x118/0x11c >> > [ +0.004834] drm_atomic_commit+0x58/0x68 >> > [ +0.004033] drm_atomic_helper_set_config+0x70/0x9c >> > [ +0.005018] drm_mode_setcrtc+0x390/0x584 >> > [ +0.004131] drm_ioctl_kernel+0xc8/0x11c >> > [ +0.004035] drm_ioctl+0x2f8/0x34c >> > [ +0.003500] drm_compat_ioctl+0x48/0xe8 >> > [ +0.003945] __arm64_compat_sys_ioctl+0xe8/0x104 >> > [ +0.004750] el0_svc_common.constprop.0+0x114/0x188 >> > [ +0.005019] do_el0_svc_compat+0x28/0x38 >> > [ +0.004031] el0_svc_compat+0x20/0x30 >> > [ +0.003772] el0_sync_compat_handler+0x104/0x18c >> > [ +0.004749] el0_sync_compat+0x178/0x180 >> > [ +0.004034] ---[ end trace 2959d178e74f2555 ]--- >> > >> > >> > BR, >> > -R >> > >> Hi Rob, >> >> on DPU HW, with prefetch enabled, the
Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On Thu, Feb 11, 2021 at 7:31 AM wrote: > > On 2021-02-11 01:56, Rob Clark wrote: > > On Wed, Feb 10, 2021 at 3:41 AM wrote: > >> > >> On 2021-02-01 00:46, Rob Clark wrote: > >> > On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota > >> > wrote: > >> >> > >> >> Set the flag vblank_disable_immediate = true to turn off vblank irqs > >> >> immediately as soon as drm_vblank_put is requested so that there are > >> >> no irqs triggered during idle state. This will reduce cpu wakeups > >> >> and help in power saving. > >> >> > >> >> To enable vblank_disable_immediate flag the underlying KMS driver > >> >> needs to support high precision vblank timestamping and also a > >> >> reliable way of providing vblank counter which is incrementing > >> >> at the leading edge of vblank. > >> >> > >> >> This patch also brings in changes to support vblank_disable_immediate > >> >> requirement in dpu driver. > >> >> > >> >> Changes in v1: > >> >> - Specify reason to add vblank timestamp support. (Rob) > >> >> - Add changes to provide vblank counter from dpu driver. > >> >> > >> >> Signed-off-by: Kalyan Thota > >> > > >> > This seems to be triggering: > >> > > >> > [ +0.032668] [ cut here ] > >> > [ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank != > >> > vblank->last) > >> > [ +0.24] WARNING: CPU: 0 PID: 362 at > >> > drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258 > >> > [ +0.017154] Modules linked in: joydev > >> > [ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted > >> > 5.11.0-rc5-00037-g33d3504871dd #2 > >> > [ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT) > >> > [ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--) > >> > [ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258 > >> > [ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258 > >> > [ +0.005106] sp : ffc010003b70 > >> > [ +0.003409] x29: ffc010003b70 x28: ff80855d9d98 > >> > [ +0.005466] x27: x26: 00fe502a > >> > [ +0.005458] x25: 0001 x24: 0001 > >> > [ +0.005466] x23: 0001 x22: ff808561ce80 > >> > [ +0.005465] x21: x20: > >> > [ +0.005468] x19: ff80850d6800 x18: > >> > [ +0.005466] x17: x16: > >> > [ +0.005465] x15: 000a x14: 263b > >> > [ +0.005466] x13: 0006 x12: > >> > [ +0.005465] x11: 0010 x10: ffc090003797 > >> > [ +0.005466] x9 : ffed200e2a8c x8 : > >> > [ +0.005466] x7 : x6 : ffed213b2b51 > >> > [ +0.005465] x5 : c000dfff x4 : ffed21218048 > >> > [ +0.005465] x3 : x2 : > >> > [ +0.005465] x1 : x0 : > >> > [ +0.005466] Call trace: > >> > [ +0.002520] drm_update_vblank_count+0x1e4/0x258 > >> > [ +0.004748] drm_handle_vblank+0xd0/0x35c > >> > [ +0.004130] drm_crtc_handle_vblank+0x24/0x30 > >> > [ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4 > >> > [ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4 > >> > [ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c > >> > [ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc > >> > [ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120 > >> > [ +0.004834] dpu_core_irq+0x44/0x5c > >> > [ +0.003597] dpu_irq+0x1c/0x28 > >> > [ +0.003141] msm_irq+0x34/0x40 > >> > [ +0.003153] __handle_irq_event_percpu+0xfc/0x254 > >> > [ +0.004838] handle_irq_event_percpu+0x3c/0x94 > >> > [ +0.004574] handle_irq_event+0x54/0x98 > >> > [ +0.003944] handle_level_irq+0xa0/0xd0 > >> > [ +0.003943] generic_handle_irq+0x30/0x48 > >> > [ +0.004131] dpu_mdss_irq+0xe4/0x118 > >> > [ +0.003684] generic_handle_irq+0x30/0x48 > >> > [ +0.004127] __handle_domain_irq+0xa8/0xac > >> > [ +0.004215] gic_handle_irq+0xdc/0x150 > >> > [ +0.003856] el1_irq+0xb4/0x180 > >> > [ +0.003237] dpu_encoder_vsync_time+0x78/0x230 > >> > [ +0.004574] dpu_encoder_kickoff+0x190/0x354 > >> > [ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0 > >> > [ +0.004748] dpu_kms_flush_commit+0xf4/0x108 > >> > [ +0.004390] msm_atomic_commit_tail+0x2e8/0x384 > >> > [ +0.004661] commit_tail+0x80/0x108 > >> > [ +0.003588] drm_atomic_helper_commit+0x118/0x11c > >> > [ +0.004834] drm_atomic_commit+0x58/0x68 > >> > [ +0.004033] drm_atomic_helper_set_config+0x70/0x9c > >> > [ +0.005018] drm_mode_setcrtc+0x390/0x584 > >> > [ +0.004131] drm_ioctl_kernel+0xc8/0x11c > >> > [ +0.004035] drm_ioctl+0x2f8/0x34c > >> > [ +0.003500] drm_compat_ioctl+0x48/0xe8 > >> > [ +0.003945] __arm64_compat_sys_ioctl+0xe8/0x104 > >> > [ +0.004750] el0_svc_common.constprop.0+0x114/0x188 > >> > [ +0.005019] do_el0_svc_compat+0x28/0x38 > >> > [ +0.004031] el0_svc_compat+0x20/0x30 > >> > [ +0.003772] el0_sync_compat_handler+0x104/0x18c > >> > [ +0.004749]
Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On 2021-02-11 01:56, Rob Clark wrote: On Wed, Feb 10, 2021 at 3:41 AM wrote: On 2021-02-01 00:46, Rob Clark wrote: > On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota > wrote: >> >> Set the flag vblank_disable_immediate = true to turn off vblank irqs >> immediately as soon as drm_vblank_put is requested so that there are >> no irqs triggered during idle state. This will reduce cpu wakeups >> and help in power saving. >> >> To enable vblank_disable_immediate flag the underlying KMS driver >> needs to support high precision vblank timestamping and also a >> reliable way of providing vblank counter which is incrementing >> at the leading edge of vblank. >> >> This patch also brings in changes to support vblank_disable_immediate >> requirement in dpu driver. >> >> Changes in v1: >> - Specify reason to add vblank timestamp support. (Rob) >> - Add changes to provide vblank counter from dpu driver. >> >> Signed-off-by: Kalyan Thota > > This seems to be triggering: > > [ +0.032668] [ cut here ] > [ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank != > vblank->last) > [ +0.24] WARNING: CPU: 0 PID: 362 at > drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258 > [ +0.017154] Modules linked in: joydev > [ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted > 5.11.0-rc5-00037-g33d3504871dd #2 > [ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT) > [ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--) > [ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258 > [ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258 > [ +0.005106] sp : ffc010003b70 > [ +0.003409] x29: ffc010003b70 x28: ff80855d9d98 > [ +0.005466] x27: x26: 00fe502a > [ +0.005458] x25: 0001 x24: 0001 > [ +0.005466] x23: 0001 x22: ff808561ce80 > [ +0.005465] x21: x20: > [ +0.005468] x19: ff80850d6800 x18: > [ +0.005466] x17: x16: > [ +0.005465] x15: 000a x14: 263b > [ +0.005466] x13: 0006 x12: > [ +0.005465] x11: 0010 x10: ffc090003797 > [ +0.005466] x9 : ffed200e2a8c x8 : > [ +0.005466] x7 : x6 : ffed213b2b51 > [ +0.005465] x5 : c000dfff x4 : ffed21218048 > [ +0.005465] x3 : x2 : > [ +0.005465] x1 : x0 : > [ +0.005466] Call trace: > [ +0.002520] drm_update_vblank_count+0x1e4/0x258 > [ +0.004748] drm_handle_vblank+0xd0/0x35c > [ +0.004130] drm_crtc_handle_vblank+0x24/0x30 > [ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4 > [ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4 > [ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c > [ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc > [ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120 > [ +0.004834] dpu_core_irq+0x44/0x5c > [ +0.003597] dpu_irq+0x1c/0x28 > [ +0.003141] msm_irq+0x34/0x40 > [ +0.003153] __handle_irq_event_percpu+0xfc/0x254 > [ +0.004838] handle_irq_event_percpu+0x3c/0x94 > [ +0.004574] handle_irq_event+0x54/0x98 > [ +0.003944] handle_level_irq+0xa0/0xd0 > [ +0.003943] generic_handle_irq+0x30/0x48 > [ +0.004131] dpu_mdss_irq+0xe4/0x118 > [ +0.003684] generic_handle_irq+0x30/0x48 > [ +0.004127] __handle_domain_irq+0xa8/0xac > [ +0.004215] gic_handle_irq+0xdc/0x150 > [ +0.003856] el1_irq+0xb4/0x180 > [ +0.003237] dpu_encoder_vsync_time+0x78/0x230 > [ +0.004574] dpu_encoder_kickoff+0x190/0x354 > [ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0 > [ +0.004748] dpu_kms_flush_commit+0xf4/0x108 > [ +0.004390] msm_atomic_commit_tail+0x2e8/0x384 > [ +0.004661] commit_tail+0x80/0x108 > [ +0.003588] drm_atomic_helper_commit+0x118/0x11c > [ +0.004834] drm_atomic_commit+0x58/0x68 > [ +0.004033] drm_atomic_helper_set_config+0x70/0x9c > [ +0.005018] drm_mode_setcrtc+0x390/0x584 > [ +0.004131] drm_ioctl_kernel+0xc8/0x11c > [ +0.004035] drm_ioctl+0x2f8/0x34c > [ +0.003500] drm_compat_ioctl+0x48/0xe8 > [ +0.003945] __arm64_compat_sys_ioctl+0xe8/0x104 > [ +0.004750] el0_svc_common.constprop.0+0x114/0x188 > [ +0.005019] do_el0_svc_compat+0x28/0x38 > [ +0.004031] el0_svc_compat+0x20/0x30 > [ +0.003772] el0_sync_compat_handler+0x104/0x18c > [ +0.004749] el0_sync_compat+0x178/0x180 > [ +0.004034] ---[ end trace 2959d178e74f2555 ]--- > > > BR, > -R > Hi Rob, on DPU HW, with prefetch enabled, the frame count increment and vsync irq are not happening at same instance. This is causing the frame count to mismatch. Example: |###--^--|###--^--| for the above vsync cycle with prefetch enabled "^" --> marks a fetch counter where in we are asking the hw to start fetching in the front porch so that we will have more time to fetch data by first active line of next
Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On Wed, Feb 10, 2021 at 3:41 AM wrote: > > On 2021-02-01 00:46, Rob Clark wrote: > > On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota > > wrote: > >> > >> Set the flag vblank_disable_immediate = true to turn off vblank irqs > >> immediately as soon as drm_vblank_put is requested so that there are > >> no irqs triggered during idle state. This will reduce cpu wakeups > >> and help in power saving. > >> > >> To enable vblank_disable_immediate flag the underlying KMS driver > >> needs to support high precision vblank timestamping and also a > >> reliable way of providing vblank counter which is incrementing > >> at the leading edge of vblank. > >> > >> This patch also brings in changes to support vblank_disable_immediate > >> requirement in dpu driver. > >> > >> Changes in v1: > >> - Specify reason to add vblank timestamp support. (Rob) > >> - Add changes to provide vblank counter from dpu driver. > >> > >> Signed-off-by: Kalyan Thota > > > > This seems to be triggering: > > > > [ +0.032668] [ cut here ] > > [ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank != > > vblank->last) > > [ +0.24] WARNING: CPU: 0 PID: 362 at > > drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258 > > [ +0.017154] Modules linked in: joydev > > [ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted > > 5.11.0-rc5-00037-g33d3504871dd #2 > > [ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT) > > [ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--) > > [ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258 > > [ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258 > > [ +0.005106] sp : ffc010003b70 > > [ +0.003409] x29: ffc010003b70 x28: ff80855d9d98 > > [ +0.005466] x27: x26: 00fe502a > > [ +0.005458] x25: 0001 x24: 0001 > > [ +0.005466] x23: 0001 x22: ff808561ce80 > > [ +0.005465] x21: x20: > > [ +0.005468] x19: ff80850d6800 x18: > > [ +0.005466] x17: x16: > > [ +0.005465] x15: 000a x14: 263b > > [ +0.005466] x13: 0006 x12: > > [ +0.005465] x11: 0010 x10: ffc090003797 > > [ +0.005466] x9 : ffed200e2a8c x8 : > > [ +0.005466] x7 : x6 : ffed213b2b51 > > [ +0.005465] x5 : c000dfff x4 : ffed21218048 > > [ +0.005465] x3 : x2 : > > [ +0.005465] x1 : x0 : > > [ +0.005466] Call trace: > > [ +0.002520] drm_update_vblank_count+0x1e4/0x258 > > [ +0.004748] drm_handle_vblank+0xd0/0x35c > > [ +0.004130] drm_crtc_handle_vblank+0x24/0x30 > > [ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4 > > [ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4 > > [ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c > > [ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc > > [ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120 > > [ +0.004834] dpu_core_irq+0x44/0x5c > > [ +0.003597] dpu_irq+0x1c/0x28 > > [ +0.003141] msm_irq+0x34/0x40 > > [ +0.003153] __handle_irq_event_percpu+0xfc/0x254 > > [ +0.004838] handle_irq_event_percpu+0x3c/0x94 > > [ +0.004574] handle_irq_event+0x54/0x98 > > [ +0.003944] handle_level_irq+0xa0/0xd0 > > [ +0.003943] generic_handle_irq+0x30/0x48 > > [ +0.004131] dpu_mdss_irq+0xe4/0x118 > > [ +0.003684] generic_handle_irq+0x30/0x48 > > [ +0.004127] __handle_domain_irq+0xa8/0xac > > [ +0.004215] gic_handle_irq+0xdc/0x150 > > [ +0.003856] el1_irq+0xb4/0x180 > > [ +0.003237] dpu_encoder_vsync_time+0x78/0x230 > > [ +0.004574] dpu_encoder_kickoff+0x190/0x354 > > [ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0 > > [ +0.004748] dpu_kms_flush_commit+0xf4/0x108 > > [ +0.004390] msm_atomic_commit_tail+0x2e8/0x384 > > [ +0.004661] commit_tail+0x80/0x108 > > [ +0.003588] drm_atomic_helper_commit+0x118/0x11c > > [ +0.004834] drm_atomic_commit+0x58/0x68 > > [ +0.004033] drm_atomic_helper_set_config+0x70/0x9c > > [ +0.005018] drm_mode_setcrtc+0x390/0x584 > > [ +0.004131] drm_ioctl_kernel+0xc8/0x11c > > [ +0.004035] drm_ioctl+0x2f8/0x34c > > [ +0.003500] drm_compat_ioctl+0x48/0xe8 > > [ +0.003945] __arm64_compat_sys_ioctl+0xe8/0x104 > > [ +0.004750] el0_svc_common.constprop.0+0x114/0x188 > > [ +0.005019] do_el0_svc_compat+0x28/0x38 > > [ +0.004031] el0_svc_compat+0x20/0x30 > > [ +0.003772] el0_sync_compat_handler+0x104/0x18c > > [ +0.004749] el0_sync_compat+0x178/0x180 > > [ +0.004034] ---[ end trace 2959d178e74f2555 ]--- > > > > > > BR, > > -R > > > Hi Rob, > > on DPU HW, with prefetch enabled, the frame count increment and vsync > irq are not happening at same instance. This is causing the frame count > to mismatch. > > Example: > |###--^--|###--^--| > > for the above vsync cycle with prefetch
Re: [Freedreno] [v2] drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver
On 2021-02-01 00:46, Rob Clark wrote:
On Fri, Dec 18, 2020 at 2:27 AM Kalyan Thota
wrote:
Set the flag vblank_disable_immediate = true to turn off vblank irqs
immediately as soon as drm_vblank_put is requested so that there are
no irqs triggered during idle state. This will reduce cpu wakeups
and help in power saving.
To enable vblank_disable_immediate flag the underlying KMS driver
needs to support high precision vblank timestamping and also a
reliable way of providing vblank counter which is incrementing
at the leading edge of vblank.
This patch also brings in changes to support vblank_disable_immediate
requirement in dpu driver.
Changes in v1:
- Specify reason to add vblank timestamp support. (Rob)
- Add changes to provide vblank counter from dpu driver.
Signed-off-by: Kalyan Thota
This seems to be triggering:
[ +0.032668] [ cut here ]
[ +0.004759] msm ae0.mdss: drm_WARN_ON_ONCE(cur_vblank !=
vblank->last)
[ +0.24] WARNING: CPU: 0 PID: 362 at
drivers/gpu/drm/drm_vblank.c:354 drm_update_vblank_count+0x1e4/0x258
[ +0.017154] Modules linked in: joydev
[ +0.003784] CPU: 0 PID: 362 Comm: frecon Not tainted
5.11.0-rc5-00037-g33d3504871dd #2
[ +0.008135] Hardware name: Google Lazor (rev1 - 2) with LTE (DT)
[ +0.006167] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=--)
[ +0.006169] pc : drm_update_vblank_count+0x1e4/0x258
[ +0.005105] lr : drm_update_vblank_count+0x1e4/0x258
[ +0.005106] sp : ffc010003b70
[ +0.003409] x29: ffc010003b70 x28: ff80855d9d98
[ +0.005466] x27: x26: 00fe502a
[ +0.005458] x25: 0001 x24: 0001
[ +0.005466] x23: 0001 x22: ff808561ce80
[ +0.005465] x21: x20:
[ +0.005468] x19: ff80850d6800 x18:
[ +0.005466] x17: x16:
[ +0.005465] x15: 000a x14: 263b
[ +0.005466] x13: 0006 x12:
[ +0.005465] x11: 0010 x10: ffc090003797
[ +0.005466] x9 : ffed200e2a8c x8 :
[ +0.005466] x7 : x6 : ffed213b2b51
[ +0.005465] x5 : c000dfff x4 : ffed21218048
[ +0.005465] x3 : x2 :
[ +0.005465] x1 : x0 :
[ +0.005466] Call trace:
[ +0.002520] drm_update_vblank_count+0x1e4/0x258
[ +0.004748] drm_handle_vblank+0xd0/0x35c
[ +0.004130] drm_crtc_handle_vblank+0x24/0x30
[ +0.004487] dpu_crtc_vblank_callback+0x3c/0xc4
[ +0.004662] dpu_encoder_vblank_callback+0x70/0xc4
[ +0.004931] dpu_encoder_phys_vid_vblank_irq+0x50/0x12c
[ +0.005378] dpu_core_irq_callback_handler+0xf4/0xfc
[ +0.005107] dpu_hw_intr_dispatch_irq+0x100/0x120
[ +0.004834] dpu_core_irq+0x44/0x5c
[ +0.003597] dpu_irq+0x1c/0x28
[ +0.003141] msm_irq+0x34/0x40
[ +0.003153] __handle_irq_event_percpu+0xfc/0x254
[ +0.004838] handle_irq_event_percpu+0x3c/0x94
[ +0.004574] handle_irq_event+0x54/0x98
[ +0.003944] handle_level_irq+0xa0/0xd0
[ +0.003943] generic_handle_irq+0x30/0x48
[ +0.004131] dpu_mdss_irq+0xe4/0x118
[ +0.003684] generic_handle_irq+0x30/0x48
[ +0.004127] __handle_domain_irq+0xa8/0xac
[ +0.004215] gic_handle_irq+0xdc/0x150
[ +0.003856] el1_irq+0xb4/0x180
[ +0.003237] dpu_encoder_vsync_time+0x78/0x230
[ +0.004574] dpu_encoder_kickoff+0x190/0x354
[ +0.004386] dpu_crtc_commit_kickoff+0x194/0x1a0
[ +0.004748] dpu_kms_flush_commit+0xf4/0x108
[ +0.004390] msm_atomic_commit_tail+0x2e8/0x384
[ +0.004661] commit_tail+0x80/0x108
[ +0.003588] drm_atomic_helper_commit+0x118/0x11c
[ +0.004834] drm_atomic_commit+0x58/0x68
[ +0.004033] drm_atomic_helper_set_config+0x70/0x9c
[ +0.005018] drm_mode_setcrtc+0x390/0x584
[ +0.004131] drm_ioctl_kernel+0xc8/0x11c
[ +0.004035] drm_ioctl+0x2f8/0x34c
[ +0.003500] drm_compat_ioctl+0x48/0xe8
[ +0.003945] __arm64_compat_sys_ioctl+0xe8/0x104
[ +0.004750] el0_svc_common.constprop.0+0x114/0x188
[ +0.005019] do_el0_svc_compat+0x28/0x38
[ +0.004031] el0_svc_compat+0x20/0x30
[ +0.003772] el0_sync_compat_handler+0x104/0x18c
[ +0.004749] el0_sync_compat+0x178/0x180
[ +0.004034] ---[ end trace 2959d178e74f2555 ]---
BR,
-R
Hi Rob,
on DPU HW, with prefetch enabled, the frame count increment and vsync
irq are not happening at same instance. This is causing the frame count
to mismatch.
Example:
|###--^--|###--^--|
for the above vsync cycle with prefetch enabled "^" --> marks a fetch
counter where in we are asking the hw to start fetching in the front
porch so that we will have more time to fetch data by first active line
of next frame.
In this case, the vsync irq will be triggered at fetch start marker
("^") so that double buffered updates are submitted to HW and the frame
count update will happen at the end of front porch ("|")
to handle this, can we fallback on the SW vblank counter
