This adds display interface timings for the Television Encoder
connected to IPU DI1 on i.MX53 and adds some configuration
glue code to select which IPU signal generators / pins are to
be used for HSYNC/VSYNC signals.
The default configuration is pin2/pin3 for hsync/vsync. The
VGA connector on
This adds display interface timings for the Television Encoder
connected to IPU DI1 on i.MX53 and adds some configuration
glue code to select which IPU signal generators / pins are to
be used for HSYNC/VSYNC signals.
The default configuration is pin2/pin3 for hsync/vsync. The
VGA connector on
