Convert the format of the 'show' debugfs file and the crash
dump to a format resembling YAML. This should be easier to
parse and be more flexible for future changes and expansions.
Signed-off-by: Jordan Crouse <jcro...@codeaurora.org>
---
Documentation/gpu/drm-msm-crash-dump.txt | 29 +++++++++++++++++++++++++++++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 ++++++++++++++---------
2 files changed, 43 insertions(+), 9 deletions(-)
create mode 100644 Documentation/gpu/drm-msm-crash-dump.txt
diff --git a/Documentation/gpu/drm-msm-crash-dump.txt
b/Documentation/gpu/drm-msm-crash-dump.txt
new file mode 100644
index 0000000..ec56640
--- /dev/null
+++ b/Documentation/gpu/drm-msm-crash-dump.txt
@@ -0,0 +1,29 @@
+# drm/msm GPU crash dump format
+#
+# This is a description of the format of the drm/msm GPU crash dump format that
+# can be read from /sys/kernel/dri/X/show or from devcoredump following a GPU
+# hang or fault
+
+---
+kernel: # [string] The kernel version as printed by UTS_RELEASE
+module: # [string] The module that generated the crash dump
+time: # [seconds.microseconds] The kernel time at crash
+comm: # [string] comm string for the binary that generated the fault
+ # (if known)
+cmdline: # [string] the cmdline for the binary that generated the fault
+ # (if known)
+revision: # [ id core.major.minor.patchlevel] The GPU id followed by the
+ # individual components of the id separated by dots
+rbbm-status: # [hex] The current value of RBBM_STATUS which shows what GPU
+ # components were in use at the time of the crash
+ringbuffer: # Ringbuffer data. There will be a sequence for each ringbuffer
+ -id: # [decimal] Ringbuffer identifier (0 based index)
+ last-fence: # [decimal] The last fence issued on the ring
+ retired-fence: # [decimal] THe last fence retired on the ring
+ rptr: # [decimal] The current read pointer (rptr) for the ring
+ wptr: # [decimal] The current write pointer (wptr) for the ring
+registers: # Sets of register values. This section can be used multiple
+ # times for different ranges of registers. Each register will be
+ # on its own line.
+ - [offset, value] # offset: [hex] byte offset of the register
+ # value: [hex] value of the register
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index e86238ce..920db2e 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -458,23 +458,28 @@ void adreno_show(struct msm_gpu *gpu, struct
msm_gpu_state *state,
if (IS_ERR_OR_NULL(state))
return;
- drm_printf(p, "status: %08x\n", state->rbbm_status);
drm_printf(p, "revision: %d (%d.%d.%d.%d)\n",
adreno_gpu->info->revn, adreno_gpu->rev.core,
adreno_gpu->rev.major, adreno_gpu->rev.minor,
adreno_gpu->rev.patchid);
- for (i = 0; i < gpu->nr_rings; i++) {
- drm_printf(p, "rb %d: fence: %d/%d\n", i,
- state->ring[i].fence, state->ring[i].seqno);
+ drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status);
+
+ drm_printf(p, "ringbuffer:\n");
- drm_printf(p, " rptr: %d\n", state->ring[i].rptr);
- drm_printf(p, "rb wptr: %d\n", state->ring[i].wptr);
+ for (i = 0; i < gpu->nr_rings; i++) {
+ drm_printf(p, " - id: %d\n", i);
+ drm_printf(p, " last-fence: %d\n", state->ring[i].seqno);
+ drm_printf(p, " retired-fence: %d\n", state->ring[i].fence);
+ drm_printf(p, " rptr: %d\n", state->ring[i].rptr);
+ drm_printf(p, " wptr: %d\n", state->ring[i].wptr);
}
- drm_printf(p, "IO:region %s 00000000 00020000\n", gpu->name);
- for (i = 0; i < state->nr_registers; i++) {
- drm_printf(p, "IO:R %08x %08x\n",
+ drm_printf(p, "registers:\n");
+ drm_printf(p, " - [offset, value]\n");
+
+ for(i = 0; i < state->nr_registers; i++) {
+ drm_printf(p, " - [0x%04x, 0x%08x]\n",
state->registers[i * 2] << 2,
state->registers[(i * 2) + 1]);
}
--
1.9.1
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