Hi Jean,
On Wed, Aug 29, 2012 at 6:44 AM, Jean Delvare wrote:
> Hi all,
>
> Sorry for breaking message threading but I was not included in
> iterations 3 and 4 of this patch.
>
> Random comments about v4:
>
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -254,6
Hi all,
Sorry for breaking message threading but I was not included in
iterations 3 and 4 of this patch.
Random comments about v4:
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -254,6 +254,8 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
> unsigned
> char
On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
> The current logic for probing ddc is limited to
> 2 blocks (256 bytes), this patch adds support
> for the 4 block (512) data.
>
> To do this, a single 8-bit segment index is
> passed to the display via the I2C address 30h.
> Data from
On Wed, Aug 29, 2012 at 4:08 AM, Ville Syrj?l? <
ville.syrjala at linux.intel.com> wrote:
> On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
> > The current logic for probing ddc is limited to
> > 2 blocks (256 bytes), this patch adds support
> > for the 4 block (512) data.
> >
> > To
On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single 8-bit segment index is
passed to the display via the I2C address 30h.
Data from the
On Wed, Aug 29, 2012 at 4:08 AM, Ville Syrjälä
ville.syrj...@linux.intel.com wrote:
On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single
Hi all,
Sorry for breaking message threading but I was not included in
iterations 3 and 4 of this patch.
Random comments about v4:
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -254,6 +254,8 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
unsigned
char *buf,
Hi Jean,
On Wed, Aug 29, 2012 at 6:44 AM, Jean Delvare jdelv...@suse.de wrote:
Hi all,
Sorry for breaking message threading but I was not included in
iterations 3 and 4 of this patch.
Random comments about v4:
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@
On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
> The current logic for probing ddc is limited to
> 2 blocks (256 bytes), this patch adds support
> for the 4 block (512) data.
>
> To do this, a single 8-bit segment index is
> passed to the display via the I2C address 30h.
> Data from
On Sat, Aug 25, 2012 at 03:13:56PM +0530, Shirish S wrote:
The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single 8-bit segment index is
passed to the display via the I2C address 30h.
Data from the
The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single 8-bit segment index is
passed to the display via the I2C address 30h.
Data from the selected segment is then immediately
read via the regular DDC2 address
This patch adds support in probing 4 block edid data, for E-DDC.
This is the first test case in CTS, for HDMI compliance.
Changes from V3:
Remove switch,and avoid sending of segment data for non E-DDC
Based on drm-next branch
Shirish S (1):
drm: edid: add support for E-DDC
This patch adds support in probing 4 block edid data, for E-DDC.
This is the first test case in CTS, for HDMI compliance.
Changes from V3:
Remove switch,and avoid sending of segment data for non E-DDC
Based on drm-next branch
Shirish S (1):
drm: edid: add support for E-DDC
The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single 8-bit segment index is
passed to the display via the I2C address 30h.
Data from the selected segment is then immediately
read via the regular DDC2 address
14 matches
Mail list logo
