Re: [PATCH v2 06/13] drm/sun4i: hdmi: Allow using second PLL as TMDS clk parent

2017-09-26 Thread Maxime Ripard
On Tue, Sep 26, 2017 at 06:59:12AM +, Chen-Yu Tsai wrote: > Allwinner SoCs typically have two PLLs reserved for video related usage. > At the moment we only support using the first one to feed the HDMI > transmitter block's TMDS clock. > > Let the HDMI encoder's TMDS clock go through all of

[PATCH v2 06/13] drm/sun4i: hdmi: Allow using second PLL as TMDS clk parent

2017-09-26 Thread Chen-Yu Tsai
Allwinner SoCs typically have two PLLs reserved for video related usage. At the moment we only support using the first one to feed the HDMI transmitter block's TMDS clock. Let the HDMI encoder's TMDS clock go through all of its parents when calculating possible clock rates. This allows usage of