Hi Jyri,
Thank you for the patch.
On Wed, Feb 27, 2019 at 11:54:21PM +0200, Jyri Sarha wrote:
> The pixel clock unit in the first two registers (0x00 and 0x01) of
> sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
> 10 fixes the issue.
>
> Signed-off-by: Jyri Sarha
>
The pixel clock unit in the first two registers (0x00 and 0x01) of
sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
10 fixes the issue.
Signed-off-by: Jyri Sarha
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sii902x.c | 5 +++--
1 file changed, 3 insertions(+), 2
