Re: [PATCH v3 04/16] clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO

2018-03-07 Thread Rob Herring
On Thu, Mar 01, 2018 at 10:34:30PM +0100, Jernej Skrabec wrote: > CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible > PHY clock parent. > > Export it so it can be used later in DT. > > Signed-off-by: Jernej Skrabec > --- > drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 4 +++- > i

[PATCH v3 04/16] clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO

2018-03-02 Thread Jernej Skrabec
CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible PHY clock parent. Export it so it can be used later in DT. Signed-off-by: Jernej Skrabec --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 4 +++- include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++ 2 files changed, 5 insertions(+),