Re: [PATCH v3 2/3] drm/rockchip: dw_hdmi: introduce the VPLL clock setting

2017-06-14 Thread Rob Herring
On Fri, Jun 09, 2017 at 03:10:41PM +0800, Mark Yao wrote: > For RK3399 HDMI, there is an external clock need for HDMI PHY, > and it should keep the same clock rate with VOP DCLK. > > VPLL have supported the clock for HDMI PHY, but there is no > clock divider bewteen VPLL and HDMI PHY. So we need

[PATCH v3 2/3] drm/rockchip: dw_hdmi: introduce the VPLL clock setting

2017-06-09 Thread Mark Yao
For RK3399 HDMI, there is an external clock need for HDMI PHY, and it should keep the same clock rate with VOP DCLK. VPLL have supported the clock for HDMI PHY, but there is no clock divider bewteen VPLL and HDMI PHY. So we need to set the VPLL rate manually in HDMI driver. Signed-off-by: Yakir