Re: drm/scheduler for vc5

2018-04-04 Thread Christian König
Am 04.04.2018 um 01:08 schrieb Eric Anholt: Christian König writes: Hi Eric, nice to see that the scheduler gets used more and more. The feature your need to solve both your binning/rendering as well as your MMU problem is dependency handling. See the "dependency" callback of the backend ope

Re: drm/scheduler for vc5

2018-04-03 Thread Eric Anholt
Christian König writes: > Hi Eric, > > nice to see that the scheduler gets used more and more. > > The feature your need to solve both your binning/rendering as well as > your MMU problem is dependency handling. See the "dependency" callback > of the backend operations. > > With this callback t

Re: drm/scheduler for vc5

2018-04-03 Thread Christian König
Am 02.04.2018 um 20:49 schrieb Eric Anholt: [SNIP] This call will pick a VMID and remember that the process of the job is now the owner of this VMID. If the VMID previously didn't belonged to the process of the current job all fences of the old process are added to the job->sync object again. T

Re: drm/scheduler for vc5

2018-04-02 Thread Eric Anholt
Christian König writes: > Hi Eric, > > nice to see that the scheduler gets used more and more. > > The feature your need to solve both your binning/rendering as well as > your MMU problem is dependency handling. See the "dependency" callback > of the backend operations. > > With this callback t

Re: drm/scheduler for vc5

2018-03-31 Thread Christian König
Hi Eric, nice to see that the scheduler gets used more and more. The feature your need to solve both your binning/rendering as well as your MMU problem is dependency handling. See the "dependency" callback of the backend operations. With this callback the driver can return dma_fences which

drm/scheduler for vc5

2018-03-30 Thread Eric Anholt
I've been keeping my eye on what's going on with drm/scheduler, and I'm definitely interested in using it. I've got some questions about how to fit it to this HW, though. For this HW, most rendering jobs have two phases: binning and rendering, and the HW has two small FIFOs for descriptions of ea