Hi Dave,
2010/3/25 Dave Airlie :
> Some nouveau updates + misc drm core fixes,
>
> radeon kms: mostly fixes, however a cleanup to the ugly asic tables to
> avoid drift between C prototypes moves some stuff around, and I've merged
> Jerome's GPU recovery code, as I'd much rather users had some of h
Hi all,
Some DRM ioctls like this: DRM_IOCTL_DEF(DRM_IOCTL_ADD_CTX, drm_addctx,
DRM_AUTH|DRM_ROOT_ONLY),
it means that the drm_addctx must be called with both DRM_auth and root
priviledge. And I have a dount that the DRM_ROOT_ONLY is the superset of
DRM_AUTH according to the code below:
static
Some nouveau updates + misc drm core fixes,
radeon kms: mostly fixes, however a cleanup to the ugly asic tables to
avoid drift between C prototypes moves some stuff around, and I've merged
Jerome's GPU recovery code, as I'd much rather users had some of hope of
recovering from their GPU lockin
http://bugs.freedesktop.org/show_bug.cgi?id=25662
--- Comment #14 from Tom Stellard 2010-03-24 19:23:27 PST
---
https://bugzilla.kernel.org/show_bug.cgi?id=15626
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http://bugs.freedesktop.org/show_bug.cgi?id=27297
--- Comment #1 from Chris Rankin 2010-03-24 18:57:47
PST ---
This is with vanilla Linux 2.6.33.1, libdrm-2.4.18 and xf86-drv-ati from git.
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current userspace doesn't use any of these regs, so the change has no
affect on existing drivers.
>From 33ae9dc620608eca8d0ba12664e6c93496a31431 Mon Sep 17 00:00:00 2001
From: Alex Deucher
Date: Wed, 24 Mar 2010 18:45:32 -0400
Subject: [PATCH] drm/radeon/r600: remove some regs are not safe regs
f
Setting single memory pages at a time to wc takes a lot time in cache flush. To
reduce number of cache flush set_pages_array_wc and set_memory_array_wc can be
used to set multiple pages to WC with single cache flush.
This improves allocation performance for wc cached pages in drm/ttm.
Signed-off-
Sysfs interface allows user to configure pool allocator functionality and
change limits for the size of pool.
Signed-off-by: Pauli Nieminen
---
drivers/gpu/drm/ttm/ttm_memory.c |2 +-
drivers/gpu/drm/ttm/ttm_page_alloc.c | 113 +-
include/drm/ttm/ttm_page
On AGP system we might allocate/free routinely uncached or wc memory,
changing page from cached (wb) to uc or wc is very expensive and involves
a lot of flushing. To improve performance this allocator use a pool
of uc,wc pages.
Pools are protected with spinlocks to allow multiple threads to alloca
Using single call to set multiple pages to wc reduces number of expensive cache
flushes.
Signed-off-by: Pauli Nieminen
---
drivers/gpu/drm/ttm/ttm_page_alloc.c | 12 +---
1 files changed, 1 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c
b/drivers/gpu
ttm_page_alloc_debugfs can be registered to output the state
of pools.
Debugfs file will output number of pages freed from the pool,
number of pages in pool now and the lowes number of pages in
pool since previous shrink.
Signed-off-by: Pauli Nieminen
---
drivers/gpu/drm/ttm/ttm_page_alloc.c |
ttm_page_pool file is hooked ttm_page_alloc_debugfs for pool
allocator state.
Signed-off-by: Pauli Nieminen
---
drivers/gpu/drm/radeon/radeon_ttm.c | 13 ++---
1 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/
ttm_page_pool file is hooked ttm_page_alloc_debugfs for pool
allocator state.
Signed-off-by: Pauli Nieminen
---
drivers/gpu/drm/nouveau/nouveau_debugfs.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c
b/drivers/gpu/drm/nouvea
This patch series simplifies pool management code and adds sysfd interface
to control pool functionality from sysfs.
Pool size reduction only happens when mm shrinker request for free
pages. To prevent pool from wasting too much free memory there is
user configureable maximum size. If pool tries t
http://bugs.freedesktop.org/show_bug.cgi?id=27297
Summary: Gallium R300g - xscreensaver "endgame" hack runs much
slower than under classic Mesa.
Product: Mesa
Version: git
Platform: x86 (IA32)
OS/Version: Linux (All)
On Wed, Mar 24, 2010 at 09:08:08PM +0100, Thomas Hellstrom wrote:
> Jerome Glisse wrote:
> >On Wed, Mar 24, 2010 at 07:27:57PM +0100, Thomas Hellstrom wrote:
> >>Jerome Glisse wrote:
> >>>On fault the driver is given the opportunity to perform any operation
> >>>it sees fit in order to place the bu
Jerome Glisse wrote:
> On Wed, Mar 24, 2010 at 07:27:57PM +0100, Thomas Hellstrom wrote:
>
>> Jerome Glisse wrote:
>>
>>> On fault the driver is given the opportunity to perform any operation
>>> it sees fit in order to place the buffer into a CPU visible area of
>>> memory. This patch does
http://bugs.freedesktop.org/show_bug.cgi?id=27043
Alex Deucher changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
On Fri, 19 Mar 2010 16:30:48 +0100, Hubert Hesse wrote:
> Hi there,
>
> I'm referring to my Bugreport 15473.
>
> I wanted to use KMS with the latest kernel on my Sony VGN-BZ12VN.
> Similiar to Bug 14649 and 14554 `cat /proc/acpi/button/lid/LID0/state`
> always reports "state: closed" to me.
> A
On Wed, Mar 24, 2010 at 07:27:57PM +0100, Thomas Hellstrom wrote:
> Jerome Glisse wrote:
> > On fault the driver is given the opportunity to perform any operation
> > it sees fit in order to place the buffer into a CPU visible area of
> > memory. This patch doesn't break TTM users, nouveau, vmwgfx
Jerome Glisse wrote:
> On fault the driver is given the opportunity to perform any operation
> it sees fit in order to place the buffer into a CPU visible area of
> memory. This patch doesn't break TTM users, nouveau, vmwgfx and radeon
> should keep working properly. Future patch will take advantag
>From 119bca9827fa4cb83f3d398e6a7793d188e73186 Mon Sep 17 00:00:00 2001
From: Alex Deucher
Date: Wed, 24 Mar 2010 13:57:29 -0400
Subject: [PATCH] drm/radeon/kms: fix some typos in r6xx/r7xx hpd setup
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/r600.c | 14 +++---
1 files ch
http://bugs.freedesktop.org/show_bug.cgi?id=27221
--- Comment #7 from Ondrej Zary 2010-03-24
10:28:16 PST ---
Downgrading mesa to 7.5 while keeping X server 1.7.5 fixes the textures but not
the low performance.
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On fault the driver is given the opportunity to perform any operation
it sees fit in order to place the buffer into a CPU visible area of
memory. This patch doesn't break TTM users, nouveau, vmwgfx and radeon
should keep working properly. Future patch will take advantage of this
infrastructure and
All TTM driver have been converted to new io_mem_reserve/free
interface which allow driver to choose and return proper io
base, offset to core TTM for ioremapping if necessary. This
patch remove what is now deadcode.
V2 adapt to match with change in first patch of the patchset
V3 update after io_m
There is case where we want to be able to wait only for the
GPU while not waiting for other buffer to be unreserved. This
patch split the no_wait argument all the way down in the whole
ttm path so that upper level can decide on what to wait on or
not.
This patch break the API to other modules, upd
This add the support for the new fault callback, does change anything
from driver point of view, thought it should allow nouveau to add
support for unmappable VRAM.
Improvement: store the aperture base in a variable so that we don't
call a function to get it on each fault.
Patch hasn't been teste
This patch update radeon to the new no_wait splitted argument
TTM functionality.
Compile tested only (but thing should run as there is no
operating change from driver point of view)
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 45 ++--
d
This add the support for the new fault callback, does change anything
from driver point of view.
Improvement: store the aperture base in a variable so that we don't
call a function to get it on each fault.
Patch hasn't been tested.
V2 don't derefence bo->mem.mm_node as it's not NULL only for
This isn't needed anymore with the new TTM fault callback
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c |6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
index 7
This patch enable the use of unmappable VRAM thanks to
previous TTM infrastructure change.
V2 update after io_mem_reserve/io_mem_free callback balancing
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |5 -
drivers/gpu/drm/radeon/r100.c |5 -
drivers/gpu
This isn't needed anymore with the new TTM fault callback
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 11 ---
1 files changed, 0 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index d
This isn't needed anymore with the new TTM fault callback
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_ttm.c | 13 +
1 files changed, 1 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
index d2
This patch update radeon to the new no_wait splitted argument
TTM functionality.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.c |6 ++--
drivers/gpu/drm/radeon/radeon_ttm.c| 39 +--
2 files changed, 24 insertions(+), 21 deletions(-)
This add the support for the new fault callback and also the
infrastructure for supporting unmappable VRAM.
V2 validate BO with no_wait = true
V3 don't derefence bo->mem.mm_node as it's not NULL only for
VRAM or GTT
V4 update to splitted no_wait ttm change
V5 update to new balanced io_mem_reser
This patch update radeon to the new no_wait splitted argument
TTM functionality.
Compile tested only (but thing should run as there is no
operating change from driver point of view)
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c |4 ++--
drivers/gpu/drm/vmwgfx/vmwg
I think i have addressed all concern.
Patch doesn't follow 80colons limit as their was discussion
about dropping that on lkml.
only compile tested on nouveau & vmwgfx.
Sorry for short mail but i wrote a lot longer one which got
lost ... don't feel like rewriting it.
Cheers,
Jerome
---
http://bugs.freedesktop.org/show_bug.cgi?id=25662
--- Comment #13 from Alex Deucher 2010-03-24 00:38:57 PST ---
This is a chipset/bios issue. Your system probably needs a pci quirk to fix or
disable MSIs rather than a blanket disabling of MSIs for rs400s. For
reference:
http://marc.info/?l
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