On Mon, 2003-03-03 at 09:25, Alan Cox wrote:
On early athlon you prefetch non cached memory and the cpu corrupts its
cache, on PII, PII mmap frame buffer against a cached page, but the
right kind of instruction in a loop with the instruction bridging the
two memory types and run it in a tight
On Mon, 2003-03-03 at 00:01, Antonino Daplas wrote:
For some cases. The truth is a bit more horrible, and current fbdev has
the same problem here. Any early Athlon, and almost any PII/PIII derived
chip allows the user to bring the box down if they have access to
a mix of cached and
