[PATCH 0/3] drm/exynos: fimd: get signal polarities from device tree

Hi, This patch series adds signal polarities parsing from display-timings devicetree node. To do it efficiently struct fb_videomode is replaced with struct videomode and some additional code cleaning is performed. The patches are for drm-exynos/exynos-drm-next branch. Regards Andrzej Hajda

[PATCH 1/3] drm/exynos: fimd: replace struct fb_videomode with videomode

The patch replaces all occurrences of struct fb_videomode by more accurate struct videomode. The change allows to remove mode conversion function and simplifies clock divider calculation. Clock configuration is moved to separate function. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed

[PATCH 2/3] drm/exynos: fimd: get signal polarities from device tree

The patch adds code to get signal polarization setting from device tree display-timings node. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 9 + 1 file changed, 9 insertions(+) diff

[PATCH 3/3] drm/exynos: fimd: move platform data parsing to separate function

The patch moves platfrom_data and device tree parsing to separate function. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 63 1 file changed, 31 insertions

Re: [drm/exynos-fimd] Display regression in v3.12-rc1

Hi Sachin, Could you test it with removed display-timings::clock-frequency property. Currently in arch/arm/boot/dts/exynos4210-origen.dts display-timings::clock-frequency is set to 5, this is incorrect value. With the property removed fimd calculates clock-frequency from other properties with

Re: [drm/exynos-fimd] Display regression in v3.12-rc1

); dt-flags = 0; -- With warm regards, Sachin On 18 September 2013 12:18, Andrzej Hajda a.ha...@samsung.com wrote: Hi Sachin, Could you test it with removed display-timings::clock-frequency property. Currently in arch/arm/boot/dts/exynos4210-origen.dts display-timings::clock-frequency

[RFC PATCH 0/4] CDFv3: MIPI DSI bus implementation

- ... Regards Andrzej Andrzej Hajda (4): mipi-dsi-bus: add MIPI DSI bus support mipi-dsi-exynos: add driver panel-s6e8aa0: add driver ARM: dts: exynos4210-trats: add panel and dsi nodes arch/arm/boot/dts/exynos4210-trats.dts | 54 ++ drivers/video/display/Kconfig | 14 + drivers/video

[RFC PATCH 1/4] mipi-dsi-bus: add MIPI DSI bus support

MIPI DSI is a high-speed serial interface to transmit data from/to host to display module. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/video/display/Kconfig| 4 + drivers/video/display/Makefile | 1

[RFC PATCH 2/4] mipi-dsi-exynos: add driver

This patch adds mipi-dsi-bus master driver for Exynos chipset family. Signed-off-by: Tomasz Figa t.f...@samsung.com Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin

[RFC PATCH 3/4] panel-s6e8aa0: add driver

...@samsung.com Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/video/display/Kconfig |6 + drivers/video/display/Makefile|1 + drivers/video/display/panel-s6e8aa0.c | 1286

[RFC PATCH 4/4] ARM: dts: exynos4210-trats: add panel and dsi nodes

The patch adds mipi-dsi-exynos bus master node and s6e8aa0 panel subnode to trats device. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Conflicts: arch/arm/boot/dts/exynos4210-trats.dts --- arch/arm/boot/dts/exynos4210-trats.dts

[PATCH 1/2] video: of: display_timing: correct display-timings node finding

of_get_display_timing(s) use of_find_node_by_name to get child node, this is incorrect, of_get_child_by_name should be used instead. The patch fixes it. Small typo is also corrected. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com

[PATCH 2/2] video: of: display_timing: remove broken of_display_timings_exist

of_display_timings_exist is implemented incorrectly. It tries to find property instead of node. The function is not used anyway so the patch removes it. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/video/of_display_timing.c

[PATCH 0/2] video: of: display_timing: fixes

internal list regardless of the hierarchy, - there is no warranty that child nodes are after parent nodes in this search order, it happens to be true for DT created from FDT, but it is not true for dynamic DT. The second patch just removes unused/broken function. Regards Andrzej Andrzej Hajda

Re: [PATCH/RFC v3 00/19] Common Display Framework

Hi Tomi, On 09/30/2013 03:48 PM, Tomi Valkeinen wrote: On 09/08/13 20:14, Laurent Pinchart wrote: Hi everybody, Here's the third RFC of the Common Display Framework. Hi, I've been trying to adapt the latest CDF RFC for OMAP. I'm trying to gather some notes here about what I've

Re: [PATCH/RFC v3 00/19] Common Display Framework

On 10/02/2013 03:24 PM, Tomi Valkeinen wrote: Hi Andrzej, On 02/10/13 15:23, Andrzej Hajda wrote: Using Linux buses for DBI/DSI = I still don't see how it would work. I've covered this multiple times in previous posts so I'm not going into more details now. I

Re: [RFC PATCH 1/4] mipi-dsi-bus: add MIPI DSI bus support

On 10/07/2013 12:47 PM, Bert Kenward wrote: On Tuesday September 24 2013 at 15:23, Andrzej Hajda wrote: MIPI DSI is a high-speed serial interface to transmit data from/to host to display module. Signed-off-by: Andrzej Hajda a.ha...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p

Re: [PATCH/RFC v3 00/19] Common Display Framework

On 10/11/2013 08:37 AM, Tomi Valkeinen wrote: On 09/10/13 17:08, Andrzej Hajda wrote: As I have adopted existing internal driver for MIPI-DSI bus, I did not take too much care for DT. You are right, 'bta-timeout' is a configuration parameter (however its minimal value is determined

Re: [PATCH/RFC v3 00/19] Common Display Framework

On 10/11/2013 02:30 PM, Tomi Valkeinen wrote: On 11/10/13 14:19, Andrzej Hajda wrote: On 10/11/2013 08:37 AM, Tomi Valkeinen wrote: The minimum bta-timeout should be deducable from the DSI bus speed, shouldn't it? Thus there's no need to define it anywhere. Hmm, specification says

[PATCH v3 17/25] drm/bridge/sii8620: split EDID read and write code

MHL3 requires that after reading EDID from the sink source should ask peer for features. To make both protocols happy the patch splits the code accordingly. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 31 +++

[PATCH v3 13/25] drm/bridge/sii8620: abstract out sink detection code

MHL1 and MHL3 have different initialization paths. To make both protocols happy sink detection is put into continuation after link mode enablement. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 34 +++--- 1 file c

[PATCH v3 20/25] drm/bridge/sii8620: rewrite hdmi start sequence

of appearance of other users of MHL3 infoframes these function can be moved to common library. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 280 +++ drivers/gpu/drm/bridge/sil-sii8620.h | 15 +- 2 files change

[PATCH v3 18/25] drm/bridge/sii8620: fix disconnect sequence

The patch allows to avoid rare cases when discovery fails. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/brid

[PATCH v3 25/25] drm/bridge/sii8620: enable interlace modes

Bug in DECON(CRTC) driver prevented interlace modes from proper work. Since DECON is fixed interlace modes can be enabled in MHL. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/g

[PATCH v3 23/25] drm/bridge/sii8620: add HSIC initialization code

In case of MHL3 HSIC should be initialized. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 38 drivers/gpu/drm/bridge/sil-sii8620.h | 10 ++ 2 files changed, 44 insertions(+), 4 deletions(-) diff

[PATCH v3 14/25] drm/bridge/sii8620: set gen2 write burst before sending MSC command

Write burst should be enabled for MHL_INT_RC_FEAT_REQ and disabled for other commands. The patch moves functions up and adds delay setting for MHL3 burst mode. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.

[PATCH v3 24/25] drm/bridge/sii8620: enable MHL3 mode if possible

Since all sub-protocols of MHL3 are already supported MHL3 mode can be enabled. With this patch it is possible to use packed pixel modes and clocks up to 300MHz - 1920x1080@60Hz and 4K modes. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.

[PATCH v3 16/25] drm/bridge/sii8620: add delay during cbus reset

Without delay CBUS sometimes was not reset properly. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/brid

[PATCH v3 22/25] drm/bridge/sii8620: improve gen2 write burst IRQ routine

The patch adds code to report back feature complete IRQ, and code to read and drop burst writes from peer. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 21 - 1 file changed, 20 insertions(+), 1 deletion(-) diff

[PATCH v3 09/25] drm/bridge/sii8620: fix peer device capabilities read code

Peer capabilities should be read differently depending on protocol version. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/sil-sii862

[PATCH v3 10/25] drm/bridge/sii8620: remove spare CBUS bring-up sequence

In case of MHL3 CBUS is bring-up already in sii8620_got_ecbus_speed. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii

[PATCH v3 21/25] drm/bridge/sii8620: send EMSC features on request

Device should report to the peer which features are really supported. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 27 +++ drivers/gpu/drm/bridge/sil-sii8620.h | 16 2 files changed, 31 insertions(

[PATCH v3 12/25] drm/bridge/sii8620: fix initialization sequence for MHL2 receivers

MHL2 receiver require disabling transmitter on initialization. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/brid

[PATCH v3 03/25] drm/bridge/sii8620: add reading device capability registers

This functionality is necessary to implement MHL3 modes. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/g

Re: [PATCH 4/7] drm/exynos/hdmi: add bridge support

On 01.02.2017 08:44, Inki Dae wrote: > > 2017년 02월 01일 16:34에 Andrzej Hajda 이(가) 쓴 글: >> On 01.02.2017 08:31, Inki Dae wrote: >>> 2017년 01월 20일 15:52에 Andrzej Hajda 이(가) 쓴 글: >>>> In some platforms there is attached another device to the end of HDMI. >>>&g

[PATCH v3 4/7] drm/exynos/hdmi: add bridge support

On TM2/TM2e platforms HDMI output is connected to MHL bridge SiI8620. To allow configure UltraHD modes on the bridge and to eliminate unsupported modes this bridge should be attached to drm_encoder implemented in exynos_hdmi. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/g

Re: [PATCH 4/7] drm/exynos/hdmi: add bridge support

On 01.02.2017 08:31, Inki Dae wrote: > > 2017년 01월 20일 15:52에 Andrzej Hajda 이(가) 쓴 글: >> In some platforms there is attached another device to the end of HDMI. >> The patch adds support for it. > Andrzej, can you clarify what bridge device can be attached and actually is >

[PATCH v3 00/25] drm/bridge/sii8620: add Ultra HD modes support

. v3: - upper-cased enums - add missing include to patch 6 (thanks to kbuild test robot) Regards Andrzej Andrzej Hajda (25): drm/bridge/sii8620: simplify MHL3 mode setting drm/bridge/sii8620: add MHL3 mode check helper drm/bridge/sii8620: add reading device capability registers drm

[PATCH v3 07/25] drm/bridge/sii8620: add support for burst eMSC transmissions

Burst transmissions are used in MHL3 mode negotiation. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 194 ++- drivers/gpu/drm/bridge/sil-sii8620.h | 4 + 2 files changed, 197 insertions(+), 1 deletion(-)

[PATCH v3 05/25] drm/bridge/sii8620: initial support for eCBUS-S mode

The Single-ended eCBUS Mode (eCBUS-S) mode provides 60 Mb/s full-duplex bidirectional traffic for three channels: - CBUS data (CBUS1 channel), - High-bandwidth MHL data (eMSC channel), - tunneling data (T-CBUS channel). It is required to fully support MHL3 dongles. Signed-off-by: Andrzej

[PATCH v3 08/25] drm/bridge/sii8620: respond to feature requests

MHL3 protocol requires device to respond to feature request from peer. This minimal answer fulfills the requirement and allows to continue negotiation. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 4 1 file changed, 4 insertions(+)

[PATCH v3 19/25] drm/bridge/mhl: add MHL3 infoframe related definitions

MHL3 protocol uses vendor specific infoframes to transmit additional information to the sink. This patch adds definitions of structures and constants used to create such frames. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- include/drm/bridge/mhl.

[PATCH v3 01/25] drm/bridge/sii8620: simplify MHL3 mode setting

It is not necessary to set REG_COC_CTL0, REG_MHL_COC_CTL1 registers. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/g

[PATCH v3 04/25] drm/bridge/sii8620: add continuations to messages

after peer responds to given action. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index 7

[PATCH v3 02/25] drm/bridge/sii8620: add MHL3 mode check helper

MHL3 modes differs significantly from MHL1 mode, this helper will be used frequently to clearly distinguish them. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drive

[PATCH v3 15/25] drm/bridge/sii8620: do not stop MHL output when TMDS input is stopped

Stopping output causes full re-detection of the sink and slows down the process. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 13 - 1 file changed, 13 deletions(-) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/g

[PATCH v3 11/25] drm/bridge/sii8620: fix MSC message removal

Messages queue can be cleaned up by message callbacks, to avoid repeated removal of current message it should be removed from the queue before calling these callbacks. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 2 +- 1 file changed, 1 ins

[PATCH v3 06/25] drm/bridge/mhl: add write burst related definitions

Burst transmissions are required in MHL3 modes. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- include/drm/bridge/mhl.h | 53 1 file changed, 53 insertions(+) diff --git a/include/drm/bridge/mhl.h b/include/drm/bridge/mhl.h index 3

Re: [PATCH v8 2/3] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

On 31.01.2017 09:54, Thierry Reding wrote: > On Tue, Jan 31, 2017 at 09:01:07AM +0900, Inki Dae wrote: >> >> 2017년 01월 24일 10:50에 Hoegeun Kwon 이(가) 쓴 글: >>> Dear Thierry, >>> >>> Could you please review this patch? >> Thierry, I think this patch has been reviewed enough but no comment >> from you.

Re: [PATCH v2 19.1/25] drm/bridge/mhl: add MHL3 infoframe related definitions

On 31.01.2017 12:03, Archit Taneja wrote: > > On 01/26/2017 07:20 PM, Andrzej Hajda wrote: >> MHL3 protocol uses vendor specific infoframes to transmit additional >> information to the sink. This patch adds definitions of structures and >> constants used to create such

Re: [v3 PATCH 3/3] drm/amd/display: Switch to using atomic_helper for flip.

Hi Andrey, On 29.01.2017 03:26, Andrey Grodzovsky wrote: > Swicth to use atomic helper. > Start using actual user's given target_vblank value for flip > instead of current value. > > v3: > Update for movig pflip flags to crtc_state > > Change-Id: I25dae6d8c29de5d022a42aa99a18a32674b56cda >

Re: [PATCH v3 3/7] drm/tinydrm: Add MIPI DBI support

On 06.02.2017 12:53, Thierry Reding wrote: > On Mon, Feb 06, 2017 at 01:30:09PM +0200, Jani Nikula wrote: >> On Mon, 06 Feb 2017, Thierry Reding wrote: >>> On Tue, Jan 31, 2017 at 05:03:15PM +0100, Noralf Trønnes wrote: Add support for MIPI DBI compatible

Re: [PATCHv4 1/9] video: add hotplug detect notifier support

ifier at registration time. > > Signed-off-by: Hans Verkuil <hans.verk...@cisco.com> > Tested-by: Marek Szyprowski <m.szyprow...@samsung.com> For patches 1-6: Reviewed-by: Andrzej Hajda <a.ha...@samsung.com> -- Regards Andrzej __

Re: [PATCH v8 2/3] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

On 06.02.2017 11:39, Thierry Reding wrote: > On Fri, Feb 03, 2017 at 09:54:42AM +0100, Andrzej Hajda wrote: >> Hi Thierry, >> >> Finally something technical :) >> >> On 02.02.2017 18:58, Thierry Reding wrote: >>> On Tue, Jan 31, 2017 at 01:05:20PM +0100,

Re: [PATCH v3 08/23] drm: exynos: use vblank hooks in struct drm_crtc_funcs

> > Signed-off-by: Shawn Guo <shawn@linaro.org> > Cc: Inki Dae <inki@samsung.com> Reviewed-by: Andrzej Hajda <a.ha...@samsung.com> -- Regards Andrzej ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH v3 01/23] drm: add vblank hooks to struct drm_crtc_funcs

ffectively > optional, as we provide drm_vblank_no_hw_counter() as the default > fallback in the wrapper function. > > Signed-off-by: Shawn Guo <shawn@linaro.org> Every time I have lurked into vblank code I was wondering why it is not a part of crtc, thanks for clearing it up. Small co

Re: [PATCH v8 2/3] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

On 03.02.2017 09:58, Daniel Vetter wrote: > On Fri, Feb 03, 2017 at 09:54:42AM +0100, Andrzej Hajda wrote: >> Hi Thierry, >> >> Finally something technical :) > Please read Thierry's other response, I think a time-out on this thread > would be good for everyone. &

Re: [PATCH v8 2/3] drm/panel: Add support for S6E3HA2 panel driver on TM2 board

Hi Thierry, Finally something technical :) On 02.02.2017 18:58, Thierry Reding wrote: > On Tue, Jan 31, 2017 at 01:05:20PM +0100, Andrzej Hajda wrote: >> On 31.01.2017 09:54, Thierry Reding wrote: >>> On Tue, Jan 31, 2017 at 09:01:07AM +0900, Inki Dae wrote: >>>>

[PATCH v2 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes

Ultra HD modes requires clock ticking at increased rate. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/

[PATCH v3 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes

Ultra HD modes requires clock ticking at increased rate. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- v2: long lines wrapped v3: moved assigned clocks to cmu_disp node in tm2-common --- arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 12 1 file chang

Re: [PATCH 6/7] drm/exynos/decon5433: signal vblank only on odd fields

On 20.01.2017 14:55, Ville Syrjälä wrote: > On Fri, Jan 20, 2017 at 07:52:24AM +0100, Andrzej Hajda wrote: >> In case of interlace mode irq is generated for odd and even fields, but >> vblank should be signaled only for the last emitted field. > I'm pretty sure most drivers

Re: [PATCH 07/24] drm/bridge/sii8620: add support for burst eMSC transmissions

On 23.01.2017 09:20, Archit Taneja wrote: (...) >> static void sii8620_fetch_edid(struct sii8620 *ctx) >> { >> u8 lm_ddc, ddc_cmd, int3, cbus; >> @@ -1041,7 +1181,7 @@ static int sii8620_wait_for_fsm_state(struct sii8620 >> *ctx, u8 state) >> >> if ((s &

Re: [PATCH 04/24] drm/bridge/sii8620: add continuations to messages

On 23.01.2017 09:31, Archit Taneja wrote: > > On 01/20/2017 01:08 PM, Andrzej Hajda wrote: >> Due to asynchronous nature of MHL flow of execution is dispersed. Logical >> continuation of some actions happens after response of peer, i.e in interrupt >> handler. To simp

Re: [PATCH 19/24] drm/bridge/sii8620: rewrite hdmi start sequence

On 23.01.2017 10:17, Archit Taneja wrote: > > On 01/20/2017 01:08 PM, Andrzej Hajda wrote: >> MHL3 protocol requires registry adjustments depending on chosen video mode. >> Necessary information is gathered in mode_fixup callback. In case of HDMI >> video modes driver shou

Re: [PATCH 17/24] drm/bridge/sii8620: split EDID read and write code

On 24.01.2017 11:31, Archit Taneja wrote: > > On 01/20/2017 01:08 PM, Andrzej Hajda wrote: >> MHL3 requires that after reading EDID from the sink source should ask >> peer for features. To make both protocols happy the patch splits the code >> accordingly. > I was wo

[PATCH v2 19.2/25] drm/bridge/sii8620: rewrite hdmi start sequence

of appearance of other users of MHL3 infoframes these function can be moved to common library. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 280 +++ drivers/gpu/drm/bridge/sil-sii8620.h | 15 +- 2 files change

[PATCH v2 19.1/25] drm/bridge/mhl: add MHL3 infoframe related definitions

MHL3 protocol uses vendor specific infoframes to transmit additional information to the sink. This patch adds definitions of structures and constants used to create such frames. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- include/drm/bridge/mhl.

[PATCH v2 04/25] drm/bridge/sii8620: add continuations to messages

after peer responds to given action. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index 75867c0..c

[PATCH v2 07/25] drm/bridge/sii8620: add support for burst eMSC transmissions

Burst transmissions are used in MHL3 mode negotiation. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 194 ++- drivers/gpu/drm/bridge/sil-sii8620.h | 4 + 2 files changed, 197 insertions(+), 1 deletion(-)

Re: [PATCH v3] drm/edid: Complete CEA modedb(VIC 1-107)

On 30.01.2017 10:42, Sharma, Shashank wrote: > Regards > > Shashank > > > On 1/30/2017 2:52 PM, Andrzej Hajda wrote: >> On 30.01.2017 09:45, Sharma, Shashank wrote: >>> Regards >>> >>> Shashank >>> >>> >>> On 1/30/2017

Re: [PATCH v3] drm/edid: Complete CEA modedb(VIC 1-107)

On 30.01.2017 09:45, Sharma, Shashank wrote: > Regards > > Shashank > > > On 1/30/2017 1:30 PM, Andrzej Hajda wrote: >> On 29.01.2017 06:41, Shashank Sharma wrote: >>> CEA-861-F specs defines new 4k video modes to be used with >>> HDMI 2.0 EDIDs. These mo

Re: [PATCH v3] drm/edid: Complete CEA modedb(VIC 1-107)

ys.com> > Cc: Alex Deucher <alexander.deuc...@amd.com> > Cc: Andrzej Hajda <a.ha...@samsung.com> > > V2: Addressed review comments from Jose: > - fix the timings for VIC 83, 90 and 91 > - fix formatting for VIC 93-107 > > V3: Rebase on drm-tip > > Signed-off-by:

Re: [PATCH 6/7] drm/exynos/decon5433: signal vblank only on odd fields

On 25.01.2017 15:06, Ville Syrjälä wrote: > On Mon, Jan 23, 2017 at 10:15:16AM +0100, Andrzej Hajda wrote: >> On 20.01.2017 14:55, Ville Syrjälä wrote: >>> On Fri, Jan 20, 2017 at 07:52:24AM +0100, Andrzej Hajda wrote: >>>> In case of interlace mode irq is gen

[PATCH] drm/bridge/sii8620: add missing error handling in probe

devm_request_threaded_irq result should be checked for errors. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/bridge/sil-sii8620.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c

[PATCH 3/4] drm/exynos/decon5433: fix vblank event handling

vblank and commit completion events. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 62 +-- include/video/exynos5433_decon.h | 9 2 files changed, 67 insertions(+), 4 deletions(-) diff --git a/d

[PATCH 1/4] drm/exynos: move crtc event handling to drivers callbacks

- it moves event handling to the drivers. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 1 + drivers/gpu/drm/exynos/exynos7_drm_decon.c| 1 + drivers/gpu/drm/exynos/exynos_drm_crtc.c | 29 +++ drivers/g

[PATCH 2/4] drm/exynos: simplify completion event handling

All Exynos CRTC drivers shouldn't fail at referencing vblank events, alternate path is actually dead code. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 17 - 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/d

[PATCH 4/4] drm/exynos/decon5433: signal frame done interrupt at VSYNC

DECON in case of video mode generates interrupt by default at start of vertical back porch. As this interrupt is used to generate VBLANK events more optimal point is start of vertical front porch. Signed-off-by: Andrzej Hajda <a.ha...@samsung.com> --- drivers/gpu/drm/

[PATCH 0/4] drm/exynos: rework vblank handling

it on TM2 panel, TV and both. [1]: https://dri.freedesktop.org/docs/drm/gpu/drm-kms.html?highlight=drm_crtc_state#c.drm_crtc_arm_vblank_event [2]: https://dri.freedesktop.org/docs/drm/gpu/drm-kms.html?highlight=drm_crtc_state#c.drm_crtc_state Regards Andrzej Andrzej Hajda (4): drm/exynos: move

Re: [PATCH v2 2/5] arm64: dts: exynos: Remove the OF graph from DSI node for exynos5433 dts

or the whole patchset: Reviewed-by: Andrzej Hajda <a.ha...@samsung.com> -- Regards Andrzej > --- > arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 16 ++-- > 1 file changed, 2 insertions(+), 14 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos543

Re: [PATCH v2 1/5] drm/exynos: dsi: Fix the parse_dt function

ntly it fixes bad design of early days of of_graph. Reviewed-by: Andrzej Hajda <a.ha...@samsung.com> One comment below. > --- > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 32 > 1 file changed, 8 insertions(+), 24 deletions(-) > > diff --git

Re: [PATCH] drm/exynos: remove unnecessary codes

struct drm_file *file) > { > - struct drm_crtc *crtc; > - > exynos_drm_subdrv_close(dev, file); > - > - list_for_each_entry(crtc, >mode_config.crtc_list, head) > - exynos_drm_crtc_cancel_page_flip(crtc, file); Since this is single user of exynos_drm_crtc_ca

[PATCH v4 0/3] drm/bridge: add Silicon Image SiI8620 driver

Hi Archit, Gently ping. Regards Andrzej On 07.10.2016 09:02, Andrzej Hajda wrote: > Hi Archit, > > In the 4th iteration the only change is relocation of mhl.h file to > include/drm/bridge. > > Regards > Andrzej > > > Andrzej Hajda (3): > video: add header fil

[PATCH v5 3/3] drm/bridge: add Silicon Image SiI8620 driver

Hi Archit, On 26.10.2016 08:01, Archit Taneja wrote: > Hi Andrzej, > > On 10/10/2016 01:09 PM, Andrzej Hajda wrote: >> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0. >> It is controlled via I2C bus. Its interaction with other >> devices in video pipelin

[PATCH] drm/exynos/hdmi: refactor infoframe code

Use core helpers to generate infoframes and generate vendor frame if necessary. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/exynos/exynos_hdmi.c | 141 ++- drivers/gpu/drm/exynos/regs-hdmi.h | 2 + 2 files changed, 42 insertions(+), 101 deletions

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

On 08/31/2016 07:55 PM, ayaka wrote: > > On 08/31/2016 08:30 PM, Andrzej Hajda wrote: >> Hi, >> >> >> On 08/30/2016 12:50 AM, Randy Li wrote: >>> It is actually a lvds panel connected through a rga-lvds bridge. >>> But I really have no idea about

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

On 09/01/2016 10:24 AM, Ayaka wrote: > > 從我的 iPad 傳送 > Thank you >> Andrzej Hajda 於 2016年9月1日 下午3:04 >> 寫道： >> >>> On 08/31/2016 07:55 PM, ayaka wrote: >>> >>>> On 08/31/2016 08:30 PM, Andrzej Hajda wrote:

[PATCH, RESEND] drm: exynos: avoid unused function warning

gned-off-by: Arnd Bergmann Reviewed-by: Andrzej Hajda -- Regards Andrzej

[PATCH 2nd RESEND v2 2/3] dt-bindings: add Silicon Image SiI8620 bridge bindings

SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0. It is controlled via I2C bus. Signed-off-by: Andrzej Hajda Acked-by: Rob Herring --- .../bindings/video/bridge/sil-sii8620.txt | 33 ++ 1 file changed, 33 insertions(+) create mode 100644 Documentation

[PATCH 2nd RESEND v2 0/3] drm/bridge: add Silicon Image SiI8620 driver

in multiple mobile devices. I have put common MHL definitions into include/linux/mhl.h header file, similarily to include/linux/hdmi.h. Regards Andrzej Andrzej Hajda (3): video: add header file for Mobile High-Definition Link (MHL) interface dt-bindings: add Silicon Image SiI8620 bridge bindings

[PATCH 2nd RESEND v2 3/3] drm/bridge: add Silicon Image SiI8620 driver

interface to perform this operation. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/bridge/Kconfig |7 + drivers/gpu/drm/bridge/Makefile |1 + drivers/gpu/drm/bridge/sil-sii8620.c | 1568 ++ drivers/gpu/drm/bridge/sil-sii8620.h | 1517

[PATCH 2nd RESEND v2 1/3] video: add header file for Mobile High-Definition Link (MHL) interface

This header adds definitions specific to MHL protocol. Signed-off-by: Andrzej Hajda --- include/linux/mhl.h | 292 1 file changed, 292 insertions(+) create mode 100644 include/linux/mhl.h diff --git a/include/linux/mhl.h b/include/linux

[RFC PATCH] drm/exynos: fix pending update handling

ter approach? Thanks for pinging the problem. As the patch changes exynos-drm core, it can influence all exynos crtc drivers. These drivers requires review and testing. I will look at them to verify if the patch does not introduce regression. Regards Andrzej > > With best wishes, > To

[PATCH] drm/exynos: mark exynos_dp_crtc_clock_enable() static

e file in which it is > declared and don't need a declaration, but can be made static. > So this patch marks it 'static'. > > Signed-off-by: Baoyou Xie Reviewed-by: Andrzej Hajda -- Regards Andrzej

[RFC 1/2] drm/exynos: mixer: convert booleans to flags in mixer context

Jakobi Reviewed-by: Andrzej Hajda -- Regards Andrzej

[RFC 2/2] drm/exynos: mixer: configure layers once in mixer_atomic_flush()

On 19.09.2016 16:16, Tobias Jakobi wrote: > Only manipulate the MXR_CFG and MXR_LAYER_CFG registers once > in mixer_cfg_layer(). > Trigger this via atomic flush. > > Signed-off-by: Tobias Jakobi > --- > drivers/gpu/drm/exynos/exynos_mixer.c | 104 > ++ >

[RFC 2/2] drm/exynos: mixer: configure layers once in mixer_atomic_flush()

On 20.09.2016 13:23, Tobias Jakobi wrote: > Hello Andrzej, > > first of all, I've noticed an error myself. mixer_disable() calls > mixer_disable_plane(), so it should also be modified. I'll send a v2 later. > > Now to your points... > > > Andrzej Hajda wrote: >> O

[RFC 2/2] drm/exynos: mixer: configure layers once in mixer_atomic_flush()

On 20.09.2016 14:34, Andrzej Hajda wrote: > On 20.09.2016 13:23, Tobias Jakobi wrote: >> Hello Andrzej, >> >> first of all, I've noticed an error myself. mixer_disable() calls >> mixer_disable_plane(), so it should also be modified. I'll send a v2 late

[RFC 2/2] drm/exynos: mixer: configure layers once in mixer_atomic_flush()

On 20.09.2016 16:09, Tobias Jakobi wrote: > Hi Andrzej, > > > Andrzej Hajda wrote: >> On 20.09.2016 14:34, Andrzej Hajda wrote: >>> On 20.09.2016 13:23, Tobias Jakobi wrote: >>>> Hello Andrzej, >>>> >>>> first of all, I've noticed

drm/exynos: probe deferral for sub drivers

On 21.09.2016 00:07, Tobias Jakobi wrote: > Hello, > > I'm currently facing the following problem. > > I want to use a devfreq device in one of the Exynos sub drivers, namely > the G2D sub driver. My current approach is to use > devfreq_get_devfreq_by_phandle() in g2d_probe(). But at the G2D

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