Il giorno lun 23 set 2019 alle ore 20:23 Rob Clark
ha scritto:
>
> On Mon, Sep 23, 2019 at 10:27 AM AngeloGioacchino Del Regno
> wrote:
> >
> > Il giorno lun 23 set 2019 alle ore 18:37 Rob Clark
> > ha scritto:
> > >
> > > On Sat, Sep 21, 2019 at 3:
Il giorno lun 23 set 2019 alle ore 18:37 Rob Clark
ha scritto:
>
> On Sat, Sep 21, 2019 at 3:04 AM wrote:
> >
> > From: "Angelo G. Del Regno"
> >
> > The Adreno 510 GPU is a stripped version of the Adreno 5xx,
> > found in low-end SoCs like 8x56 and 8x76, which has 256K of
> > GMEM, with no
Il giorno lun 23 set 2019 alle ore 02:45 Jeffrey Hugo
ha scritto:
>
> On Sun, Sep 22, 2019 at 8:16 AM wrote:
> >
> > From: "Angelo G. Del Regno"
> >
> > Some SoCs, like MSM8956/8976 (and APQ variants), do feature these
> > clocks and we need to enable them in order to get the hardware to
> >
prescaler-ON and OFF cases were tested.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
b/drivers/gpu/drm/msm/dsi/pll
The number of fractional registers bits is known and already set in
the frac_bits variable of the dsi_pll_config struct here in 10nm:
remove the TODO by simply using that variable.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 ++--
1 file changed
and disable the feature when
preparing for cmd commit: instead of disabling it when initializing
the command mode, this road was chosen as to open future possibility
of enabling and managing the autorefresh feature in the driver.
Signed-off-by: AngeloGioacchino Del Regno
---
.../drm/msm/disp/dpu1
-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index c5cf59b5bd41
function is called: in this case, so,
if the CTL was already running, we can say that the commit is done
if the command transmission is complete (in other terms, if the
interface has been flushed).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
Not all DPU versions that are supported in this driver are supposed
to have a 8-Levels VIG QoS setting.
Move this flag to SDM845 and SC7180 specific masks.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
1 file changed, 3 insertions
The PLL_LOCKDET_RATE_1 was being programmed with a hardcoded value
directly, but the same value was also being specified in the
dsi_pll_regs struct pll_lockdet_rate variable: let's use it!
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 3 ++-
1 file
SI display on at least MSM8998.
This patch series fixes the calculation issues and also solves some TODOs
that I've found in this driver.
Tested on:
- Sony Xperia XZ Premium (MSM8998) dual-dsi command-mode LCD display
- F(x)Tec Pro1 (MSM8998) single dsi, video-mode OLED display
AngeloGioacchino Del Regno
probably will also be needed
for future SoCs.
Signed-off-by: AngeloGioacchino Del Regno
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 24 +--
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm
number is also used in the a5xx_power.c
function a540_lm_setup to disable the battery current limiter,
which makes faking the Adreno patchid to .2 (which would anyway
be sad) useless and even producing breakages.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno
On DPUs prior to version 4 the VBIF_XINL_QOS_LVL_REMAP_000 register
is at 0x570 offset from vbif base instead of 0x590, due to the
VBIF_XINL_QOS_RP_REMAP_000 having less instances (less possible XINs).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
Add a function that returns whether the requested CTL is active or not:
this will be used in a later commit to fix command mode panel issues.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 7
that we miss one
external TE signal: this will still trigger recovery mechanisms in
case the display is really unreachable.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git
the feature mask and the sblk config for
each DSPP.
Fixes: 4259ff7ae509 ("drm/msm/dpu: add support for pcc color block in dpu
driver")
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 9 +
1 file changed, 5 insertions(+), 4 deletion
to get the remainder and *then*
call div_u64 to get the division result, as the first is already
giving that result: let's fix it by just caring about the result
of div_u64_rem.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 +---
1 file changed, 1
DRM_DEV_ERROR should be used across this entire source: convert the
pr_err prints to the first as a cleanup.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
hw-catalog is not included in this series, as it needs to be cleaned
up a little more) and specifically on:
- Sony Xperia XZ Premium (MSM8998), 4K dual-dsi LCD display, command-mode
- F(x)Tec Pro1 (MSM8998), single-dsi OLED display, video-mode
... And it obviously worked just perfect!
AngeloGioacchino De
From: Konrad Dybcio
Port over the command from downstream to prevent undefined
behaviour.
Signed-off-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/a5xx.xml.h | 2 ++
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
2 files changed, 5 insertions
to reflect new ones
- Tested on F(x)Tec Pro1 and Xperia XZ Premium (MSM8998)
Changes in v2:
- Define REG_A5XX_UCHE_MODE_CNTL and fix open-coded
REG_A5XX_VPC_DBG_ECO_CNTL in the all flat shading optimization
disablement commit, as requested by Rob Clark.
AngeloGioacchino Del Regno (4):
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 81506d2539b0..8c96fc0fc1b7 100644
---
configuration (including the GPU-specific quirks) and that is
effectively nullifying the efforts.
Let's remove the redundant and wrong write to the PC_DBG_ECO_CNTL
register in order to retain the wanted configuration for the
target GPU.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jordan Crouse
^4) fixes
the issue.
Signed-off-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index
bad
slownesses after processing the first frame.
Avoiding to execute the RBBM SW Reset before suspend will stop the
lockup issue from happening on at least Adreno 508/509/512.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8
From: Konrad Dybcio
Port over the command from downstream to prevent undefined
behaviour.
Signed-off-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno
The Adreno 508/509/512 GPUs are stripped versions of the Adreno
5xx found in the mid-end SoCs such as SDM630, SDM636, SDM660 and
SDA variants; these SoCs are usually provided with ZAP firmwares,
but they have no available GPMU.
Signed-off-by: AngeloGioacchino Del Regno
Tested-by: Martin Botka
2.039337] msm_fbdev_init+0x80/0xe0
[2.039735] msm_drm_bind+0x4d8/0x6d0
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/drm_modes.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 33fb2f05ce66..dd
-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index 665eb1d4cb8a
ed patches "drm/msm/dpu: Add a function to retrieve the current CTL
status"
and "drm/msm/dpu: Fix timeout issues on command mode panels" as the
second patch was wrong.
- Fixed patch apply issues on latest linux-next and 5.11-rcX
AngeloGioacchino Del
Not all DPU versions that are supported in this driver are supposed
to have a 8-Levels VIG QoS setting.
Move this flag to SDM845 and SC7180 specific masks.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
1 file changed, 3 insertions
Il 09/01/21 14:37, AngeloGioacchino Del Regno ha scritto:
In function dpu_encoder_phys_cmd_wait_for_commit_done we are always
checking if the relative CTL is started by waiting for an interrupt
to fire: it is fine to do that, but then sometimes we call this
function while the CTL is up and has
that we miss one
external TE signal: this will still trigger recovery mechanisms in
case the display is really unreachable.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git
and disable the feature when
preparing for cmd commit: instead of disabling it when initializing
the command mode, this road was chosen as to open future possibility
of enabling and managing the autorefresh feature in the driver.
Signed-off-by: AngeloGioacchino Del Regno
---
.../drm/msm/disp/dpu1
the feature mask and the sblk config for
each DSPP.
Fixes: 4259ff7ae509 ("drm/msm/dpu: add support for pcc color block in dpu
driver")
Signed-off-by: AngeloGioacchino Del Regno
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 19 ---
1 file changed, 12 insertions(+), 7
probably will also be needed
for future SoCs.
Signed-off-by: AngeloGioacchino Del Regno
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 24 +--
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm
On DPUs prior to version 4 the VBIF_XINL_QOS_LVL_REMAP_000 register
is at 0x570 offset from vbif base instead of 0x590, due to the
VBIF_XINL_QOS_RP_REMAP_000 having less instances (less possible XINs).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
Document the boe,bf060y8m-aj0 panel.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/panel/boe,bf060y8m-aj0.yaml | 67 +++
1 file changed, 67 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/boe,bf060y8m-aj0.yaml
diff --git
This adds support for the BOE BF060Y8M-AJ0 5.99" AMOLED module
that can be found in some F(x)Tec Pro1 and Elephone U1 devices.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gp
Il 31/01/21 20:50, Rob Clark ha scritto:
On Sat, Jan 9, 2021 at 5:51 AM AngeloGioacchino Del Regno
wrote:
The VCO rate was being miscalculated due to a big overlook during
the process of porting this driver from downstream to upstream:
here we are really recalculating the rate of the VCO
Il 02/02/21 19:45, Rob Clark ha scritto:
On Tue, Feb 2, 2021 at 6:32 AM AngeloGioacchino Del Regno
wrote:
Il 01/02/21 18:31, Rob Clark ha scritto:
On Mon, Feb 1, 2021 at 9:18 AM Rob Clark wrote:
On Mon, Feb 1, 2021 at 9:05 AM Rob Clark wrote:
On Mon, Feb 1, 2021 at 7:47 AM Rob Clark
Il 01/02/21 18:31, Rob Clark ha scritto:
On Mon, Feb 1, 2021 at 9:18 AM Rob Clark wrote:
On Mon, Feb 1, 2021 at 9:05 AM Rob Clark wrote:
On Mon, Feb 1, 2021 at 7:47 AM Rob Clark wrote:
On Mon, Feb 1, 2021 at 2:11 AM AngeloGioacchino Del Regno
wrote:
Il 31/01/21 20:50, Rob Clark ha
k_bit = 0x3, /* TODO: 2 for LP_DDR4 */
.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
OK on Xperia 5 II (SM8250)
Reviewed-by: AngeloGioacchino Del Regno
Il gio 8 apr 2021, 21:05 Rob Clark ha scritto:
> On Wed, Apr 7, 2021 at 12:11 PM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 07/04/21 20:19, abhin...@codeaurora.org ha scritto:
> > > Hi Marijn
> > >
> > > On 2021-04-06 14:47, Marijn Suijten wro
e block really needs
recovery, this "trick" won't save anyone and the recovery will anyway be
triggered, as the PP-done will anyway timeout.
Suggested-by: AngeloGioacchino Del Regno
Signed-off-by: Marijn Suijten
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dis
the DSI
PHYs")
Signed-off-by: Marijn Suijten
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 4 +++-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 4 +++-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 4 +++-
drivers/gpu/drm/msm/dsi/
e.org/
and prevented the removal of "xo" at that time.
Signed-off-by: Marijn Suijten
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/clk/qcom/gcc-sdm660.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/g
Il 09/09/21 15:46, Dmitry Baryshkov ha scritto:
On 08/09/2021 17:22, Jeffrey Hugo wrote:
On Wed, Sep 8, 2021 at 2:26 AM Dmitry Baryshkov
wrote:
Hi,
On Tue, 7 Sept 2021 at 22:13, Jeffrey Hugo wrote:
On Wed, Sep 1, 2021 at 12:11 PM AngeloGioacchino Del Regno
wrote:
Bringup functionality
an input image to the panel's native
resolution, for example it can upscale a 1920x1080 input to 3840x2160 with
either bilinear interpolation or pixel duplication.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/panel/novatek,nt35950.yaml| 106 ++
1 file changed, 106
Add a driver for panels using the Novatek NT35950 Display Driver IC,
including support for the Sharp LS055D1SX04, found in some Sony Xperia
Z5 Premium and XZ Premium smartphones.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu
Document the boe,bf060y8m-aj0 panel.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/panel/boe,bf060y8m-aj0.yaml | 81 +++
1 file changed, 81 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/boe,bf060y8m-aj0.yaml
diff --git
This adds support for the BOE BF060Y8M-AJ0 5.99" AMOLED module
that can be found in some F(x)Tec Pro1 and Elephone U1 devices.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gp
Add a function that returns whether the requested CTL is active or not:
this will be used in a later commit to fix command mode panel issues.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 7
function is called: in this case, so,
if the CTL was already running, we can say that the commit is done
if the command transmission is complete (in other terms, if the
interface has been flushed).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
The enum dpu_clk_ctrl_type misses DPU_CLK_CTRL_DMA{2,3} even though
this driver does actually handle both, if present: add the two in
preparation for adding support for SoCs having them.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
1 file
Bringup functionality for MSM8998 in the DPU, driver which is mostly
the same as SDM845 (just a few variations).
Signed-off-by: AngeloGioacchino Del Regno
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 335 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
drivers
Add yaml binding for msm8998 dpu1 support.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/display/msm/dpu-msm8998.yaml | 220 ++
1 file changed, 220 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
diff --git
Il 10/09/21 23:48, Marijn Suijten ha scritto:
Hi Angelo!
On 2021-09-01 19:43:47, AngeloGioacchino Del Regno wrote:
In function dpu_encoder_phys_cmd_wait_for_commit_done we are always
checking if the relative CTL is started by waiting for an interrupt
to fire: it is fine to do
function is called: in this case, so,
if the CTL was already running, we can say that the commit is done
if the command transmission is complete (in other terms, if the
interface has been flushed).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
Add a function that returns whether the requested CTL is active or not:
this will be used in a later commit to fix command mode panel issues.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 7
: Fix dividing the same numbers
twice").
Signed-off-by: Marijn Suijten
---
Changes in v2:
- Corrected two typos in the first commit-message sentence.
Reviewed-By: AngeloGioacchino Del Regno
Adds irq interface for multi hardware.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 33 +--
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 25 ++
For lat and core architecture, lat thread will send message to core
thread when lat decode done. Core hardware will use the message
from lat to decode, then free message to lat thread when decode done.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
Use the dma_set_mask_and_coherent helper to set vdec
DMA bit mask to support 34bits iova space(16GB) that
the mt8192 iommu HW support.
Whole the iova range separate to 0~4G/4G~8G/8G~12G/12G~16G,
regarding which iova range VDEC actually locate, it
depends on the dma-ranges property of vdec dtsi
Manage each hardware information which includes irq/power/clk.
The hardware includes LAT0, LAT1 and CORE.
Signed-off-by: Yunfei Dong
---
v7: Using of_platform_populate not component framework to manage multi hardware.
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
vcodec/mtk_vcodec_dec_stateful.c
> @@ -623,4 +623,5 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8173_pdata = {
> .num_framesizes = NUM_SUPPORTED_FRAMESIZE,
> .worker = mtk_vdec_worker,
> .flush_decoder = mtk_vdec_flush_decoder,
> +.is_comp_supported = false,
> };
> diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c
> index 8f4a1f0a0769..762633572b49 100644
> --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c
> +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c
> @@ -357,4 +357,5 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8183_pdata = {
> .uses_stateless_api = true,
> .worker = mtk_vdec_worker,
> .flush_decoder = mtk_vdec_flush_decoder,
> +.is_comp_supported = false,
component is not supported anywhere, since you've switched away from it?!
> };
> diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
> index 973b0b3649c6..ec3850b4c638 100644
> --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
> +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
> @@ -93,6 +93,17 @@ enum mtk_fmt_type {
> MTK_FMT_FRAME = 2,
> };
> +/**
> + * struct mtk_vdec_hw_id - Hardware index used to separate
> + * different hardware
> + */
> +enum mtk_vdec_hw_id {
> +MTK_VDEC_CORE,
> +MTK_VDEC_LAT0,
> +MTK_VDEC_LAT1,
> +MTK_VDEC_HW_MAX,
> +};
> +
> /*
>* struct mtk_video_fmt - Structure used to store information about
pixelformats
>*/
> @@ -331,6 +342,7 @@ enum mtk_chip {
>*
>* @chip: chip this decoder is compatible with
>*
> + * @is_comp_supported: true: using compoent framework, false: not support
>* @uses_stateless_api: whether the decoder uses the stateless API with
requests
>*/
> @@ -352,6 +364,7 @@ struct mtk_vcodec_dec_pdata {
> enum mtk_chip chip;
> +bool is_comp_supported;
Adding this member looks useless: there's nothing declaring is_comp_supported as
true... not here, not in any other patch of this entire series!
Regards,
- Angelo
--
AngeloGioacchino Del Regno
Software Engineer
Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
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For add new hardware, not only need to lock lat hardware, also
need to lock core hardware in case of different instance start
to decoder at the same time.
Signed-off-by: Yunfei Dong
---
Reviewed-By: AngeloGioacchino Del Regno
Core thread:
1. Gets lat_buf from core msg queue.
2. Proceeds core decode.
3. Puts the lat_buf back to lat msg queue.
Both H264 and VP9 rely on the core thread.
Signed-off-by: Yunfei Dong
I would be happier to see a better commit message, for example:
"Introduce a core thread, responsible
---
.../media/platform/mtk-vcodec/vdec_vpu_if.h | 4 +++
3 files changed, 41 insertions(+), 9 deletions(-)
Reviewed-By: AngeloGioacchino Del Regno
Il 11/10/21 09:02, Yunfei Dong ha scritto:
Vdec and venc can use the same function to wake up interrupt event.
Reviewed-by: Tzung-Bi Shih
Signed-off-by: Yunfei Dong
Reviewed-By: AngeloGioacchino Del Regno
Separates different architecture for hardware: pure_sin_core
and lat_sin_core. MT8183 is pure single core. Uses .hw_arch to
distinguish.
Signed-off-by: Yunfei Dong
Acked-By: AngeloGioacchino Del Regno
Generalizes power and clock on/off interfaces to support different hardware.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 4 +
++
3 files changed, 34 insertions(+)
Reviewed-By: AngeloGioacchino Del Regno
---
.../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 5 +++--
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 1 -
.../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 1 -
5 files changed, 15 insertions(+), 20 deletions(-)
Acked-By: AngeloGioacchino Del Regno
Il 21/09/21 17:52, jason-jh.lin ha scritto:
Add MERGE engine file:
MERGE module is used to merge two slice-per-line inputs
into one side-by-side output.
Signed-off-by: jason-jh.lin
---
rebase on series [1]
[1] drm/mediatek: add support for mediatek SOC MT8192
-
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 136 +
drivers/soc/mediatek/mtk-mmsys.c | 10 ++
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
3
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements,
so change it to support multi-bit control.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c | 296
Add mt8195 vdosys0 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] soc: mediatek: mmsys: add mt8192 mmsys support
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=524857
The vdosys1
Il 04/10/21 08:21, Nancy.Lin ha scritto:
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
---
MT8195 vdosys1 merge1 to merge4 have HW mute function.
Add MERGE additional mute property description.
Signed-off-by: Nancy.Lin
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4
1 file changed, 4 insertions(+)
Acked-By: AngeloGioacchino Del Regno
Convert the Toshiba TC358767 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Rob Herring
---
.../display/bridge/toshiba,tc358767.txt | 54
.../display/bridge/toshiba,tc358767.yaml | 118 ++
2 files changed, 118 insertions
Convert the Toshiba TC358764 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
Note: dtbs_check on exynos5250-arndale.dts will give some warnings after
applying this patch: since the preferred way is to have 'ports',
this warning was ignored.
I have
Convert the Silicon Image SiI8620 HDMI/MHL bridge documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/display/bridge/sil,sii8620.yaml | 93 +++
.../bindings/display/bridge/sil-sii8620.txt | 33 ---
2 files changed, 93 insertions(+), 33
Convert the Silicon Image SiI9234 HDMI/MHL bridge documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/display/bridge/sii9234.txt | 49
.../bindings/display/bridge/sil,sii9234.yaml | 110 ++
2 files changed, 110 insertions(+), 49
Convert the Toshiba TC358767 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/bridge/toshiba,tc358767.txt | 54
.../display/bridge/toshiba,tc358767.yaml | 118 ++
2 files changed, 118 insertions(+), 54 deletions
Convert the Toshiba TC358764 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/bridge/toshiba,tc358764.txt | 35 ---
.../display/bridge/toshiba,tc358764.yaml | 94 +++
2 files changed, 94 insertions(+), 35 deletions(-)
delete
Convert the Silicon Image SiI8620 MIPI-DSI to LVDS bridge documentation
to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/display/bridge/sil,sii8620.yaml | 96 +++
.../bindings/display/bridge/sil-sii8620.txt | 33 ---
2 files changed, 96 insertions
Convert the Parade PS8622 eDP/DP to LVDS bridge documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/bridge/parade,ps8622.yaml | 102 ++
.../bindings/display/bridge/ps8622.txt| 31 --
2 files changed, 102 insertions(+), 31
Convert the NXP PTN3460 eDP to LVDS bridge documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/display/bridge/nxp,ptn3460.yaml | 106 ++
.../bindings/display/bridge/ptn3460.txt | 39 ---
2 files changed, 106 insertions(+), 39 deletions
some bind/unbind functions around drm/msm,
as some of them are using drm_device just to grab a pointer to the
msm_drm_private structure, which we now retrieve in one call.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 16 +++-
drivers/gpu/drm/msm
irq domain is registered everytime we call bind() on msm_pdev, add
a new *remove function pointer to msm_mdss_funcs, used to remove the
irq domain only at msm_pdev_remove() time.
Fixes: 8f59ee9a570c ("drm/msm/dsi: Adjust probe order")
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/g
most of the already present logic in place.
AngeloGioacchino Del Regno (2):
drm/msm: Allocate msm_drm_private early and pass it as driver data
drm/msm: Initialize MDSS irq domain at probe time
drivers/gpu/drm/msm/adreno/adreno_device.c | 16 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Il 24/12/21 09:21, Miaoqian Lin ha scritto:
The of_device_get_match_data() function may return NULL.
Add check to prevent potential null dereference.
Signed-off-by: Miaoqian Lin
Reviewed-by: AngeloGioacchino Del Regno
Switch to using the generic regmap API instead of calls to readl/writel
for MMIO register access, removing custom crafted update/set/clear_bits
functions and also allowing us to reduce code size.
Signed-off-by: AngeloGioacchino Del Regno
---
.../phy/mediatek/phy-mtk-mipi-dsi-mt8173.c| 45
.
For this reason, move the inclusions to each file and remove unused ones.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c | 4
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c | 4
drivers/phy/mediatek/phy-mtk-mipi-dsi.c| 7
Use the dev_err_probe() helper to simplify error handling during probe.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 29 +
1 file changed, 10 insertions(+), 19 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
Switch to using the generic regmap API instead of calls to readl/writel
for MMIO register access, removing custom crafted update/set/clear_bits
functions and also allowing us to reduce code size.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c | 165
Forward declarations for mtk_hdmi_power_{on,off} aren't necessary:
move mtk_hdmi_phy_dev_ops down to remove forward declarations.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-hdmi.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git
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