Re: [PATCH v2] drm/mediatek: Support UYVY and YUYV format for overlay

Hi, Daniel, Thanks for your comment. On Tue, 2017-01-03 at 14:27 +0800, Daniel Kurtz wrote: > On Fri, Dec 30, 2016 at 2:26 PM, Bibby Hsieh <bibby.hs...@mediatek.com> wrote: > > > > MT8173 overlay can support UYVY and YUYV format, > > we add the format in DRM driver. &

[PATCH v3] drm/mediatek: Support UYVY and YUYV format for overlay

MT8173 overlay can support UYVY and YUYV format, we add the format in DRM driver. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org> --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 7 +++ drivers/gpu/drm/mediatek/mtk_drm_plane

[PATCH] drm/mediatek: hdmi: Filter interlaced resolutions

Current Mediatek DRM driver does not support interlaced mode, and will hang if such resolution is used: Filter those to prevent kernel hangs, until the DRM driver is fixed properly. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_hdmi.c | 2 ++

[PATCH v2] drm/mediatek: fix a typo

org # v4.9+ Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index df33b3c..aa5f20f 100644 --- a/drivers/gpu/dr

[PATCH v5 0/3] MT8173 HDMI 4K support

This is MT8173 HDMI 4K support PATCH v5, based on 4.8-rc1. In order to support HDMI 4K on MT8173, we have to make some modifications. 1) Make sure that mtk_hdmi_send_infoframe is sent successfully. 2) Enhance the HDMI driving current to improve performance. 3) Make sure that pixel clock is 297MHz

[PATCH v5 3/3] drm/mediatek: modify the factor to make the pll_rate set in the 1G-2G range

t to a invalid value( > 2G), then the "pll" will be 2GHz, thus the pixel clock will be in correct. Change the factor to make the "pll" be set in the (1G, 2G) range. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_dpi.c |9 +++-- 1 file cha

[PATCH v5 2/3] drm/mediatek: enhance the HDMI driving current

From: Junzhi Zhao <junzhi.z...@mediatek.com> In order to improve 4K resolution performance, we have to enhance the HDMI driving current when clock rate is greater than 165MHz. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

[PATCH v5 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

From: Junzhi Zhao <junzhi.z...@mediatek.com> The mtk_hdmi_send_infoframe have to be run after PLL and PIXEL clock of HDMI enable. Make sure that HDMI inforframes can be sent successfully. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_hdmi.c

[PATCH] drm/mediatek: fix a typo

Fix the typo: OD_RELAYMODE->OD_CFG Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index df33b3c..aa5f

[PATCH 2/2] drm/mediatek: clear IRQ status before enable OVL interrupt

To make sure that the first vblank IRQ after enabling vblank isn't too short or immediate, we have to clear the IRQ status before enable OVL interrupt. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c |1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm

[PATCH 0/2] fix issue: vblank interrupts are never disabled

Clean the interrupt status before enable interrupt and set the vblank_disable_allowed to fix the issue. Bibby Hsieh (2): drm/mediatek: set vblank_disable_allowed to true drm/mediatek: clear IRQ status before enable OVL interrupt drivers/gpu/drm/mediatek/mtk_disp_ovl.c |1 + drivers/gpu

[PATCH 1/2] drm/mediatek: set vblank_disable_allowed to true

MTK DRM driver didn't set the vblank_disable_allowed to true, it cause that the irq_handler is called every 16.6 ms (every vblank) when the display didn't be updated. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_drv.c |1 + 1 file changed, 1 insertion(+) diff --git

[PATCH] drm/mediatek: fix a typo

On Thu, 2016-09-29 at 10:46 +0200, Matthias Brugger wrote: > > On 29/09/16 06:01, CK Hu wrote: > > Acked-by: CK Hu > > > > On Thu, 2016-09-29 at 11:22 +0800, Bibby Hsieh wrote: > >> Fix the typo: OD_RELAYMODE->OD_CFG > >> > Hi, Matthias Thanks fo

[PATCH 8/9] drm/mediatek: Use drm_plane_helper_check_state()

the driver > respect any user configured src coordinates, so panning and such would > have been totally broken. It should be all good now. > > Cc: CK Hu > Cc: linux-mediatek at lists.infradead.org > Signed-off-by: Ville Syrjälä This patch looks fine to me, thanks for your patch.

[PATCH 5/7] drm/mediatek: plane: Merge mtk_plane_enable into mtk_plane_atomic_update

On Tue, 2016-08-02 at 13:04 -0400, Sean Paul wrote: > On Tue, Aug 2, 2016 at 1:02 PM, Sean Paul wrote: > > On Fri, Jul 29, 2016 at 5:04 AM, Bibby Hsieh > > wrote: > >> From: Daniel Kurtz > >> > >> The mtk_plane_enable is just called once

[PATCH v3 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

From: Junzhi Zhao <junzhi.z...@mediatek.com> The mtk_hdmi_send_infoframe have to be run after PLL and PIXEL clock of HDMI enable. Make sure that HDMI inforframes can be sent successfully. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_hdmi.c

[PATCH v3 3/3] drm/mediatek: fix the wrong pixel clock when resolution is 4K

From: Junzhi Zhao <junzhi.z...@mediatek.com> Pixel clock should be 297MHz when resolution is 4K. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_dpi.c |8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/me

[PATCH v3 2/3] drm/mediatek: enhance the HDMI driving current

From: Junzhi Zhao <junzhi.z...@mediatek.com> In order to improve 4K resolution performance, we have to enhance the HDMI driving current when clock rate is greater than 165MHz. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

[PATCH v3 0/3] MT8173 HDMI 4K support

This is MT8173 HDMI 4K support PATCH v3, based on 4.7-rc1. In order to support HDMI 4K on MT8173, we have to make some modifications. 1) Make sure that mtk_hdmi_send_infoframe is sent successfully. 2) Enhance the HDMI driving current to improve performance. 3) Make sure that pixel clock is 297MHz

[PATCH v2 4/7] drm/mediatek: Use drm_atomic destroy_state helpers

Use the core destroy_state helpers to destroy core state to ensure we don't leak if/when more fields get added later. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |3 +-- drivers/gpu/drm/mediatek/mtk_drm_plane.c |3 +-- 2 files

[PATCH v2 1/7] drm/mediatek: Remove mtk_drm_crtc_check_flush

From: Daniel Kurtz <djku...@chromium.org> This function no longer exists. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/g

[PATCH v2 0/7] drm/mediatek: cleaning up and refine

Add drm_plane_helper_check_state()) - https://patchwork.kernel.org/patch/9248361/ (drm/mediatek: Use drm_plane_helper_check_state()) Bibby Hsieh (2): drm/mediatek: Use drm_atomic destroy_state helpers drm/mediatek: Fix mtk_atomic_complete for runtime_pm Daniel Kurtz (5): drm/mediatek: Re

[PATCH v2 5/7] drm/mediatek: plane: Merge mtk_plane_enable into mtk_plane_atomic_update

From: Daniel Kurtz <djku...@chromium.org> The mtk_plane_enable is just called once by mtk_plane_atomic_update. So, merge mtk_plane_enable into mtk_plane_atomic_update. While we are here, also clean up the function a bit by using an fb local variables. Signed-off-by: Bibby Hsieh Sign

[PATCH v2 6/7] drm/mediatek: plane: Use FB's format's cpp to compute x offset

From: Daniel Kurtz <djku...@chromium.org> Use the framebuffer's format to compute its cpp, and use it when calculating the address shift value. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_plane.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/d

[PATCH v2 3/7] drm/mediatek: Remove mtk_drm_plane

From: Daniel Kurtz <djku...@chromium.org> Now that mtk_drm_plane just contains its base struct drm_plane, we can just remove it and use struct drm_plane everywhere. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c

[PATCH v2 2/7] drm/mediatek: plane: Remove plane zpos/index

From: Daniel Kurtz <djku...@chromium.org> It is not actually useful to a mtk plane to know its zpos/index, so just remove this field. This let's completely remove struct mtk_drm_plane in a follow up patch. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/me

[PATCH v2 7/7] drm/mediatek: Fix mtk_atomic_complete for runtime_pm

with updates on disabled CRTCs, for example when supporting runtime PM. Signed-off-by: Bibby Hsieh Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b

[PATCH v3 3/3] drm/mediatek: fix the wrong pixel clock when resolution is 4K

Hi, Philipp, On Thu, 2016-08-11 at 09:15 +0200, Philipp Zabel wrote: > Am Donnerstag, den 04.08.2016, 10:38 +0800 schrieb Bibby Hsieh: > > From: Junzhi Zhao > > > > Pixel clock should be 297MHz when resolution is 4K. > > > > Signed-off-by: Junzhi Zha

[PATCH v4 3/3] drm/mediatek: fix the wrong pixel clock when resolution is 4K

From: Junzhi Zhao <junzhi.z...@mediatek.com> Pixel clock should be 297MHz when resolution is 4K. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_dpi.c |9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/g

[PATCH v4 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

From: Junzhi Zhao <junzhi.z...@mediatek.com> The mtk_hdmi_send_infoframe have to be run after PLL and PIXEL clock of HDMI enable. Make sure that HDMI inforframes can be sent successfully. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_hdmi.c

[PATCH v4 2/3] drm/mediatek: enhance the HDMI driving current

From: Junzhi Zhao <junzhi.z...@mediatek.com> In order to improve 4K resolution performance, we have to enhance the HDMI driving current when clock rate is greater than 165MHz. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

[PATCH v4 0/3] MT8173 HDMI 4K support

This is MT8173 HDMI 4K support PATCH v4, based on 4.8-rc1. In order to support HDMI 4K on MT8173, we have to make some modifications. 1) Make sure that mtk_hdmi_send_infoframe is sent successfully. 2) Enhance the HDMI driving current to improve performance. 3) Make sure that pixel clock is 297MHz

[PATCH v9 00/10] MT2701 DRM support

DSI > RDMA -> DPI > And we have shadow register support in MT2701. > > We remove dts patch from the patch series, which depends on MT2701 CCF and > scpsys. > I test this series on MT8173 platform, it looks pretty good to me, thanks for your patches. Tested-by: Bibby

[PATCH 0/7] drm/mediatek: cleaning up and refine

Add drm_plane_helper_check_state()) - https://patchwork.kernel.org/patch/9248361/ (drm/mediatek: Use drm_plane_helper_check_state()) Bibby Hsieh (2): drm/mediatek: Use drm_atomic destroy_state helpers drm/mediatek: Fix mtk_atomic_complete for runtime_pm Daniel Kurtz (5): drm/mediatek: Re

[PATCH 1/7] drm/mediatek: Remove mtk_drm_crtc_check_flush

From: Daniel Kurtz <djku...@chromium.org> This function no longer exists. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/g

[PATCH 2/7] drm/mediatek: plane: Remove plane zpos/index

From: Daniel Kurtz <djku...@chromium.org> It is not actually useful to a mtk plane to know its zpos/index, so just remove this field. This let's us completely remove struct mtk_drm_plane in a follow up patch. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/me

[PATCH 3/7] drm/mediatek: Remove mtk_drm_plane

From: Daniel Kurtz <djku...@chromium.org> Now that mtk_drm_plane just contains its base struct drm_plane, we can just remove it and use struct drm_plane everywhere. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c

[PATCH 6/7] drm/mediatek: plane: Use FB's format's cpp to compute x offset

From: Daniel Kurtz <djku...@chromium.org> Use the framebuffer's format to compute its cpp, and use it when calculating the address shift value. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_plane.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/d

[PATCH 4/7] drm/mediatek: Use drm_atomic destroy_state helpers

Use the core destroy_state helpers to destroy core state to ensure we don't leak if/when more fields get added later. Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |3 +-- drivers/gpu/drm/mediatek/mtk_drm_plane.c |3 +-- 2 files

[PATCH 7/7] drm/mediatek: Fix mtk_atomic_complete for runtime_pm

with updates on disabled CRTCs, for example when supporting runtime PM. Signed-off-by: Bibby Hsieh Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b

[PATCH 5/7] drm/mediatek: plane: Merge mtk_plane_enable into mtk_plane_atomic_update

From: Daniel Kurtz <djku...@chromium.org> The mtk_plane_enable is just called once by mtk_plane_atomic_update. So, merge mtk_plane_enable into mtk_plane_atomic_update. While we are here, also clean up the function a bit by using an fb local variables. Signed-off-by: Bibby Hsieh Sign

[PATCH 1/2] drm/mediatek: Add gamma correction

Apply gamma function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 12 ++ drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1

[PATCH 2/2] drm/mediatek: set mt8173 dithering function

bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c|3 +- drivers/gpu/drm/media

[PATCH 1/2] drm/mediatek: Add gamma correction

Hi, Daniel, Thank you for your suggestion, I will modify that to use the atomic color management. Bibby On Tue, 2016-06-14 at 07:43 +0200, Daniel Vetter wrote: > On Tue, Jun 14, 2016 at 10:55:52AM +0800, Bibby Hsieh wrote: > > Apply gamma function to correct brightness values. >

[PATCH v2 0/2] drm/mediatek: MT8173 gamma & dither support

bpc variable from mtk_drm_crtc struct. Bibby Hsieh (2): drm/mediatek: Add gamma correction drm/mediatek: set mt8173 dithering function drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c|3 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |

[PATCH v2 2/2] drm/mediatek: set mt8173 dithering function

bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c|3 +- drivers/gpu/drm/media

[PATCH v2 1/2] drm/mediatek: Add gamma correction

Apply gamma function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |8 +++ drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 + drivers

[GIT PULL] drm/mediatek: MT8173 gamma & dither support

-Removed the bpc variable from mtk_drm_crtc struct. ----- Bibby Hsieh (2): drm/mediatek: Add gamma correction drm/mediatek: set mt8173 dithering function drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/

[PATCH v3 0/2] drm/mediatek: MT8173 gamma & dither support

This is MT8173 gamma & dither support PATCH v3, based on 4.7-rc1. Changes since v2: -Modify defines to match the register field names in the MT8173 datasheet -Made dithering function support hardware mirroring well on two monitor. Bibby Hsieh (2): drm/mediatek: Add gamma correction

[PATCH v3 1/2] drm/mediatek: Add gamma correction

Apply gamma function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |8 +++ drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 + drivers

[PATCH v3 2/2] drm/mediatek: set mt8173 dithering function

bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c|3 +- drivers/gpu/drm/media

[PATCH 0/4] MT8173 HDMI 4K support

when resolution is 4K. 4) Adjust VENCPLL clock. Bibby Hsieh (1): drm/mediatek: adjust VENCPLL clock for 4K HDMI output Junzhi Zhao (3): drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable drm/mediatek: enhance the HDMI driving current drm/mediatek: fix the wrong pixel clock

[PATCH 3/4] drm/mediatek: fix the wrong pixel clock when resolution is 4K

From: Junzhi Zhao <junzhi.z...@mediatek.com> Pixel clock should be 297MHz when resolution is 4K. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_dpi.c | 184 +--- 1 file changed, 131 insertions(+), 53 deletions(-)

[PATCH 2/4] drm/mediatek: enhance the HDMI driving current

From: Junzhi Zhao <junzhi.z...@mediatek.com> In order to improve 4K resolution performance, we have to enhance the HDMI driving currend when clock rate is greater than 165MHz. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

[PATCH 1/4] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

From: Junzhi Zhao <junzhi.z...@mediatek.com> The mtk_hdmi_send_infoframe have to be run after PLL and PIXEL clock of HDMI enable. Make sure that HDMI inforframes can be sent successfully. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_hdmi.c

[PATCH 4/4] drm/mediatek: adjust VENCPLL clock for 4K HDMI output

if MT8173 display module can support 4K HDMI output, we have to adjust VENCPLL clock from default 660MHz to 800MHz. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_drv.c |9 + drivers/gpu/drm/mediatek/mtk_drm_drv.h |1 + 2 files changed, 10 insertions(+) diff

[PATCH v3 2/2] drm/mediatek: set mt8173 dithering function

Hi, CK I'm appreciate your comments. On Mon, 2016-07-18 at 10:33 +0800, CK Hu wrote: > Hi, Bibby: > > Some comments inline. > > On Thu, 2016-07-07 at 15:37 +0800, Bibby Hsieh wrote: > > Some panels only accept bpc (bit per color) 6-bit. > > But, the default bpc

[PATCH v3 1/2] drm/mediatek: Add gamma correction

Hi, CK I'm appreciate your comments. On Fri, 2016-07-15 at 17:11 +0800, CK Hu wrote: > Hi, Bibby: > > Some comments inline. > > On Thu, 2016-07-07 at 15:37 +0800, Bibby Hsieh wrote: > > Apply gamma function to correct brightness values. > > It applies arbitrary

[PATCH 2/4] drm/mediatek: enhance the HDMI driving current

Hi, CK, I'm appreciate your comment. On Wed, 2016-07-20 at 15:15 +0800, CK Hu wrote: > Hi, Bibby: > > One comment inline. > > On Wed, 2016-07-20 at 12:03 +0800, Bibby Hsieh wrote: > > From: Junzhi Zhao > > > > In order to improve 4K resolution performance

[PATCH 3/4] drm/mediatek: fix the wrong pixel clock when resolution is 4K

Hi, CK, Thanks for your comments. On Wed, 2016-07-20 at 15:57 +0800, CK Hu wrote: > Hi, Bibby: > > Some comments inline. > > On Wed, 2016-07-20 at 12:03 +0800, Bibby Hsieh wrote: > > From: Junzhi Zhao > > > > Pixel clock should be 297MHz when resolution is 4

[PATCH 3/4] drm/mediatek: fix the wrong pixel clock when resolution is 4K

Hi, Philipp, Thanks for your comment. On Wed, 2016-07-20 at 11:41 +0200, Philipp Zabel wrote: > Am Mittwoch, den 20.07.2016, 12:03 +0800 schrieb Bibby Hsieh: > > From: Junzhi Zhao > > > > Pixel clock should be 297MHz when resolution is 4K. > > > > Signed-of

[PATCH 3/4] drm/mediatek: fix the wrong pixel clock when resolution is 4K

Hi, CK, Thanks for your comments. On Mon, 2016-07-25 at 14:49 +0800, CK Hu wrote: > Hi, Bibby: > > On Mon, 2016-07-25 at 14:24 +0800, Bibby Hsieh wrote: > > Hi, CK, > > > > Thanks for your comments. > > > > On Wed, 2016-07-20 at 15:57 +0800, CK Hu wr

[PATCH v2 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

From: Junzhi Zhao <junzhi.z...@mediatek.com> The mtk_hdmi_send_infoframe have to be run after PLL and PIXEL clock of HDMI enable. Make sure that HDMI inforframes can be sent successfully. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_hdmi.c

[PATCH v2 2/3] drm/mediatek: enhance the HDMI driving current

From: Junzhi Zhao <junzhi.z...@mediatek.com> In order to improve 4K resolution performance, we have to enhance the HDMI driving currend when clock rate is greater than 165MHz. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

[PATCH v2 3/3] drm/mediatek: fix the wrong pixel clock when resolution is 4K

From: Junzhi Zhao <junzhi.z...@mediatek.com> Pixel clock should be 297MHz when resolution is 4K. Signed-off-by: Junzhi Zhao Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_dpi.c | 149 +++- 1 file changed, 96 insertions(+), 53 deletions(-)

[PATCH v2 0/3] MT8173 HDMI 4K support

/patch/9249445/ (arm64: dts: mt8173: add mmsel clocks for 4K support) Thank you. Bibby Hsieh Junzhi Zhao (3): drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable drm/mediatek: enhance the HDMI driving current drm/mediatek: fix the wrong pixel clock when resolution is 4K drivers

[PATCH v4 2/4] drm/mediatek: Add GAMMA engine basic function

In order to correct brightness values, we have to support gamma funciton on MT8173. In MT8173, we have two engines for supporting gamma function: AAL and GAMMA. This patch add some GAMMA engine basic function, include config, start and stop function. Signed-off-by: Bibby Hsieh --- drivers/gpu

[PATCH v4 1/4] drm/mediatek: Add AAL engine basic function

In order to correct brightness values, we have to support gamma funciton on MT8173. In MT8173, we have two engines for supporting gamma function: AAL and GAMMA. This patch add some AAL engine basic function, include config, start and stop function. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm

[PATCH v4 0/4] drm/mediatek: MT8173 gamma & dither support

1: -According to the suggestion from Daniel, we used the new atomic color management. -Applied gamma function at GAMMA engine (path 2). -Made dithering function support hardware mirroring well. -Removed the bpc variable from mtk_drm_crtc struct. Bibby Hsieh (4): drm/mediatek: Add AAL engine basic

[PATCH v4 4/4] drm/mediatek: set mt8173 dithering function

bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c |3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c|3 +- drivers/gpu/drm/media

[PATCH v4 3/4] drm/mediatek: Add gamma correction.

Add gamma set function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c |8 ++- drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1

[PATCH v2 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

Hi, Philipp, Thanks for your review. On Wed, 2016-07-27 at 11:27 +0200, Philipp Zabel wrote: > Am Mittwoch, den 27.07.2016, 16:31 +0800 schrieb Bibby Hsieh: > > From: Junzhi Zhao > > > > The mtk_hdmi_send_infoframe have to > > be run after PLL and PIXEL clock of

[PATCH v2 2/3] drm/mediatek: enhance the HDMI driving current

Hi, Philipp, Thanks for your review. On Wed, 2016-07-27 at 11:25 +0200, Philipp Zabel wrote: > Am Mittwoch, den 27.07.2016, 16:31 +0800 schrieb Bibby Hsieh: > > From: Junzhi Zhao > > > > In order to improve 4K resolution performance, > > we have to enhan

[PATCH v2 3/3] drm/mediatek: fix the wrong pixel clock when resolution is 4K

Hi, Philipp, Thanks for your comments. On Wed, 2016-07-27 at 11:23 +0200, Philipp Zabel wrote: > Am Mittwoch, den 27.07.2016, 16:31 +0800 schrieb Bibby Hsieh: > > From: Junzhi Zhao > > > > Pixel clock should be 297MHz when resolution is 4K. > > This patch does t

[PATCH] drm/mediatek: Support UYVY and YUYV format for overlay

MT8173 overlay can support UYVY and YUYV format, we add the format in DRM driver. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 ++ drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/mediatek

[PATCH v2] drm/mediatek: Support UYVY and YUYV format for overlay

MT8173 overlay can support UYVY and YUYV format, we add the format in DRM driver. Signed-off-by: Bibby Hsieh Reviewed-by: Daniel Kurtz --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 21 + drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++ 2 files changed, 23 insertions

[GIT PULL] drm/mediatek: MT8173 gamma & dither support

On Mon, 2016-06-27 at 12:20 +0200, Matthias Brugger wrote: > > On 06/24/2016 09:27 AM, Bibby Hsieh wrote: > > Hi Dave, > > > > Please consider merging this tag, which contains the v2 MT8173 gamma & > > dither function patches I sent on 2016-06-17, rebased o

[PATCH] drm: mediatek: change the variable type of rdma threshold

For some greater resolution, the rdma threshold variable will overflow. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdm

[PATCH v3] drm: mediatek: change the variable type of rdma threshold

For some greater resolution, the rdma threshold variable will overflow. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdm

Re: [PATCH v2] drm: mediatek: change the variable type of rdma threshold

Hi, CK, Thanks for your review and comment. On Mon, 2017-05-22 at 13:46 +0800, CK Hu wrote: > Hi, Bibby: > > One comment inline. > > On Fri, 2017-05-19 at 17:57 +0800, Bibby Hsieh wrote: > > For some greater resolution, the rdma threshold > > variable will ov

Re: [v2] drm: mediatek: change the variable type of rdma threshold

Hi, Guenter, Thanks for your test and comment. On Wed, 2017-06-21 at 14:14 -0700, Guenter Roeck wrote: > On Fri, May 19, 2017 at 05:57:23PM +0800, Bibby Hsieh wrote: > > For some greater resolution, the rdma threshold > > variable will overflow. > > > > Signed-of

[PATCH v2] drm: mediatek: change the variable type of rdma threshold

For some greater resolution, the rdma threshold variable will overflow. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdm

[PATCH v1 0/7] drm/mediatek: support hdmi output for mt2701 and mt7623

) Bibby Hsieh (3): drm/mediatek: implement connection from BLS to DPI0 drm/mediatek: add a error return value when clock driver has been prepared drm/mediatek: config component output by device node port chunhui dai (4): drm/mediatek: move dpi private data to device drm/mediatek: fix

[PATCH v1 2/7] drm/mediatek: fix to get right bridge for dpi encoder

From: chunhui dai 1, dpi is an encoder, there is an bridge in the struct of decoder, we could use it. 2, using of_graph_get_remote_port_parent to get right bridge in device tree. Signed-off-by: chunhui dai ---

[PATCH v1 6/7] drm/mediatek: add a error return value when clock driver has been prepared

DRM driver get the comp->clk by of_clk_get(), we only assign NULL to comp->clk when error happened, but do not return the error number. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- 1 file changed, 1 insertion(+)

[PATCH v1 1/7] drm/mediatek: move dpi private data to device

From: chunhui dai move clock factor and edge enable setting to private data. Signed-off-by: chunhui dai --- drivers/gpu/drm/mediatek/mtk_dpi.c | 82 ++--- drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 2 +- 2

[PATCH v1 7/7] drm/mediatek: config component output by device node port

We can select output component by device node port. Main path default output component is DSI. External path default output component is DPI. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 37 ++ drivers/g

[PATCH v1 4/7] drm/mediatek: add hdmi driver for different hardware

From: chunhui dai This patch adds hdmi driver suppot for both MT2701 and MT7623. And also support other (existing or future) chips that use the same binding and driver. Signed-off-by: Chunhui Dai --- drivers/gpu/drm/mediatek/Makefile

[PATCH v1 3/7] drm/mediatek: add dpi driver for mt2701 and mt7623

From: chunhui dai This patch adds dpi driver suppot for both mt2701 and mt7623. And also support other (existing or future) chips that use the same binding and driver. Signed-off-by: chunhui dai --- drivers/gpu/drm/mediatek/mtk_dpi.c |

[PATCH v1 5/7] drm/mediatek: implement connection from BLS to DPI0

Modify display driver to support connection from BLS to DPI. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drive

[PATCH 0/7] drm/mediatek: support hdmi output for mt2701 and mt7623

Bibby Hsieh (3): drm/mediatek: implement connection from BLS to DPI0 drm/mediatek: add a error return value when clock driver has been prepared drm/mediatek: config component output by device node port chunhui dai (4): drm/mediatek: move dpi private data to device drm/mediatek: fix

[PATCH 6/7] drm/mediatek: add a error return value when clock driver has been prepared

DRM driver get the comp->clk by of_clk_get(), we only assign NULL to comp->clk when error happened, but do not return the error number. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- 1 file changed, 1 insertion(+)

[PATCH 5/7] drm/mediatek: implement connection from BLS to DPI0

Modify display driver to support connection from BLS to DPI. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drive

[PATCH 1/7] drm/mediatek: move dpi private data to device

From: chunhui dai move colck factor and edge enable setting to private data. Signed-off-by: chunhui dai --- drivers/gpu/drm/mediatek/mtk_dpi.c | 80 ++--- drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 2 +- 2

[PATCH 3/7] drm/mediatek: add dpi driver for mt2701 and mt7623

From: chunhui dai This patch adds dpi dirver suppot for both mt2701 and mt7623. And also support other (existing or future) chips that use the same binding and driver. Signed-off-by: chunhui dai --- drivers/gpu/drm/mediatek/mtk_dpi.c |

[PATCH 4/7] drm/mediatek: add hdmi driver for different hardware

From: chunhui dai This patch adds hdmi dirver suppot for both MT2701 and MT7623. And also support other (existing or future) chips that use the same binding and driver. Signed-off-by: Chunhui Dai --- drivers/gpu/drm/mediatek/Makefile

[PATCH 2/7] drm/mediatek: fix to get right bridge for dpi encoder

From: chunhui dai 1, dpi is an encoder, there is an bridge in the struct of decoder, we could use it. 2, using of_graph_get_remote_port_parent to get right bridge in device tree. Signed-off-by: chunhui dai ---

[PATCH 7/7] drm/mediatek: config component output by device node port

We can select output component by decive node port. Main path default output component is DSI. External path default output component is DPI. Signed-off-by: Bibby Hsieh <bibby.hs...@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 37 ++ drivers/g

About the DRM Mediatek patches

Hi, Ulrich, I found two DRM-Mediatek related patches as below from you. https://patchwork.kernel.org/patch/10009039/ https://patchwork.kernel.org/patch/10009049/ Did you have any plans to send the new version (There are some comments from Philipp)? If not, may I send the new version? Thanks.

[PATCH v2 07/13] drm/mediatek: separae hdmi phy to different file

From: chunhui dai Different IC has different phy setting of HDMI. This patch separaes the phy hardware relate part for mt8173. Signed-off-by: chunhui dai --- drivers/gpu/drm/mediatek/Makefile | 15 +-- drivers/gpu/drm/mediatek/mtk_hdmi.c| 30 +++--

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