-by: Lyude <ly...@redhat.com>
Cc: Tomeu Vizoso <to...@tomeuvizoso.net>
---
drivers/gpu/drm/i915/i915_debugfs.c | 102 ++-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 2 +
drivers/gpu/drm/i915/intel_hotplug.c | 3
radeon_dp_aux_transfer_native.
Signed-off-by: Lyude <ly...@redhat.com>
---
drivers/gpu/drm/radeon/radeon_dp_auxch.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c
b/drivers/gpu/drm/radeon/radeon_dp_auxch.c
index 474a8a18..12eac4e
radeon_dp_aux_transfer_native.
Signed-off-by: Lyude <ly...@redhat.com>
---
drivers/gpu/drm/radeon/radeon_dp_auxch.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c
b/drivers/gpu/drm/radeon/radeon_dp_auxch.c
index 474a8a18..12eac4e
v1:
- Make HPD storm interval configurable
- Misc code cleanup
Signed-off-by: Lyude <ly...@redhat.com>
Cc: Jani Nikula <jani.nik...@linux.intel.com>
Cc: Tomeu Vizoso <to...@tomeuvizoso.net>
---
drivers/gpu/drm/i915/i915_debugfs.c | 78 +++-
dr
patch, just moving the mouse won't add the primary
plane to the commit since it won't trigger a change in DDB
partitioning.
v2: Use skl_ddb_entry_equal() (Lyude).
v3: Change Reported-and-bisected-by: to Reported-by: for checkpatch
Fixes: 05a76d3d6ad1 ("drm/i915/skl: Ensure pipes with changed wm
crtc_commit()
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Signed-off-by: Maarten Lankhorst
Link:
v2:
- Add reproduction recipe
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Fixes: 62e0fb880123 ("drm/i915/skl: Update plane watermarks atomically during
plane updates")
Testcase: kms_plane
Signed-off-by: Maarten Lankhorst
Link:
http://patchwork.freedesktop.org/patch/msgid/1472488288-27
this. if this is wrong I will be happy
to update and resend the patches).
Lyude (4):
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915: Move CRTC updating in atomic_commit into it's own hook
drm/i915/skl: Update DDB values atomically with wms/plane attrs
drm/i915
ore calling the function
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Signed-off-by: Lyude
Signed-off-by: Maarten Lankhorst
Link:
http://patchwork.freedesktop.org/patch/msgid/1471961565-28540-1-git-send-em
le, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Testcase: plane-all-modeset-transition
Signed-off-by: Lyude
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
Signed-off-by: Maarten La
causing polling to get re-enabled. So, when deinitializing power
wells on valleyview we now refrain from enabling polling in the midst of
suspend.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98040
Fixes: 19625e85c6ec ("drm/i915: Enable polling when we don't have hpd")
Signed-off-by:
then messing with a large array
As for this fix, I'll probably still need someone to review it so I can
get it into 4.7.y.
Let me know what you think.
On Mon, 2016-08-29 at 12:31 -0400, Lyude wrote:
> i915 sometimes needs to disable planes in the middle of an atomic
> commit, and then reenabl
of features for
making debugging watermarks a little easier.
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
Lyude (6):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915: Add enable_sagv option
drm/i915/gen9: Make
First part of cleaning up all of the skl watermark code. This moves the
structures for storing the ddb allocations of each pipe into
intel_crtc_state, along with moving the structures for storing the
current ddb allocations active on hardware into intel_crtc.
Signed-off-by: Lyude
Cc: Maarten
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h
Having skl_wm_level contain all of the watermarks for each plane is
annoying since it prevents us from having any sort of object to
represent a single watermark level, something we take advantage of in
the next commit to cut down on all of the copy paste code in here.
Signed-off-by: Lyude
Cc
watermarks on
the fly.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 2 -
drivers/gpu/drm/i915/intel_display.c | 14 ++-
drivers/gpu/drm/i915/intel_drv.h | 6 +-
drivers/gpu/drm/i915/intel_pm.c | 203
This option allows us to manually control the SAGV at module load time.
This can be useful in situations such as trying to debug watermark
changes, since enabled SAGV + incorrect watermarks = total GPU
annihilation.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_pm.c | 57
of features for
making debugging watermarks a little easier.
Lyude (10):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915/gen9: Make skl_wm_level per-plane
drm/i915/gen9: Cleanup skl_pipe_wm_active_state
drm/i915/gen9: Get rid
alloc->start = alloc->end = 0;
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_display.c | 16 ---
drivers/gpu/drm/i915/intel_drv.h | 8 +---
drivers/g
nitpicks
- Fix accidental usage of i vs. PLANE_CURSOR
- Split out skl_pipe_wm_active_state simplification into separate patch
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/intel_drv.h
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
This function is a wreck, let's help it get it's life back together and
cleanup all of the copy pasta here.
(adding Maarten's reviewed-by since this is just a split-up version of one
of the previous patches)
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 57
Helper we're going to be using for implementing verification of the wm
levels in skl_verify_wm_level().
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 14 ++
2 files
watermarks on
the fly.
Changes since v1:
- Fixup skl_write_wm_level()
- Fixup skl_wm_level_from_reg_val()
- Don't forget to copy *active to intel_crtc->wm.active.skl
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_dr
There's not much of a reason this should have the locations to read out
the hardware state hardcoded, so allow the caller to specify the
location and add this function to intel_drv.h. As well, we're going to
need this function to be reusable for the next patch.
Signed-off-by: Lyude
Cc: Maarten
Thanks to Paulo Zanoni for indirectly pointing this out.
Looks like we never actually added any code for checking whether or not
we actually wrote watermark levels properly. Let's fix that.
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2c682bc
of features for
making debugging watermarks a little easier.
Rebased for latest nightly, new r-bs added + some changes
Lyude (10):
drm/i915/skl: Move per-pipe ddb allocations into crtc states
drm/i915/skl: Remove linetime from skl_wm_values
drm/i915/gen9: Make skl_wm_level per-plane
drm/i915/gen9
alloc->start = alloc->end = 0;
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_display.c | 16 ---
drivers/gpu/drm/i915/intel_drv.h
nitpicks
- Fix accidental usage of i vs. PLANE_CURSOR
- Split out skl_pipe_wm_active_state simplification into seperate patch
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers
watermarks on
the fly.
Changes since v1:
- Fixup skl_write_wm_level()
- Fixup skl_wm_level_from_reg_val()
- Don't forget to copy *active to intel_crtc->wm.active.skl
Changes since v2:
- Fix usage of wrong cstate
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Vi
Finally, add some debugging output for ddb changes in the atomic debug
output. This makes it a lot easier to spot bugs from incorrect ddb
allocations.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915
Thanks to Paulo Zanoni for indirectly pointing this out.
Looks like we never actually added any code for checking whether or not
we actually wrote watermark levels properly. Let's fix that.
Changes since v1:
- Use %u instead of %d when printing WM state mismatches
Signed-off-by: Lyude
Reviewed
Helper we're going to be using for implementing verification of the wm
levels in skl_verify_wm_level().
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 14
Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Reviewed-by: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
This function is a wreck, let's help it get its life back together and
cleanup all of the copy pasta here.
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Reviewed-by: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_pm.c | 52
behavior change in the code that Paulo pointed out
Signed-off-by: Lyude
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 28 ++--
2 files changed, 20 insertions(+), 10 deletions
Wrapping strings is against the guidelines in Documentation/CodingStyle,
chapter 2.
Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions
Pushed patches 1-4 in this series (with some very small style changes
to make checkpatch happy), drm-intel-nightly also rebuilt.
On Fri, 2016-10-14 at 17:31 -0400, Lyude wrote:
> While it (mostly) works, the code for handling watermarks on Skylake
> has been
> kind of ugly for a while
to use the full range of values
for pixels -even- if the sink device declares that it's using a CEA
mode. It's up to the sink device to limit the pixel range to the CEA
ranges if it needs.
Signed-off-by: Lyude
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Jani Nikula
Cc: Ville Syrjälä
---
I'm really
to the constant wakeups, so this is more of a
temporary workaround then a solution.
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/intel_display.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
in somewhat
random places later in intel_mst_enable_dp() if we got lucky enough.
Signed-off-by: Lyude
---
drivers/gpu/drm/drm_dp_mst_topology.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 297eb8e..71ea052
to seemingly unrelated
backtraces in sysfs, ext4, etc.
Cc: stable at vger.kernel.org
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_drv.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index
necessary:
- "drm/i915/skl: Always wait for pipes to update after a flush"
- "drm/i915/skl: Fix extra whitespace in skl_flush_wm_values()"
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane upd
ed comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrj
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
es: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
---
drivers/gpu/drm/i915/intel_display.c | 8 +
drivers/gpu/drm/i915/in
If we're enabling a pipe, we'll need to modify the watermarks on all
other active pipes. Since those pipes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
() for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
he WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt
Latest version of https://patchwork.freedesktop.org/patch/102581/ .
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
drm/i915: Move
Roper
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_reg.h | 5 ++
drivers/gpu/drm/i915/intel_display.c | 11
drivers/gpu/drm/i915/intel_drv.h | 2 +
dri
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
arks
Changes since v5:
- Remove cursor ddb entry write in skl_write_cursor_wm(), defer until
patch 6
- Write WM_LINETIME in intel_begin_crtc_commit()
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation")
Signed-off-by: Lyude
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc:
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
() for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by: Lyude
Revie
into skl_write_cursor_wm()
Fixes: 0e8fb7ba7ca5 ("drm/i915/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc:
Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
fixup! drm/i915/skl: Add support for the SAGV, fix underrun hangs
---
/i915/skl: Update plane watermarks atomically during plane updates
- drm/i915/skl: Update DDB values atomically with wms/plane attrs
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure
termark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i91
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
pposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation
() for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by: Lyude
Revie
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
15/skl: Program the DDB allocation")
Signed-off-by: Lyude
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: Hans de Goede
Cc: Matt Roper
---
drivers/gpu/drm/i915/i
. These were
definitely useful at one point, but since we now retry any failed aux
transaction unconditionally in DRM's dp helpers they don't serve much purpose
other then to make failing aux transactions take a lot more time then they need
to.
Lyude (7):
drm/dp_helper: Print first error received
ing to print "dp_aux_ch timed out" over 32 times we can just print
once.
Signed-off-by: Lyude
---
drivers/gpu/drm/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 8f11b87..4
Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon
, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon/atombios_dp.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm
Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.
Signed-off-by: Lyude
---
drivers/gpu/drm/amd
, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.
Signed-off-by: Lyude
---
drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu
There's a couple of places where this would be useful for drivers (such
as reporting DP aux transaction timeouts).
Signed-off-by: Lyude
---
include/drm/drmP.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index
Timeouts can be errors, but timeouts are also usually normal behavior
and happen a lot. Since the kernel already lets us know when we're
suppressing messages due to rate limiting, rate limit timeout errors so
we don't make too much noise in the kernel log.
Signed-off-by: Lyude
---
drivers/gpu
5/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville S
5/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville S
this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Vill
this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Vill
Rebased version of https://patchwork.freedesktop.org/series/10276/ . No changes
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Vill
pposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
() for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by: Lyude
Revie
5/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville S
Rebased version of https://patchwork.freedesktop.org/series/10276/ . No changes
Lyude (5):
drm/i915/skl: Add support for the SAGV, fix underrun hangs
drm/i915/skl: Update plane watermarks atomically during plane updates
drm/i915/skl: Ensure pipes with changed wms get added to the state
this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Reviewed-by: Matt Roper
Reviewed-by: Maarten Lankhorst
Signed-off-by: Lyude
Cc: Daniel Vetter
Cc: Vill
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
pposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
() for stable branches) into it's own function, and
add an appropriate display function hook for it.
Based off of Matt Rope's suggestions
Changes since v1:
- Drop pipe_config->base.active check in intel_update_crtcs() since we
check that before calling the function
Signed-off-by: Lyude
Revie
5/skl: Flush the WM configuration")
Fixes: 8211bd5bdf5e ("drm/i915/skl: Program the DDB allocation")
[omitting CC for stable, since this patch will need to be changed for
such backports first]
Testcase: kms_cursor_legacy
Signed-off-by: Lyude
Reviewed-by: Maarten Lankhorst
Cc: Ville S
if it's not
controllable on the system. As well, this means the RBs for:
drm/i915/skl: Add support for the SAGV, fix underrun hangs
Had to be cleared, seeing as the patch has changed considerably now.
Lyude (6):
drm/i915/gen6+: Return -EINVAL on invalid pcode commands
drm/i915/skl: Add support
an invalid mailbox command was sent.
This also might come in handy in the future for debugging.
Signed-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c
ce it doesn't have an SAGV
Signed-off-by: Lyude
Cc: Matt Roper
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: stable at vger.kernel.org
---
drivers/gpu/drm/i915/i915_drv.h | 7 +++
drivers/gpu/drm/i915/i915_reg.h | 4 ++
drivers/gpu/drm/i915/intel_display.c | 12 +
t;)
Fixes: 9b6130227495 ("drm/i915/gen9: Re-allocate DDB only for changed pipes")
Signed-off-by: Matt Roper
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Radhakrishna Sripada
Cc: H
pposed
to have been removed earlier anyway)
- In i9xx_update_cursor(), use dev_priv->info.gen >= 9 instead of
IS_GEN9(dev_priv). We do this everywhere else and I'd imagine this
needs to be done for gen10 as well
Fixes: 2d41c0b59afc ("drm/i915/skl: SKL Watermark Computation
If we're enabling a pipe, we'll need to modify the watermarks on all
active planes. Since those planes won't be added to the state on
their own, we need to add them ourselves.
Signed-off-by: Lyude
Reviewed-by: Matt Roper
Cc: stable at vger.kernel.org
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc
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