Re: [PATCH] drm/meson: Add support for DMT modes on HDMI

2018-03-14 Thread Jerome Brunet
On Tue, 2018-03-13 at 11:07 +0100, Neil Armstrong wrote:
> This patch adds support for DMT display modes over HDMI.
> The modes timings configurations are from the Amlogic Vendor linux tree
> and tested over multiples monitors.
> Previously only a selected number of CEA modes were supported.
> 
> Only these following modes are supported with these changes:
> - 640x480@60Hz
> - 800x600@60Hz
> - 1024x768@60Hz
> - 1152x864@75Hz
> - 1280x1024@60Hz
> - 1600x1200@60Hz
> - 1920x1080@60Hz
> 
> The associated code to handle the clock rates is also added.
> 
> Signed-off-by: Neil Armstrong 

Looks good to me

Acked-by: Jerome Brunet 
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Re: [PATCH] drm/meson: Add support for DMT modes on HDMI

2018-03-13 Thread Neil Armstrong
On 13/03/2018 11:36, Jerome Brunet wrote:
> On Tue, 2018-03-13 at 11:07 +0100, Neil Armstrong wrote:
>> This patch adds support for DMT display modes over HDMI.
>> The modes timings configurations are from the Amlogic Vendor linux tree
>> and tested over multiples monitors.
>> Previously only a selected number of CEA modes were supported.
>>
>> Only these following modes are supported with these changes:
>> - 640x480@60Hz
>> - 800x600@60Hz
>> - 1024x768@60Hz
>> - 1152x864@75Hz
>> - 1280x1024@60Hz
>> - 1600x1200@60Hz
>> - 1920x1080@60Hz
>>
>> The associated code to handle the clock rates is also added.
>>
>> Signed-off-by: Neil Armstrong 
> 
> Looks good to me
> 
> Acked-by: Jerome Brunet 
> 

Pushed to drm-misc-next,

Neil
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[PATCH] drm/meson: Add support for DMT modes on HDMI

2018-03-13 Thread Neil Armstrong
This patch adds support for DMT display modes over HDMI.
The modes timings configurations are from the Amlogic Vendor linux tree
and tested over multiples monitors.
Previously only a selected number of CEA modes were supported.

Only these following modes are supported with these changes:
- 640x480@60Hz
- 800x600@60Hz
- 1024x768@60Hz
- 1152x864@75Hz
- 1280x1024@60Hz
- 1600x1200@60Hz
- 1920x1080@60Hz

The associated code to handle the clock rates is also added.

Signed-off-by: Neil Armstrong 
---

Changes since v1:
 - Fixed a regression on HDMI vic validation

 drivers/gpu/drm/meson/meson_dw_hdmi.c |  22 +--
 drivers/gpu/drm/meson/meson_vclk.c| 219 -
 drivers/gpu/drm/meson/meson_venc.c| 347 +-
 drivers/gpu/drm/meson/meson_venc.h|   1 +
 4 files changed, 570 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c 
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 17de3af..9d70ed6 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -537,7 +537,6 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void 
*dev_id)
return IRQ_HANDLED;
 }
 
-/* TOFIX Enable support for non-vic modes */
 static enum drm_mode_status
 dw_hdmi_mode_valid(struct drm_connector *connector,
   const struct drm_display_mode *mode)
@@ -554,12 +553,12 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal, mode->type, mode->flags);
 
-   /* For now, only accept VIC modes */
-   if (!vic)
-   return MODE_BAD;
-
-   /* For now, filter by supported VIC modes */
-   if (!meson_venc_hdmi_supported_vic(vic))
+   /* Check against non-VIC supported modes */
+   if (!vic) {
+   if (!meson_venc_hdmi_supported_mode(mode))
+   return MODE_BAD;
+   /* Check against supported VIC modes */
+   } else if (!meson_venc_hdmi_supported_vic(vic))
return MODE_BAD;
 
vclk_freq = mode->clock;
@@ -585,9 +584,14 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
 
/* Finally filter by configurable vclk frequencies */
switch (vclk_freq) {
+   case 25175:
+   case 4:
case 54000:
+   case 65000:
case 74250:
+   case 108000:
case 148500:
+   case 162000:
case 297000:
case 594000:
return MODE_OK;
@@ -652,10 +656,6 @@ static void meson_venc_hdmi_encoder_mode_set(struct 
drm_encoder *encoder,
DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n",
 mode->base.id, mode->name, vic);
 
-   /* Should have been filtered */
-   if (!vic)
-   return;
-
/* VENC + VENC-DVI Mode setup */
meson_venc_hdmi_mode_set(priv, vic, mode);
 
diff --git a/drivers/gpu/drm/meson/meson_vclk.c 
b/drivers/gpu/drm/meson/meson_vclk.c
index 4767704..f051122 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -328,14 +328,24 @@ static void meson_venci_cvbs_clock_config(struct 
meson_drm *priv)
 #define MESON_VCLK_HDMI_DDR_54000  2
 /* 2970 /4 /1 /1 /5 /1  => /1 /2 */
 #define MESON_VCLK_HDMI_DDR_148500 3
+/* 4028 /4 /4 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_25175  4
+/* 3200 /4 /2 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_4  5
+/* 5200 /4 /2 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_65000  6
 /* 2970 /2 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_74250  4
+#define MESON_VCLK_HDMI_74250  7
+/* 4320 /4 /1 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_108000 8
 /* 2970 /1 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_148500 5
+#define MESON_VCLK_HDMI_148500 9
+/* 3240 /2 /1 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_162000 10
 /* 2970 /1 /1 /1 /5 /2  => /1 /1 */
-#define MESON_VCLK_HDMI_297000 6
+#define MESON_VCLK_HDMI_297000 11
 /* 5940 /1 /1 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_594000 7
+#define MESON_VCLK_HDMI_594000 12
 
 struct meson_vclk_params {
unsigned int pll_base_freq;
@@ -401,6 +411,46 @@ struct meson_vclk_params {
.vid_pll_div = VID_PLL_DIV_5,
.vclk_div = 1,
},
+   [MESON_VCLK_HDMI_25175] = {
+   .pll_base_freq = 4028000,
+   .pll_od1 = 4,
+   .pll_od2 = 4,
+   .pll_od3 = 1,
+   .vid_pll_div = VID_PLL_DIV_5,
+   .vclk_div = 2,
+   },
+   [MESON_VCLK_HDMI_4] = {
+   .pll_base_freq = 320,
+   .pll_od1 = 4,
+   .pll_od2 = 2,
+   .pll_od3 = 1,
+   .vid_pll_div = VID_PLL_DIV_5,
+   .vclk_div = 2,
+   },
+   [MESON_VCLK_HDMI_65000] = {
+   

[PATCH] drm/meson: Add support for DMT modes on HDMI

2018-03-08 Thread Neil Armstrong
This patch adds support for DMT display modes over HDMI.
The modes timings configurations are from the Amlogic Vendor linux tree
and tested over multiples monitors.
Previously only a selected number of CEA modes were supported.

Only these following modes are supported with these changes:
 - 640x480@60Hz
 - 800x600@60Hz
 - 1024x768@60Hz
 - 1152x864@75Hz
 - 1280x1024@60Hz
 - 1600x1200@60Hz
 - 1920x1080@60Hz

The associated code to handle the clock rates is also added.

Signed-off-by: Neil Armstrong 
---
 drivers/gpu/drm/meson/meson_dw_hdmi.c |  21 +-
 drivers/gpu/drm/meson/meson_vclk.c| 219 -
 drivers/gpu/drm/meson/meson_venc.c| 347 +-
 drivers/gpu/drm/meson/meson_venc.h|   1 +
 4 files changed, 570 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c 
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 17de3af..fd1d365 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -554,12 +554,12 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal, mode->type, mode->flags);
 
-   /* For now, only accept VIC modes */
-   if (!vic)
-   return MODE_BAD;
-
-   /* For now, filter by supported VIC modes */
-   if (!meson_venc_hdmi_supported_vic(vic))
+   /* Check against non-VIC supported modes */
+   if (!vic) {
+   if (!meson_venc_hdmi_supported_mode(mode))
+   return MODE_BAD;
+   /* Check against supported VIC modes */
+   } else if (meson_venc_hdmi_supported_vic(vic))
return MODE_BAD;
 
vclk_freq = mode->clock;
@@ -585,9 +585,14 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
 
/* Finally filter by configurable vclk frequencies */
switch (vclk_freq) {
+   case 25175:
+   case 4:
case 54000:
+   case 65000:
case 74250:
+   case 108000:
case 148500:
+   case 162000:
case 297000:
case 594000:
return MODE_OK;
@@ -652,10 +657,6 @@ static void meson_venc_hdmi_encoder_mode_set(struct 
drm_encoder *encoder,
DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n",
 mode->base.id, mode->name, vic);
 
-   /* Should have been filtered */
-   if (!vic)
-   return;
-
/* VENC + VENC-DVI Mode setup */
meson_venc_hdmi_mode_set(priv, vic, mode);
 
diff --git a/drivers/gpu/drm/meson/meson_vclk.c 
b/drivers/gpu/drm/meson/meson_vclk.c
index 4767704..f051122 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -328,14 +328,24 @@ static void meson_venci_cvbs_clock_config(struct 
meson_drm *priv)
 #define MESON_VCLK_HDMI_DDR_54000  2
 /* 2970 /4 /1 /1 /5 /1  => /1 /2 */
 #define MESON_VCLK_HDMI_DDR_148500 3
+/* 4028 /4 /4 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_25175  4
+/* 3200 /4 /2 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_4  5
+/* 5200 /4 /2 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_65000  6
 /* 2970 /2 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_74250  4
+#define MESON_VCLK_HDMI_74250  7
+/* 4320 /4 /1 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_108000 8
 /* 2970 /1 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_148500 5
+#define MESON_VCLK_HDMI_148500 9
+/* 3240 /2 /1 /1 /5 /2  => /1 /1 */
+#define MESON_VCLK_HDMI_162000 10
 /* 2970 /1 /1 /1 /5 /2  => /1 /1 */
-#define MESON_VCLK_HDMI_297000 6
+#define MESON_VCLK_HDMI_297000 11
 /* 5940 /1 /1 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_594000 7
+#define MESON_VCLK_HDMI_594000 12
 
 struct meson_vclk_params {
unsigned int pll_base_freq;
@@ -401,6 +411,46 @@ struct meson_vclk_params {
.vid_pll_div = VID_PLL_DIV_5,
.vclk_div = 1,
},
+   [MESON_VCLK_HDMI_25175] = {
+   .pll_base_freq = 4028000,
+   .pll_od1 = 4,
+   .pll_od2 = 4,
+   .pll_od3 = 1,
+   .vid_pll_div = VID_PLL_DIV_5,
+   .vclk_div = 2,
+   },
+   [MESON_VCLK_HDMI_4] = {
+   .pll_base_freq = 320,
+   .pll_od1 = 4,
+   .pll_od2 = 2,
+   .pll_od3 = 1,
+   .vid_pll_div = VID_PLL_DIV_5,
+   .vclk_div = 2,
+   },
+   [MESON_VCLK_HDMI_65000] = {
+   .pll_base_freq = 520,
+   .pll_od1 = 4,
+   .pll_od2 = 2,
+   .pll_od3 = 1,
+   .vid_pll_div = VID_PLL_DIV_5,
+   .vclk_div = 2,
+   },
+   [MESON_VCLK_HDMI_108000] = {
+   .pll_base_freq = 432,
+   .pll_od1 = 4,
+   .pll_od2 = 1,
+   .pll_od3 = 1,
+