Re: [PATCH 4/8] drm/exynos/dsi: Use clk bulk API

[kbuild test robot]

Hi Maciej,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on v4.16-rc2 next-20180219]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Maciej-Purski/Use-clk-bulk-API-in-exynos5433-drivers/20180220-054431
base:   git://linuxtv.org/media_tree.git master
config: arm-multi_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm 

All errors (new ones prefixed by >>):

   ERROR: "devm_clk_bulk_alloc" [drivers/media/platform/s5p-jpeg/s5p-jpeg.ko] 
undefined!
>> ERROR: "devm_clk_bulk_alloc" [drivers/gpu/drm/exynos/exynosdrm.ko] undefined!

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 4/8] drm/exynos/dsi: Use clk bulk API

[Maciej Purski]

Using bulk clk functions simplifies the driver's code. Use devm_clk_bulk
functions instead of iterating over an array of clks.

In order to achieve consistency with other drivers, define clock names
in driver's variants structures.

Signed-off-by: Maciej Purski 
---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 68 +++--
 1 file changed, 30 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 7904ffa..46a8b5c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -209,11 +209,7 @@
 #define DSI_XFER_TIMEOUT_MS100
 #define DSI_RX_FIFO_EMPTY  0x3082
 
-#define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
-
-static char *clk_names[5] = { "bus_clk", "sclk_mipi",
-   "phyclk_mipidphy0_bitclkdiv8", "phyclk_mipidphy0_rxclkesc0",
-   "sclk_rgb_vclk_to_dsim0" };
+#define DSI_MAX_CLOCKS 5
 
 enum exynos_dsi_transfer_type {
EXYNOS_DSI_TX,
@@ -243,6 +239,7 @@ struct exynos_dsi_driver_data {
unsigned int plltmr_reg;
unsigned int has_freqband:1;
unsigned int has_clklane_stop:1;
+   const char *clock_names[DSI_MAX_CLOCKS];
unsigned int num_clks;
unsigned int max_freq;
unsigned int wait_for_reset;
@@ -259,7 +256,7 @@ struct exynos_dsi {
 
void __iomem *reg_base;
struct phy *phy;
-   struct clk **clks;
+   struct clk_bulk_data *clks;
struct regulator_bulk_data supplies[2];
int irq;
int te_gpio;
@@ -453,6 +450,7 @@ static const struct exynos_dsi_driver_data 
exynos3_dsi_driver_data = {
.plltmr_reg = 0x50,
.has_freqband = 1,
.has_clklane_stop = 1,
+   .clock_names = {"bus_clk", "pll_clk"},
.num_clks = 2,
.max_freq = 1000,
.wait_for_reset = 1,
@@ -465,6 +463,7 @@ static const struct exynos_dsi_driver_data 
exynos4_dsi_driver_data = {
.plltmr_reg = 0x50,
.has_freqband = 1,
.has_clklane_stop = 1,
+   .clock_names = {"bus_clk", "sclk_mipi"},
.num_clks = 2,
.max_freq = 1000,
.wait_for_reset = 1,
@@ -475,6 +474,7 @@ static const struct exynos_dsi_driver_data 
exynos4_dsi_driver_data = {
 static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = {
.reg_ofs = exynos_reg_ofs,
.plltmr_reg = 0x58,
+   .clock_names = {"bus_clk", "pll_clk"},
.num_clks = 2,
.max_freq = 1000,
.wait_for_reset = 1,
@@ -486,6 +486,10 @@ static const struct exynos_dsi_driver_data 
exynos5433_dsi_driver_data = {
.reg_ofs = exynos5433_reg_ofs,
.plltmr_reg = 0xa0,
.has_clklane_stop = 1,
+   .clock_names = {"bus_clk", "phyclk_mipidphy0_bitclkdiv8",
+   "phyclk_mipidphy0_rxclkesc0",
+   "sclk_rgb_vclk_to_dsim0",
+   "sclk_mipi"},
.num_clks = 5,
.max_freq = 1500,
.wait_for_reset = 0,
@@ -497,6 +501,7 @@ static const struct exynos_dsi_driver_data 
exynos5422_dsi_driver_data = {
.reg_ofs = exynos5433_reg_ofs,
.plltmr_reg = 0xa0,
.has_clklane_stop = 1,
+   .clock_names = {"bus_clk", "pll_clk"},
.num_clks = 2,
.max_freq = 1500,
.wait_for_reset = 1,
@@ -1711,7 +1716,7 @@ static int exynos_dsi_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct resource *res;
struct exynos_dsi *dsi;
-   int ret, i;
+   int ret;
 
dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
if (!dsi)
@@ -1743,26 +1748,15 @@ static int exynos_dsi_probe(struct platform_device 
*pdev)
return -EPROBE_DEFER;
}
 
-   dsi->clks = devm_kzalloc(dev,
-   sizeof(*dsi->clks) * dsi->driver_data->num_clks,
-   GFP_KERNEL);
-   if (!dsi->clks)
-   return -ENOMEM;
+   dsi->clks = devm_clk_bulk_alloc(dev, dsi->driver_data->num_clks,
+   dsi->driver_data->clock_names);
+   if (IS_ERR(dsi->clks))
+   return PTR_ERR(dsi->clks);
 
-   for (i = 0; i < dsi->driver_data->num_clks; i++) {
-   dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
-   if (IS_ERR(dsi->clks[i])) {
-   if (strcmp(clk_names[i], "sclk_mipi") == 0) {
-   strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
-   i--;
-   continue;
-   }
-
-   dev_info(dev, "failed to get the clock: %s\n",
-   clk_names[i]);
-   return PTR_ERR(dsi->clks[i]);
-   }
-   }
+   ret = devm_clk_bulk_get(dev, dsi->driver_data->num_clks,
+   dsi->clks);
+   if (ret < 0)
+