Re: [PATCH v2 04/10] video: add support of panel OTM8009A

2018-03-14 Thread Patrice CHOTARD
Hi Yannick

On 03/02/2018 04:44 PM, yannick fertre wrote:
> Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
> 
> Signed-off-by: yannick fertre 
> ---
>   drivers/video/Kconfig  |   8 +
>   drivers/video/Makefile |   1 +
>   drivers/video/orisetech_otm8009a.c | 329 
> +
>   3 files changed, 338 insertions(+)
>   create mode 100644 drivers/video/orisetech_otm8009a.c
> 
> diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> index 1981298..b5fc535 100644
> --- a/drivers/video/Kconfig
> +++ b/drivers/video/Kconfig
> @@ -320,6 +320,14 @@ config VIDEO_LCD_ANX9804
>   from a parallel LCD interface and translate it on the fy into a DP
>   interface for driving eDP TFT displays. It uses I2C for configuration.
>   
> +config VIDEO_LCD_ORISETECH_OTM8009A
> + bool "OTM8009A DSI LCD panel support"
> + depends on DM_VIDEO
> + select VIDEO_MIPI_DSI
> + default n
> + ---help---
> + Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
> +
>   config VIDEO_LCD_SSD2828
>   bool "SSD2828 bridge chip"
>   default n
> diff --git a/drivers/video/Makefile b/drivers/video/Makefile
> index 6f42cca..65002af 100644
> --- a/drivers/video/Makefile
> +++ b/drivers/video/Makefile
> @@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
>   obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
>   obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
>   obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
> +obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
>   obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
>   obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
>   obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
> diff --git a/drivers/video/orisetech_otm8009a.c 
> b/drivers/video/orisetech_otm8009a.c
> new file mode 100644
> index 000..79f2da8
> --- /dev/null
> +++ b/drivers/video/orisetech_otm8009a.c
> @@ -0,0 +1,329 @@
> +/*
> + * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
> + * Author(s): Yannick Fertre  for STMicroelectronics.
> + * Philippe Cornu  for STMicroelectronics.
> + *
> + * This otm8009a panel driver is based on the panel driver from
> + * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c (kernel linux)
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define DRV_NAME "orisetech_otm8009a"
> +
> +#define OTM8009A_BACKLIGHT_DEFAULT   240
> +#define OTM8009A_BACKLIGHT_MAX   255
> +
> +/* Manufacturer Command Set */
> +#define MCS_ADRSFT   0x  /* Address Shift Function */
> +#define MCS_PANSET   0xB3A6  /* Panel Type Setting */
> +#define MCS_SD_CTRL  0xC0A2  /* Source Driver Timing Setting */
> +#define MCS_P_DRV_M  0xC0B4  /* Panel Driving Mode */
> +#define MCS_OSC_ADJ  0xC181  /* Oscillator Adjustment for Idle/Normal mode */
> +#define MCS_RGB_VID_SET  0xC1A1  /* RGB Video Mode Setting */
> +#define MCS_SD_PCH_CTRL  0xC480  /* Source Driver Precharge Control */
> +#define MCS_NO_DOC1  0xC48A  /* Command not documented */
> +#define MCS_PWR_CTRL10xC580  /* Power Control Setting 1 */
> +#define MCS_PWR_CTRL20xC590  /* Power Control Setting 2 for Normal 
> Mode */
> +#define MCS_PWR_CTRL40xC5B0  /* Power Control Setting 4 for DC 
> Voltage */
> +#define MCS_PANCTRLSET1  0xCB80  /* Panel Control Setting 1 */
> +#define MCS_PANCTRLSET2  0xCB90  /* Panel Control Setting 2 */
> +#define MCS_PANCTRLSET3  0xCBA0  /* Panel Control Setting 3 */
> +#define MCS_PANCTRLSET4  0xCBB0  /* Panel Control Setting 4 */
> +#define MCS_PANCTRLSET5  0xCBC0  /* Panel Control Setting 5 */
> +#define MCS_PANCTRLSET6  0xCBD0  /* Panel Control Setting 6 */
> +#define MCS_PANCTRLSET7  0xCBE0  /* Panel Control Setting 7 */
> +#define MCS_PANCTRLSET8  0xCBF0  /* Panel Control Setting 8 */
> +#define MCS_PANU2D1  0xCC80  /* Panel U2D Setting 1 */
> +#define MCS_PANU2D2  0xCC90  /* Panel U2D Setting 2 */
> +#define MCS_PANU2D3  0xCCA0  /* Panel U2D Setting 3 */
> +#define MCS_PAND2U1  0xCCB0  /* Panel D2U Setting 1 */
> +#define MCS_PAND2U2  0xCCC0  /* Panel D2U Setting 2 */
> +#define MCS_PAND2U3  0xCCD0  /* Panel D2U Setting 3 */
> +#define MCS_GOAVST   0xCE80  /* GOA VST Setting */
> +#define MCS_GOACLKA1 0xCEA0  /* GOA CLKA1 Setting */
> +#define MCS_GOACLKA3 0xCEB0  /* GOA CLKA3 Setting */
> +#define MCS_GOAECLK  0xCFC0  /* GOA ECLK Setting */
> +#define MCS_NO_DOC2  0xCFD0  /* Command not documented */
> +#define MCS_GVDDSET  0xD800  /* GVDD/NGVDD */
> +#define MCS_VCOMDC   0xD900  /* VCOM Voltage Setting */
> +#define MCS_GMCT2_2P 0xE100  /* Gamma Correction 2.2+ Setting */
> +#define MCS_GMCT2_2N 0xE200  /* Gamma Correction 2.2- Setting */
> +#define MCS_NO_DOC3  0xF5B6  /* Command not documented */
> +#define MCS_CMD2_ENA10xFF00  /* Enable Acces

[PATCH v2 04/10] video: add support of panel OTM8009A

2018-03-02 Thread yannick fertre
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig  |   8 +
 drivers/video/Makefile |   1 +
 drivers/video/orisetech_otm8009a.c | 329 +
 3 files changed, 338 insertions(+)
 create mode 100644 drivers/video/orisetech_otm8009a.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 1981298..b5fc535 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -320,6 +320,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
 
+config VIDEO_LCD_ORISETECH_OTM8009A
+   bool "OTM8009A DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   ---help---
+   Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 6f42cca..65002af 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
 obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c 
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..79f2da8
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,329 @@
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *   Philippe Cornu  for STMicroelectronics.
+ *
+ * This otm8009a panel driver is based on the panel driver from
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c (kernel linux)
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DRV_NAME "orisetech_otm8009a"
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x  /* Address Shift Function */
+#define MCS_PANSET 0xB3A6  /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2  /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4  /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181  /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1  /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480  /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A  /* Command not documented */
+#define MCS_PWR_CTRL1  0xC580  /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2  0xC590  /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4  0xC5B0  /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80  /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90  /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0  /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0  /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0  /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0  /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0  /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0  /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80  /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90  /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0  /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0  /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0  /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0  /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80  /* GOA VST Setting */
+#define MCS_GOACLKA1   0xCEA0  /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3   0xCEB0  /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0  /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0  /* Command not documented */
+#define MCS_GVDDSET0xD800  /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900  /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P   0xE100  /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N   0xE200  /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6  /* Command not documented */
+#define MCS_CMD2_ENA1  0xFF00  /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2  0xFF80  /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+   struct udevice *reg;
+   struct gpio_desc reset;
+};
+
+static void otm8009a_dcs_write_buf(struct udevice *dev