subject:"\[PATCH v3, 27\/27\] drm\/mediatek\: add support for mediatek SOC MT8183"

Re: [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183

2019-06-16 Thread CK Hu

Hi, Yongqiang:

On Wed, 2019-06-05 at 19:43 +0800, yongqiang@mediatek.com wrote:
> From: Yongqiang Niu 
> 
> This patch add support for mediatek SOC MT8183
> 1.ovl_2l share driver with ovl
> 2.rdma1 share drive with rdma0, but fifo size is different
> 3.add mt8183 mutex private data, and mmsys private data
> 4.add mt8183 main and external path module for crtc create
> 
> Signed-off-by: Yongqiang Niu 
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c |  18 +
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c|  12 
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 107 
> 
>  drivers/gpu/drm/mediatek/mtk_drm_ddp.h  |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c  |  47 
>  6 files changed, 186 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 63072d1..efd41aa 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -382,11 +382,29 @@ static int mtk_disp_ovl_remove(struct platform_device 
> *pdev)
>   .fmt_rgb565_is_0 = true,
>  };
>  
> +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> + .addr = DISP_REG_OVL_ADDR_MT8173,
> + .gmc_bits = 10,
> + .layer_nr = 4,
> + .fmt_rgb565_is_0 = true,
> +};
> +
> +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> + .addr = DISP_REG_OVL_ADDR_MT8173,
> + .gmc_bits = 10,
> + .layer_nr = 2,
> + .fmt_rgb565_is_0 = true,
> +};
> +
>  static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
>   { .compatible = "mediatek,mt2701-disp-ovl",
> .data = _ovl_driver_data},
>   { .compatible = "mediatek,mt8173-disp-ovl",
> .data = _ovl_driver_data},
> + { .compatible = "mediatek,mt8183-disp-ovl",
> +   .data = _ovl_driver_data},
> + { .compatible = "mediatek,mt8183-disp-ovl-2l",
> +   .data = _ovl_2l_driver_data},
>   {},
>  };
>  MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index b0a5cff..5d62588 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -336,11 +336,23 @@ static int mtk_disp_rdma_remove(struct platform_device 
> *pdev)
>   .fifo_size = SZ_8K,
>  };
>  
> +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {
> + .fifo_size = 5 * SZ_1K,
> +};
> +
> +static const struct mtk_disp_rdma_data mt8183_rdma1_driver_data = {
> + .fifo_size = SZ_2K,
> +};
> +
>  static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
>   { .compatible = "mediatek,mt2701-disp-rdma",
> .data = _rdma_driver_data},
>   { .compatible = "mediatek,mt8173-disp-rdma",
> .data = _rdma_driver_data},
> + { .compatible = "mediatek,mt8183-disp-rdma",
> +   .data = _rdma_driver_data},
> + { .compatible = "mediatek,mt8183-disp-rdma1",

"mediatek,mt8183-disp-rdma1" does not exist in binding document.

> +   .data = _rdma1_driver_data},
>   {},
>  };
>  MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 28274d2..eaf2351 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -41,8 +41,36 @@
>  #define DISP_REG_CONFIG_DSI_SEL  0x050
>  #define DISP_REG_CONFIG_DPI_SEL  0x064
>  
> +#define MT8183_DISP_OVL0_MOUT_EN 0xF00
> +#define OVL0_MOUT_EN_DISP_PATH0  BIT(0)
> +#define OVL0_MOUT_EN_OVL0_2L BIT(4)
> +#define MT8183_DISP_OVL0_2L_MOUT_EN  0xF04
> +#define OVL0_2L_MOUT_EN_DISP_PATH0   BIT(0)
> +#define MT8183_DISP_OVL1_2L_MOUT_EN  0xF08
> +#define OVL1_2L_MOUT_EN_RDMA1BIT(4)
> +#define MT8183_DISP_DITHER0_MOUT_EN  0xF0C
> +#define DITHER0_MOUT_IN_DSI0 BIT(0)
> +#define MT8183_DISP_PATH0_SEL_IN 0xF24
> +#define DISP_PATH0_SEL_IN_OVL0   0x0
> +#define DISP_PATH0_SEL_IN_OVL0_2L0x1
> +#define MT8183_DISP_DSI0_SEL_IN  0xF2C
> +#define DSI0_SEL_IN_DITHER   0x0
> +#define DSI0_SEL_IN_RDMA00x1
> +#define MT8183_DSI0_SEL_IN_RDMA1 0x3
> +#define MT8183_DISP_DPI0_SEL_IN  0xF30
> +#define MT8183_DPI0_SEL_IN_RDMA0 0x1
> +#define MT8183_DPI0_SEL_IN_RDMA1 0x2
> +#define MT8183_DISP_RDMA0_SOUT_SEL_IN0xF50
> +#define MT8183_RDMA0_SOUT_DSI0   0x0
> +#define MT8183_RDMA0_SOUT_COLOR0 0x1
> +#define

[PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183

2019-06-05 Thread yongqiang.niu

From: Yongqiang Niu 

This patch add support for mediatek SOC MT8183
1.ovl_2l share driver with ovl
2.rdma1 share drive with rdma0, but fifo size is different
3.add mt8183 mutex private data, and mmsys private data
4.add mt8183 main and external path module for crtc create

Signed-off-by: Yongqiang Niu 
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c |  18 +
 drivers/gpu/drm/mediatek/mtk_disp_rdma.c|  12 
 drivers/gpu/drm/mediatek/mtk_drm_ddp.c  | 107 
 drivers/gpu/drm/mediatek/mtk_drm_ddp.h  |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.c  |  47 
 6 files changed, 186 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 63072d1..efd41aa 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -382,11 +382,29 @@ static int mtk_disp_ovl_remove(struct platform_device 
*pdev)
.fmt_rgb565_is_0 = true,
 };
 
+static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
+   .addr = DISP_REG_OVL_ADDR_MT8173,
+   .gmc_bits = 10,
+   .layer_nr = 4,
+   .fmt_rgb565_is_0 = true,
+};
+
+static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
+   .addr = DISP_REG_OVL_ADDR_MT8173,
+   .gmc_bits = 10,
+   .layer_nr = 2,
+   .fmt_rgb565_is_0 = true,
+};
+
 static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
{ .compatible = "mediatek,mt2701-disp-ovl",
  .data = _ovl_driver_data},
{ .compatible = "mediatek,mt8173-disp-ovl",
  .data = _ovl_driver_data},
+   { .compatible = "mediatek,mt8183-disp-ovl",
+ .data = _ovl_driver_data},
+   { .compatible = "mediatek,mt8183-disp-ovl-2l",
+ .data = _ovl_2l_driver_data},
{},
 };
 MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c 
b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index b0a5cff..5d62588 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -336,11 +336,23 @@ static int mtk_disp_rdma_remove(struct platform_device 
*pdev)
.fifo_size = SZ_8K,
 };
 
+static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {
+   .fifo_size = 5 * SZ_1K,
+};
+
+static const struct mtk_disp_rdma_data mt8183_rdma1_driver_data = {
+   .fifo_size = SZ_2K,
+};
+
 static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
{ .compatible = "mediatek,mt2701-disp-rdma",
  .data = _rdma_driver_data},
{ .compatible = "mediatek,mt8173-disp-rdma",
  .data = _rdma_driver_data},
+   { .compatible = "mediatek,mt8183-disp-rdma",
+ .data = _rdma_driver_data},
+   { .compatible = "mediatek,mt8183-disp-rdma1",
+ .data = _rdma1_driver_data},
{},
 };
 MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 28274d2..eaf2351 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -41,8 +41,36 @@
 #define DISP_REG_CONFIG_DSI_SEL0x050
 #define DISP_REG_CONFIG_DPI_SEL0x064
 
+#define MT8183_DISP_OVL0_MOUT_EN   0xF00
+#define OVL0_MOUT_EN_DISP_PATH0BIT(0)
+#define OVL0_MOUT_EN_OVL0_2L   BIT(4)
+#define MT8183_DISP_OVL0_2L_MOUT_EN0xF04
+#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
+#define MT8183_DISP_OVL1_2L_MOUT_EN0xF08
+#define OVL1_2L_MOUT_EN_RDMA1  BIT(4)
+#define MT8183_DISP_DITHER0_MOUT_EN0xF0C
+#define DITHER0_MOUT_IN_DSI0   BIT(0)
+#define MT8183_DISP_PATH0_SEL_IN   0xF24
+#define DISP_PATH0_SEL_IN_OVL0 0x0
+#define DISP_PATH0_SEL_IN_OVL0_2L  0x1
+#define MT8183_DISP_DSI0_SEL_IN0xF2C
+#define DSI0_SEL_IN_DITHER 0x0
+#define DSI0_SEL_IN_RDMA0  0x1
+#define MT8183_DSI0_SEL_IN_RDMA1   0x3
+#define MT8183_DISP_DPI0_SEL_IN0xF30
+#define MT8183_DPI0_SEL_IN_RDMA0   0x1
+#define MT8183_DPI0_SEL_IN_RDMA1   0x2
+#define MT8183_DISP_RDMA0_SOUT_SEL_IN  0xF50
+#define MT8183_RDMA0_SOUT_DSI0 0x0
+#define MT8183_RDMA0_SOUT_COLOR0   0x1
+#define MT8183_DISP_RDMA1_SOUT_SEL_IN  0xF54
+#define MT8183_RDMA1_SOUT_DPI0 0x0
+#define MT8183_RDMA1_SOUT_DSI0 0x1
+
 #define MT2701_DISP_MUTEX0_MOD00x2c
 #define MT2701_DISP_MUTEX0_SOF00x2c
+#define

Re: [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183

[PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183

2 matches

Site Navigation

Mail list logo

Footer information