subject:"\[PATCH v3 01\/10\] pwm\: extend PWM framework with PWM modes"

Re: [PATCH v3 01/10] pwm: extend PWM framework with PWM modes

2018-02-26 Thread Claudiu Beznea

I'll rebase it on latest for-next in next version.

Thank you,
Claudiu Beznea

On 24.02.2018 22:49, kbuild test robot wrote:
> Hi Claudiu,
> 
> Thank you for the patch! Perhaps something to improve:
> 
> [auto build test WARNING on pwm/for-next]
> [also build test WARNING on v4.16-rc2 next-20180223]
> [if your patch is applied to the wrong git tree, please drop us a note to 
> help improve the system]
> 
> url:
> https://github.com/0day-ci/linux/commits/Claudiu-Beznea/extend-PWM-framework-to-support-PWM-modes/20180225-024011
> base:   
> https://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git 
> for-next
> config: xtensa-allmodconfig (attached as .config)
> compiler: xtensa-linux-gcc (GCC) 7.2.0
> reproduce:
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> make.cross ARCH=xtensa 
> 
> All warnings (new ones prefixed by >>):
> 
>>> drivers//pwm/pwm-sun4i.c:36:0: warning: "PWM_MODE" redefined
> #define PWM_MODE  BIT(7)
> 
>In file included from drivers//pwm/pwm-sun4i.c:19:0:
>include/linux/pwm.h:40:0: note: this is the location of the previous 
> definition
> #define PWM_MODE(name)  BIT(PWM_MODE_##name##_BIT)
> 
> 
> vim +/PWM_MODE +36 drivers//pwm/pwm-sun4i.c
> 
> 09853ce7 Alexandre Belloni 2014-12-17  29  
> 09853ce7 Alexandre Belloni 2014-12-17  30  #define PWMCH_OFFSET   
> 15
> 09853ce7 Alexandre Belloni 2014-12-17  31  #define PWM_PRESCAL_MASK   
> GENMASK(3, 0)
> 09853ce7 Alexandre Belloni 2014-12-17  32  #define PWM_PRESCAL_OFF> 0
> 09853ce7 Alexandre Belloni 2014-12-17  33  #define PWM_EN 
> BIT(4)
> 09853ce7 Alexandre Belloni 2014-12-17  34  #define PWM_ACT_STATE  
> BIT(5)
> 09853ce7 Alexandre Belloni 2014-12-17  35  #define PWM_CLK_GATING 
> BIT(6)
> 09853ce7 Alexandre Belloni 2014-12-17 @36  #define PWM_MODE   BIT(7)
> 09853ce7 Alexandre Belloni 2014-12-17  37  #define PWM_PULSE  BIT(8)
> 09853ce7 Alexandre Belloni 2014-12-17  38  #define PWM_BYPASS BIT(9)
> 09853ce7 Alexandre Belloni 2014-12-17  39  
> 
> :: The code at line 36 was first introduced by commit
> :: 09853ce7bc1003a490c7ee74a5705d7a7cf16b7d pwm: Add Allwinner SoC support
> 
> :: TO: Alexandre Belloni 
> :: CC: Thierry Reding 
> 
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all   Intel Corporation
> 
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH v3 01/10] pwm: extend PWM framework with PWM modes

2018-02-25 Thread kbuild test robot

Hi Claudiu,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on pwm/for-next]
[also build test WARNING on v4.16-rc2 next-20180223]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Claudiu-Beznea/extend-PWM-framework-to-support-PWM-modes/20180225-024011
base:   
https://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git 
for-next
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 7.2.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=xtensa 

All warnings (new ones prefixed by >>):

>> drivers//pwm/pwm-sun4i.c:36:0: warning: "PWM_MODE" redefined
#define PWM_MODE  BIT(7)

   In file included from drivers//pwm/pwm-sun4i.c:19:0:
   include/linux/pwm.h:40:0: note: this is the location of the previous 
definition
#define PWM_MODE(name)  BIT(PWM_MODE_##name##_BIT)


vim +/PWM_MODE +36 drivers//pwm/pwm-sun4i.c

09853ce7 Alexandre Belloni 2014-12-17  29  
09853ce7 Alexandre Belloni 2014-12-17  30  #define PWMCH_OFFSET 15
09853ce7 Alexandre Belloni 2014-12-17  31  #define PWM_PRESCAL_MASK 
GENMASK(3, 0)
09853ce7 Alexandre Belloni 2014-12-17  32  #define PWM_PRESCAL_OFF  0
09853ce7 Alexandre Belloni 2014-12-17  33  #define PWM_EN   
BIT(4)
09853ce7 Alexandre Belloni 2014-12-17  34  #define PWM_ACT_STATE
BIT(5)
09853ce7 Alexandre Belloni 2014-12-17  35  #define PWM_CLK_GATING   
BIT(6)
09853ce7 Alexandre Belloni 2014-12-17 @36  #define PWM_MODE BIT(7)
09853ce7 Alexandre Belloni 2014-12-17  37  #define PWM_PULSEBIT(8)
09853ce7 Alexandre Belloni 2014-12-17  38  #define PWM_BYPASS   BIT(9)
09853ce7 Alexandre Belloni 2014-12-17  39  

:: The code at line 36 was first introduced by commit
:: 09853ce7bc1003a490c7ee74a5705d7a7cf16b7d pwm: Add Allwinner SoC support

:: TO: Alexandre Belloni 
:: CC: Thierry Reding 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH v3 01/10] pwm: extend PWM framework with PWM modes

2018-02-23 Thread Claudiu Beznea

Add basic PWM modes: normal and complementary. These modes should
differentiate the single output PWM channels from two outputs PWM
channels. These modes could be set as follow:
1. PWM channels with one output per channel:
- normal mode
2. PWM channels with two outputs per channel:
- normal mode
- complementary mode
Since users could use a PWM channel with two output as one output PWM
channel, the PWM normal mode is allowed to be set for PWM channels with
two outputs; in fact PWM normal mode should be supported by all PWMs.

The PWM capabilities were implemented per PWM channel. Every PWM controller
will register a function to get PWM capabilities. If this is not explicitly
set by the driver a default function will be used to retrieve the the PWM
capabilities (in this case the PWM capabilities will contain only PWM
normal mode). This function is set in pwmchip_add_with_polarity() as a
member of "struct pwm_chip". To retrieve capabilities the pwm_get_caps()
function could be used.

Every PWM channel will have associated a mode in the PWM state. Proper
helper functions were added to get/set PWM mode. The mode could also be set
from DT via flag cells. The valid DT modes could be located in
include/dt-bindings/pwm/pwm.h. Only modes supported by PWM channel could be
set. If nothing is specified for a PWM channel, via DT, the first available
mode will be used (normally, this will be PWM normal mode).

Signed-off-by: Claudiu Beznea 
---
 drivers/pwm/core.c  | 98 ++---
 drivers/pwm/sysfs.c | 56 ++
 include/linux/pwm.h | 87 +++
 3 files changed, 237 insertions(+), 4 deletions(-)

diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
index 1581f6ab1b1f..16a409d452c0 100644
--- a/drivers/pwm/core.c
+++ b/drivers/pwm/core.c
@@ -136,6 +136,8 @@ struct pwm_device *
 of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct of_phandle_args 
*args)
 {
struct pwm_device *pwm;
+   struct pwm_caps caps;
+   int modebit;
 
/* check, whether the driver supports a third cell for flags */
if (pc->of_pwm_n_cells < 3)
@@ -152,11 +154,23 @@ of_pwm_xlate_with_flags(struct pwm_chip *pc, const struct 
of_phandle_args *args)
if (IS_ERR(pwm))
return pwm;
 
+   pwm_get_caps(pc, pwm, );
+
pwm->args.period = args->args[1];
pwm->args.polarity = PWM_POLARITY_NORMAL;
+   pwm->args.mode = BIT(ffs(caps.modes) - 1);
+
+   if (args->args_count > 2) {
+   if (args->args[2] & PWM_POLARITY_INVERTED)
+   pwm->args.polarity = PWM_POLARITY_INVERSED;
 
-   if (args->args_count > 2 && args->args[2] & PWM_POLARITY_INVERTED)
-   pwm->args.polarity = PWM_POLARITY_INVERSED;
+   for (modebit = PWM_MODE_COMPLEMENTARY_BIT;
+modebit < PWM_MODE_CNT; modebit++)
+   if (args->args[2] & BIT(modebit)) {
+   pwm->args.mode = BIT(modebit);
+   break;
+   }
+   }
 
return pwm;
 }
@@ -166,6 +180,7 @@ static struct pwm_device *
 of_pwm_simple_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
 {
struct pwm_device *pwm;
+   struct pwm_caps caps;
 
/* sanity check driver support */
if (pc->of_pwm_n_cells < 2)
@@ -182,7 +197,9 @@ of_pwm_simple_xlate(struct pwm_chip *pc, const struct 
of_phandle_args *args)
if (IS_ERR(pwm))
return pwm;
 
+   pwm_get_caps(pc, pwm, );
pwm->args.period = args->args[1];
+   pwm->args.mode = BIT(ffs(caps.modes) - 1);
 
return pwm;
 }
@@ -250,6 +267,39 @@ static bool pwm_ops_check(const struct pwm_ops *ops)
 }
 
 /**
+ * pwm_get_caps() - get PWM capabilities
+ * @chip: PWM chip
+ * @pwm: PWM device to get the capabilities for
+ * @caps: returned capabilities
+ *
+ * Retrievers capabilities for PWM device.
+ */
+void pwm_get_caps(struct pwm_chip *chip, struct pwm_device *pwm,
+ struct pwm_caps *caps)
+{
+   if (!chip || !pwm || !caps)
+   return;
+
+   if (chip->ops && chip->ops->get_caps)
+   pwm->chip->ops->get_caps(chip, pwm, caps);
+   else if (chip->get_default_caps)
+   chip->get_default_caps(caps);
+}
+EXPORT_SYMBOL_GPL(pwm_get_caps);
+
+static void pwmchip_get_default_caps(struct pwm_caps *caps)
+{
+   static const struct pwm_caps default_caps = {
+   .modes = PWM_MODE(NORMAL),
+   };
+
+   if (!caps)
+   return;
+
+   *caps = default_caps;
+}
+
+/**
  * pwmchip_add_with_polarity() - register a new PWM chip
  * @chip: the PWM chip to add
  * @polarity: initial polarity of PWM channels
@@ -264,7 +314,8 @@ int pwmchip_add_with_polarity(struct pwm_chip *chip,
  enum pwm_polarity polarity)
 {
struct

Re: [PATCH v3 01/10] pwm: extend PWM framework with PWM modes

Re: [PATCH v3 01/10] pwm: extend PWM framework with PWM modes

[PATCH v3 01/10] pwm: extend PWM framework with PWM modes

3 matches

Site Navigation

Mail list logo

Footer information