Re: [PATCH v3 13/16] drm/tegra: Restrict IOVA space to DMA mask

2019-02-01 Thread Dmitry Osipenko
01.02.2019 16:28, Thierry Reding пишет: > From: Thierry Reding > > On Tegra186 and later, the ARM SMMU provides an input address space that > is 48 bits wide. However, memory clients can only address up to 40 bits. > If the geometry is used as-is, allocations of IOVA space can end up in a >

[PATCH v3 13/16] drm/tegra: Restrict IOVA space to DMA mask

2019-02-01 Thread Thierry Reding
From: Thierry Reding On Tegra186 and later, the ARM SMMU provides an input address space that is 48 bits wide. However, memory clients can only address up to 40 bits. If the geometry is used as-is, allocations of IOVA space can end up in a region that cannot be addressed by the memory clients.