Re: [PATCH v2 2/2] drm/komeda: Enable new product D32 support

2019-12-05 Thread Mihail Atanassov
On Thursday, 5 December 2019 08:53:02 GMT james qian wang (Arm Technology 
China) wrote:
> On Tue, Dec 03, 2019 at 09:59:57AM +, Mihail Atanassov wrote:
> > On Tuesday, 3 December 2019 06:46:06 GMT james qian wang (Arm Technology 
> > China) wrote:
> > > On Mon, Dec 02, 2019 at 11:07:52AM +, Mihail Atanassov wrote:
> > > > On Thursday, 21 November 2019 08:17:45 GMT james qian wang (Arm 
> > > > Technology China) wrote:
> > > > > D32 is simple version of D71, the difference is:
> > > > > - Only has one pipeline
> > > > > - Drop the periph block and merge it to GCU
> > > > > 
> > > > > v2: Rebase.
> > > > > 
> > > > > Signed-off-by: James Qian Wang (Arm Technology China) 
> > > > > 
> > > > > ---
> > > > >  .../drm/arm/display/include/malidp_product.h  |  3 +-
> > > > >  .../arm/display/komeda/d71/d71_component.c|  2 +-
> > > > >  .../gpu/drm/arm/display/komeda/d71/d71_dev.c  | 43 
> > > > > ---
> > > > >  .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 ++
> > > > >  .../gpu/drm/arm/display/komeda/komeda_drv.c   |  1 +
> > > > >  5 files changed, 44 insertions(+), 18 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h 
> > > > > b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > > index 96e2e4016250..dbd3d4765065 100644
> > > > > --- a/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > > +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > > @@ -18,7 +18,8 @@
> > > > >  #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 
> > > > > 0xFF)
> > > > >  
> > > > >  /* Mali-display product IDs */
> > > > > -#define MALIDP_D71_PRODUCT_ID   0x0071
> > > > > +#define MALIDP_D71_PRODUCT_ID0x0071
> > > > > +#define MALIDP_D32_PRODUCT_ID0x0032
> > > > >  
> > > > >  union komeda_config_id {
> > > > >   struct {
> > > > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> > > > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > > index 6dadf4413ef3..c7f7e9c545c7 100644
> > > > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > > @@ -1274,7 +1274,7 @@ static int d71_timing_ctrlr_init(struct d71_dev 
> > > > > *d71,
> > > > >  
> > > > >   ctrlr = to_ctrlr(c);
> > > > >  
> > > > > - ctrlr->supports_dual_link = true;
> > > > > + ctrlr->supports_dual_link = d71->supports_dual_link;
> > > > >  
> > > > >   return 0;
> > > > >  }
> > > > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> > > > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > > index 9b3bf353b6cc..2d429e310e5b 100644
> > > > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > > @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev 
> > > > > *mdev)
> > > > >   goto err_cleanup;
> > > > >   }
> > > > >  
> > > > > - /* probe PERIPH */
> > > > > + /* Only the legacy HW has the periph block, the newer merges 
> > > > > the periph
> > > > > +  * into GCU
> > > > > +  */
> > > > >   value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
> > > > > - if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
> > > > > - DRM_ERROR("access blk periph but got blk: %d.\n",
> > > > > -   BLOCK_INFO_BLK_TYPE(value));
> > > > > - err = -EINVAL;
> > > > > - goto err_cleanup;
> > > > > + if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
> > > > > + d71->periph_addr = NULL;
> > > > > +
> > > > > + if (d71->periph_addr) {
> > > > > + /* probe PERIPHERAL in legacy HW */
> > > > > + value = malidp_read32(d71->periph_addr, 
> > > > > PERIPH_CONFIGURATION_ID);
> > > > > +
> > > > > + d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE 
> > > > > ? 4096 : 2048;
> > > > > + d71->max_vsize  = 4096;
> > > > > + d71->num_rich_layers= value & 
> > > > > PERIPH_NUM_RICH_LAYERS ? 2 : 1;
> > > > > + d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
> > > > > + d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
> > > > > + } else {
> > > > > + value = malidp_read32(d71->gcu_addr, 
> > > > > GCU_CONFIGURATION_ID0);
> > > > > + d71->max_line_size  = GCU_MAX_LINE_SIZE(value);
> > > > > + d71->max_vsize  = GCU_MAX_NUM_LINES(value);
> > > > > +
> > > > > + value = malidp_read32(d71->gcu_addr, 
> > > > > GCU_CONFIGURATION_ID1);
> > > > > + d71->num_rich_layers= GCU_NUM_RICH_LAYERS(value);
> > > > > + d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
> > > > > + d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
> > > > >   }
> > > > >  
> > > > > - 

Re: [PATCH v2 2/2] drm/komeda: Enable new product D32 support

2019-12-05 Thread james qian wang (Arm Technology China)
On Tue, Dec 03, 2019 at 09:59:57AM +, Mihail Atanassov wrote:
> On Tuesday, 3 December 2019 06:46:06 GMT james qian wang (Arm Technology 
> China) wrote:
> > On Mon, Dec 02, 2019 at 11:07:52AM +, Mihail Atanassov wrote:
> > > On Thursday, 21 November 2019 08:17:45 GMT james qian wang (Arm 
> > > Technology China) wrote:
> > > > D32 is simple version of D71, the difference is:
> > > > - Only has one pipeline
> > > > - Drop the periph block and merge it to GCU
> > > > 
> > > > v2: Rebase.
> > > > 
> > > > Signed-off-by: James Qian Wang (Arm Technology China) 
> > > > 
> > > > ---
> > > >  .../drm/arm/display/include/malidp_product.h  |  3 +-
> > > >  .../arm/display/komeda/d71/d71_component.c|  2 +-
> > > >  .../gpu/drm/arm/display/komeda/d71/d71_dev.c  | 43 ---
> > > >  .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 ++
> > > >  .../gpu/drm/arm/display/komeda/komeda_drv.c   |  1 +
> > > >  5 files changed, 44 insertions(+), 18 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h 
> > > > b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > index 96e2e4016250..dbd3d4765065 100644
> > > > --- a/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > > @@ -18,7 +18,8 @@
> > > >  #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 
> > > > 0xFF)
> > > >  
> > > >  /* Mali-display product IDs */
> > > > -#define MALIDP_D71_PRODUCT_ID   0x0071
> > > > +#define MALIDP_D71_PRODUCT_ID  0x0071
> > > > +#define MALIDP_D32_PRODUCT_ID  0x0032
> > > >  
> > > >  union komeda_config_id {
> > > > struct {
> > > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> > > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > index 6dadf4413ef3..c7f7e9c545c7 100644
> > > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > > @@ -1274,7 +1274,7 @@ static int d71_timing_ctrlr_init(struct d71_dev 
> > > > *d71,
> > > >  
> > > > ctrlr = to_ctrlr(c);
> > > >  
> > > > -   ctrlr->supports_dual_link = true;
> > > > +   ctrlr->supports_dual_link = d71->supports_dual_link;
> > > >  
> > > > return 0;
> > > >  }
> > > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> > > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > index 9b3bf353b6cc..2d429e310e5b 100644
> > > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > > @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev 
> > > > *mdev)
> > > > goto err_cleanup;
> > > > }
> > > >  
> > > > -   /* probe PERIPH */
> > > > +   /* Only the legacy HW has the periph block, the newer merges 
> > > > the periph
> > > > +* into GCU
> > > > +*/
> > > > value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
> > > > -   if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
> > > > -   DRM_ERROR("access blk periph but got blk: %d.\n",
> > > > - BLOCK_INFO_BLK_TYPE(value));
> > > > -   err = -EINVAL;
> > > > -   goto err_cleanup;
> > > > +   if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
> > > > +   d71->periph_addr = NULL;
> > > > +
> > > > +   if (d71->periph_addr) {
> > > > +   /* probe PERIPHERAL in legacy HW */
> > > > +   value = malidp_read32(d71->periph_addr, 
> > > > PERIPH_CONFIGURATION_ID);
> > > > +
> > > > +   d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE 
> > > > ? 4096 : 2048;
> > > > +   d71->max_vsize  = 4096;
> > > > +   d71->num_rich_layers= value & 
> > > > PERIPH_NUM_RICH_LAYERS ? 2 : 1;
> > > > +   d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
> > > > +   d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
> > > > +   } else {
> > > > +   value = malidp_read32(d71->gcu_addr, 
> > > > GCU_CONFIGURATION_ID0);
> > > > +   d71->max_line_size  = GCU_MAX_LINE_SIZE(value);
> > > > +   d71->max_vsize  = GCU_MAX_NUM_LINES(value);
> > > > +
> > > > +   value = malidp_read32(d71->gcu_addr, 
> > > > GCU_CONFIGURATION_ID1);
> > > > +   d71->num_rich_layers= GCU_NUM_RICH_LAYERS(value);
> > > > +   d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
> > > > +   d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
> > > > }
> > > >  
> > > > -   value = malidp_read32(d71->periph_addr, 
> > > > PERIPH_CONFIGURATION_ID);
> > > > -
> > > > -   d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 
> > > > 2048;
> > > > -   d71->max_vsize  = 4096;
> > > > -   

Re: [PATCH v2 2/2] drm/komeda: Enable new product D32 support

2019-12-03 Thread Mihail Atanassov
On Tuesday, 3 December 2019 06:46:06 GMT james qian wang (Arm Technology China) 
wrote:
> On Mon, Dec 02, 2019 at 11:07:52AM +, Mihail Atanassov wrote:
> > On Thursday, 21 November 2019 08:17:45 GMT james qian wang (Arm Technology 
> > China) wrote:
> > > D32 is simple version of D71, the difference is:
> > > - Only has one pipeline
> > > - Drop the periph block and merge it to GCU
> > > 
> > > v2: Rebase.
> > > 
> > > Signed-off-by: James Qian Wang (Arm Technology China) 
> > > 
> > > ---
> > >  .../drm/arm/display/include/malidp_product.h  |  3 +-
> > >  .../arm/display/komeda/d71/d71_component.c|  2 +-
> > >  .../gpu/drm/arm/display/komeda/d71/d71_dev.c  | 43 ---
> > >  .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 ++
> > >  .../gpu/drm/arm/display/komeda/komeda_drv.c   |  1 +
> > >  5 files changed, 44 insertions(+), 18 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h 
> > > b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > index 96e2e4016250..dbd3d4765065 100644
> > > --- a/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > > @@ -18,7 +18,8 @@
> > >  #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 
> > > 0xFF)
> > >  
> > >  /* Mali-display product IDs */
> > > -#define MALIDP_D71_PRODUCT_ID   0x0071
> > > +#define MALIDP_D71_PRODUCT_ID0x0071
> > > +#define MALIDP_D32_PRODUCT_ID0x0032
> > >  
> > >  union komeda_config_id {
> > >   struct {
> > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > index 6dadf4413ef3..c7f7e9c545c7 100644
> > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > > @@ -1274,7 +1274,7 @@ static int d71_timing_ctrlr_init(struct d71_dev 
> > > *d71,
> > >  
> > >   ctrlr = to_ctrlr(c);
> > >  
> > > - ctrlr->supports_dual_link = true;
> > > + ctrlr->supports_dual_link = d71->supports_dual_link;
> > >  
> > >   return 0;
> > >  }
> > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> > > b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > index 9b3bf353b6cc..2d429e310e5b 100644
> > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > > @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev 
> > > *mdev)
> > >   goto err_cleanup;
> > >   }
> > >  
> > > - /* probe PERIPH */
> > > + /* Only the legacy HW has the periph block, the newer merges the periph
> > > +  * into GCU
> > > +  */
> > >   value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
> > > - if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
> > > - DRM_ERROR("access blk periph but got blk: %d.\n",
> > > -   BLOCK_INFO_BLK_TYPE(value));
> > > - err = -EINVAL;
> > > - goto err_cleanup;
> > > + if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
> > > + d71->periph_addr = NULL;
> > > +
> > > + if (d71->periph_addr) {
> > > + /* probe PERIPHERAL in legacy HW */
> > > + value = malidp_read32(d71->periph_addr, 
> > > PERIPH_CONFIGURATION_ID);
> > > +
> > > + d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 
> > > 2048;
> > > + d71->max_vsize  = 4096;
> > > + d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 
> > > 1;
> > > + d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
> > > + d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
> > > + } else {
> > > + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0);
> > > + d71->max_line_size  = GCU_MAX_LINE_SIZE(value);
> > > + d71->max_vsize  = GCU_MAX_NUM_LINES(value);
> > > +
> > > + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1);
> > > + d71->num_rich_layers= GCU_NUM_RICH_LAYERS(value);
> > > + d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
> > > + d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
> > >   }
> > >  
> > > - value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID);
> > > -
> > > - d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048;
> > > - d71->max_vsize  = 4096;
> > > - d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 1;
> > > - d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false;
> > > - d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false;
> > > -
> > >   for (i = 0; i < d71->num_pipelines; i++) {
> > >   pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline),
> > >  _pipeline_funcs);
> > > @@ -415,7 +425,7 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> > >   }
> > >  
> > >   /* loop the register blks and 

Re: [PATCH v2 2/2] drm/komeda: Enable new product D32 support

2019-12-02 Thread james qian wang (Arm Technology China)
On Mon, Dec 02, 2019 at 11:07:52AM +, Mihail Atanassov wrote:
> On Thursday, 21 November 2019 08:17:45 GMT james qian wang (Arm Technology 
> China) wrote:
> > D32 is simple version of D71, the difference is:
> > - Only has one pipeline
> > - Drop the periph block and merge it to GCU
> > 
> > v2: Rebase.
> > 
> > Signed-off-by: James Qian Wang (Arm Technology China) 
> > 
> > ---
> >  .../drm/arm/display/include/malidp_product.h  |  3 +-
> >  .../arm/display/komeda/d71/d71_component.c|  2 +-
> >  .../gpu/drm/arm/display/komeda/d71/d71_dev.c  | 43 ---
> >  .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 ++
> >  .../gpu/drm/arm/display/komeda/komeda_drv.c   |  1 +
> >  5 files changed, 44 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h 
> > b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > index 96e2e4016250..dbd3d4765065 100644
> > --- a/drivers/gpu/drm/arm/display/include/malidp_product.h
> > +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
> > @@ -18,7 +18,8 @@
> >  #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF)
> >  
> >  /* Mali-display product IDs */
> > -#define MALIDP_D71_PRODUCT_ID   0x0071
> > +#define MALIDP_D71_PRODUCT_ID  0x0071
> > +#define MALIDP_D32_PRODUCT_ID  0x0032
> >  
> >  union komeda_config_id {
> > struct {
> > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> > b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > index 6dadf4413ef3..c7f7e9c545c7 100644
> > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> > @@ -1274,7 +1274,7 @@ static int d71_timing_ctrlr_init(struct d71_dev *d71,
> >  
> > ctrlr = to_ctrlr(c);
> >  
> > -   ctrlr->supports_dual_link = true;
> > +   ctrlr->supports_dual_link = d71->supports_dual_link;
> >  
> > return 0;
> >  }
> > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> > b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > index 9b3bf353b6cc..2d429e310e5b 100644
> > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> > @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> > goto err_cleanup;
> > }
> >  
> > -   /* probe PERIPH */
> > +   /* Only the legacy HW has the periph block, the newer merges the periph
> > +* into GCU
> > +*/
> > value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
> > -   if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
> > -   DRM_ERROR("access blk periph but got blk: %d.\n",
> > - BLOCK_INFO_BLK_TYPE(value));
> > -   err = -EINVAL;
> > -   goto err_cleanup;
> > +   if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
> > +   d71->periph_addr = NULL;
> > +
> > +   if (d71->periph_addr) {
> > +   /* probe PERIPHERAL in legacy HW */
> > +   value = malidp_read32(d71->periph_addr, 
> > PERIPH_CONFIGURATION_ID);
> > +
> > +   d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 
> > 2048;
> > +   d71->max_vsize  = 4096;
> > +   d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 
> > 1;
> > +   d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
> > +   d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
> > +   } else {
> > +   value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0);
> > +   d71->max_line_size  = GCU_MAX_LINE_SIZE(value);
> > +   d71->max_vsize  = GCU_MAX_NUM_LINES(value);
> > +
> > +   value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1);
> > +   d71->num_rich_layers= GCU_NUM_RICH_LAYERS(value);
> > +   d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
> > +   d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
> > }
> >  
> > -   value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID);
> > -
> > -   d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048;
> > -   d71->max_vsize  = 4096;
> > -   d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 1;
> > -   d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false;
> > -   d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false;
> > -
> > for (i = 0; i < d71->num_pipelines; i++) {
> > pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline),
> >_pipeline_funcs);
> > @@ -415,7 +425,7 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> > }
> >  
> > /* loop the register blks and probe */
> > -   i = 2; /* exclude GCU and PERIPH */
> > +   i = 1; /* exclude GCU */
> > offset = D71_BLOCK_SIZE; /* skip GCU */
> > while (i < d71->num_blocks) {
> > blk_base = mdev->reg_base + (offset >> 

Re: [PATCH v2 2/2] drm/komeda: Enable new product D32 support

2019-12-02 Thread Mihail Atanassov
On Thursday, 21 November 2019 08:17:45 GMT james qian wang (Arm Technology 
China) wrote:
> D32 is simple version of D71, the difference is:
> - Only has one pipeline
> - Drop the periph block and merge it to GCU
> 
> v2: Rebase.
> 
> Signed-off-by: James Qian Wang (Arm Technology China) 
> 
> ---
>  .../drm/arm/display/include/malidp_product.h  |  3 +-
>  .../arm/display/komeda/d71/d71_component.c|  2 +-
>  .../gpu/drm/arm/display/komeda/d71/d71_dev.c  | 43 ---
>  .../gpu/drm/arm/display/komeda/d71/d71_regs.h | 13 ++
>  .../gpu/drm/arm/display/komeda/komeda_drv.c   |  1 +
>  5 files changed, 44 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h 
> b/drivers/gpu/drm/arm/display/include/malidp_product.h
> index 96e2e4016250..dbd3d4765065 100644
> --- a/drivers/gpu/drm/arm/display/include/malidp_product.h
> +++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
> @@ -18,7 +18,8 @@
>  #define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF)
>  
>  /* Mali-display product IDs */
> -#define MALIDP_D71_PRODUCT_ID   0x0071
> +#define MALIDP_D71_PRODUCT_ID0x0071
> +#define MALIDP_D32_PRODUCT_ID0x0032
>  
>  union komeda_config_id {
>   struct {
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c 
> b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index 6dadf4413ef3..c7f7e9c545c7 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -1274,7 +1274,7 @@ static int d71_timing_ctrlr_init(struct d71_dev *d71,
>  
>   ctrlr = to_ctrlr(c);
>  
> - ctrlr->supports_dual_link = true;
> + ctrlr->supports_dual_link = d71->supports_dual_link;
>  
>   return 0;
>  }
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c 
> b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> index 9b3bf353b6cc..2d429e310e5b 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev *mdev)
>   goto err_cleanup;
>   }
>  
> - /* probe PERIPH */
> + /* Only the legacy HW has the periph block, the newer merges the periph
> +  * into GCU
> +  */
>   value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
> - if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
> - DRM_ERROR("access blk periph but got blk: %d.\n",
> -   BLOCK_INFO_BLK_TYPE(value));
> - err = -EINVAL;
> - goto err_cleanup;
> + if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
> + d71->periph_addr = NULL;
> +
> + if (d71->periph_addr) {
> + /* probe PERIPHERAL in legacy HW */
> + value = malidp_read32(d71->periph_addr, 
> PERIPH_CONFIGURATION_ID);
> +
> + d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 
> 2048;
> + d71->max_vsize  = 4096;
> + d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 
> 1;
> + d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
> + d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
> + } else {
> + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0);
> + d71->max_line_size  = GCU_MAX_LINE_SIZE(value);
> + d71->max_vsize  = GCU_MAX_NUM_LINES(value);
> +
> + value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1);
> + d71->num_rich_layers= GCU_NUM_RICH_LAYERS(value);
> + d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
> + d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
>   }
>  
> - value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID);
> -
> - d71->max_line_size  = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048;
> - d71->max_vsize  = 4096;
> - d71->num_rich_layers= value & PERIPH_NUM_RICH_LAYERS ? 2 : 1;
> - d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false;
> - d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false;
> -
>   for (i = 0; i < d71->num_pipelines; i++) {
>   pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline),
>  _pipeline_funcs);
> @@ -415,7 +425,7 @@ static int d71_enum_resources(struct komeda_dev *mdev)
>   }
>  
>   /* loop the register blks and probe */
> - i = 2; /* exclude GCU and PERIPH */
> + i = 1; /* exclude GCU */
>   offset = D71_BLOCK_SIZE; /* skip GCU */
>   while (i < d71->num_blocks) {
>   blk_base = mdev->reg_base + (offset >> 2);
> @@ -425,9 +435,9 @@ static int d71_enum_resources(struct komeda_dev *mdev)
>   err = d71_probe_block(d71, , blk_base);
>   if (err)
>