Hi Brian,
On Tue, 8 Dec 2015 16:17:41 -0800
Brian Norris wrote:
>
> > diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
> > index 43bded6..84d027e 100644
> > --- a/drivers/mtd/nand/cmx270_nand.c
> > +++ b/drivers/mtd/nand/cmx270_nand.c
>
Hi Brian,
On Tue, 8 Dec 2015 16:36:24 -0800
Brian Norris wrote:
> Hi,
>
> On Tue, Dec 01, 2015 at 12:02:57PM +0100, Boris Brezillon wrote:
> > Hello,
> >
> > This huge series aims at clarifying the relationship between the mtd and
> > nand_chip structures and
Hi Dan,
Many thanks for your comments.
2015-12-07 9:09 GMT+01:00 Dan Carpenter :
> On Fri, Dec 04, 2015 at 09:35:07AM +0100, Enric Balletbo i Serra wrote:
>> +static int sp_wait_aux_op_finish(struct anx78xx *anx78xx)
>> +{
>> + u8 errcnt;
>> + u8 val;
>> +
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This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: Greg Kroah-Hartman
Cc: Martyn Welch
Cc: Manohar Vanga
Cc:
On 24/11/15 22:31, J. German Rivera wrote:
> FSL-MC is a bus type different from PCI and platform, so it needs
> its own member in the msi_desc's union.
>
> Signed-off-by: J. German Rivera
Acked-by: Marc Zyngier
M.
--
Jazz is not
This patch fixes checkpatch.pl warning for visorchipset.c
CHECK: spaces preferred around that '*' (ctx:VxV)
+#define MAX_CONTROLVM_PAYLOAD_BYTES (1024*128)
Signed-off-by: Bhaktipriya Shridhar
---
drivers/staging/unisys/visorbus/visorchipset.c | 2 +-
1 file changed, 1
On 24/11/15 22:31, J. German Rivera wrote:
> Added platform-specific MSI support layer for FSL-MC devices.
>
> Signed-off-by: J. German Rivera
> ---
> CHANGE HISTORY
>
> Changes in v3: none
>
> Changes in v2: none
>
> drivers/staging/fsl-mc/bus/Makefile
On 24/11/15 22:31, J. German Rivera wrote:
> Since an FSL-MC bus is a new bus type that is neither PCI nor
> PLATFORM, we need a new domain bus token to disambiguate the
> IRQ domain for FSL-MC MSIs.
>
> Signed-off-by: J. German Rivera
Acked-by: Marc Zyngier
On 24/11/15 22:31, J. German Rivera wrote:
> Created an MSI domain for the fsl-mc bus-- including functions
> to create a domain, find a domain, alloc/free domain irqs, and
> bus specific overrides for domain and irq_chip ops.
>
> Signed-off-by: J. German Rivera
>
On 05/12/15 00:36, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> -Original Message-
> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> Sent: Wednesday, December 9, 2015 8:51 AM
> To: Jake Oshins ; gre...@linuxfoundation.org; KY
> Srinivasan ; linux-ker...@vger.kernel.org;
> de...@linuxdriverproject.org;
The third argument to function kportal_memhog_alloc is expected to
be gfp_t whereas the actual argument was unsigned int. Fix this by
explicitly typecasting to gfp_t
Signed-off-by: Niranjan Dighe
---
drivers/staging/lustre/lustre/libcfs/module.c | 2 +-
1 file changed,
Greg just recently replied to a similar patch rejecting it. I don't have his
response handy, but I bet you can find it in the archives. Briefly, this hides
possible errors rather than fixing them.
From: lustre-devel
From: Jake Oshins
This patch exposes the function that hv_vmbus.ko uses to make hypercalls.
This is necessary for retargeting an interrupt when it is given a new
affinity and vector.
Signed-off-by: Jake Oshins
---
drivers/hv/hv.c | 20
From: Jake Oshins
The Linux kernel already has the concpet of IRQ domain, wherein a
component can expose a set of IRQs which are managed by a particular
interrupt controller chip or other subsystem. The PCI driver exposes
the notion of an IRQ domain for Message-Signaled
From: Jake Oshins
This patch exposes the mapping between Linux CPU number and Hyper-V
virtual processor number. This is necessary because the hypervisor needs
to know which virtual processor to target when making a mapping in the
Interrupt Redirection Table in the I/O MMU.
From: Jake Oshins
This patch adds a second way of finding an IRQ domain associated with
a root PCI bus. After looking to see if one can be found through
the OF tree, it attempts to look up the IRQ domain through an
fwnode_handle stored in the pci_sysdata struct.
From: Jake Oshins
This defines the channel type for PCI front-ends in Hyper-V VMs.
Signed-off-by: Jake Oshins
---
include/linux/hyperv.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
On Wed, Dec 09, 2015 at 03:46:02PM -0800, Benjamin Young wrote:
> From f18a3e5f155f5258d2d19ac6b56bfaafa2ad470b Mon Sep 17 00:00:00 2001
> From: Benjamin Young
> Date: Wed, 9 Dec 2015 13:45:00 -0800
> Subject: [PATCH] Fixed coding style problems based on checkpatch.pl for
>
Hi Jake,
[auto build test WARNING on pci/next]
[also build test WARNING on v4.4-rc4 next-20151209]
url:
https://github.com/0day-ci/linux/commits/jakeo-microsoft-com/PCI-hv-New-paravirtual-PCI-front-end-for-Hyper-V-VMs/20151210-070027
base: https://git.kernel.org/pub/scm/linux/kernel/git
I found this by chance. I don't have a specific bug caused by this.
Cc: Vitaly Kuznetsov
Cc: "K. Y. Srinivasan"
Signed-off-by: Dexuan Cui
Cc: sta...@vger.kernel.org
---
tools/hv/hv_vss_daemon.c | 2 +-
1 file changed, 1
WESTERN UNION MONEY TRANSFER
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Dear Western Union Beneficiary,
UNITED NATIONS PAYMENT NOTIFICATION.
We wish to inform you that the United Nations (UN) has authorized us to remit
to you a total amount of $500,000.00, (Five Hundred Thousand United States
Dollars).
Your
Hi Jake,
[auto build test ERROR on pci/next]
[also build test ERROR on v4.4-rc4 next-20151209]
url:
https://github.com/0day-ci/linux/commits/jakeo-microsoft-com/PCI-hv-New-paravirtual-PCI-front-end-for-Hyper-V-VMs/20151210-070027
base: https://git.kernel.org/pub/scm/linux/kernel/git
From: Jake Oshins
This patch exposes the mapping between Linux CPU number and Hyper-V
virtual processor number. This is necessary because the hypervisor needs
to know which virtual processor to target when making a mapping in the
Interrupt Redirection Table in the I/O MMU.
From: Jake Oshins
This patch adds a second way of finding an IRQ domain associated with
a root PCI bus. After looking to see if one can be found through
the OF tree, it attempts to look up the IRQ domain through an
fwnode_handle stored in the pci_sysdata struct.
From: Jake Oshins
This patch adds an fwnode_handle to struct pci_sysdata, which is
used by the next patch in the series when trying to locate an
IRQ domain associated with a root PCI bus.
Signed-off-by: Jake Oshins
---
arch/x86/include/asm/pci.h | 15
From: Jake Oshins
This patch introduces a new driver which exposes a root PCI bus whenever a
PCI Express device is passed through to a guest VM under Hyper-V. The
device can be single- or multi-function. The interrupts for the devices
are managed by an IRQ domain,
From: Jake Oshins
This version of the patch series incorporates feedback from Mark Zyngier,
making this build on arm/arm64.
First, export functions that allow correlating Hyper-V virtual processors
and Linux cpus, along with the means for invoking a hypercall that targets
From: Jake Oshins
This patch exposes the function that hv_vmbus.ko uses to make hypercalls.
This is necessary for retargeting an interrupt when it is given a new
affinity and vector.
Signed-off-by: Jake Oshins
---
drivers/hv/hv.c | 20
From: Jake Oshins
This defines the channel type for PCI front-ends in Hyper-V VMs.
Signed-off-by: Jake Oshins
---
include/linux/hyperv.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
On 09/12/15 16:54, Jake Oshins wrote:
>> -Original Message-
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Wednesday, December 9, 2015 8:51 AM
>> To: Jake Oshins ; gre...@linuxfoundation.org; KY
>> Srinivasan ;
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