Hi Chenyang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v5.18-rc3 next-20220422]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
Hi Chenyang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v5.18-rc3 next-20220422]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
Add get video bios from the ACPI table.
Define new acpi table "VIAT" for loongson video bios.
Signed-off-by: Chenyang Li
---
drivers/gpu/drm/loongson/Makefile | 3 +-
drivers/gpu/drm/loongson/loongson_drv.c | 21 +++-
drivers/gpu/drm/loongson/loongson_drv.h | 1 +
Add LS7A DC vsync interrupt enable and close function, and
register irq_handler function interface.
Add vbrank event processing flow.
v4:
- Replace drm_irq_install with devm_request_irq.
- Delete the irq_ hooks in drm_driver.
v3:
- Improve code readability.
- Use the to_pci_dev function to get
Implement use GPIO and I2C driver to detect connector
and fetch EDID via DDC.
v5:
- Use braidge->ddc to get EDID and detect connector.
v4:
- Delete the gpio_chip subsystem call.
- Delete some redundant prints.
v3:
- Change some driver log to the drm_ version.
v2:
- Optimize the error handling
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The Loongson 7A1000 bridge chip is Loongson’s
first dedicated chipset product, providing north-south bridge functionality
for Loongson processors. The bridge chip is connected to the Loongson
Series 3 processor via
