On Wed, Feb 12, 2014 at 05:50:25PM +, Martyn Welch wrote:
> On 12/02/14 16:43, Greg Kroah-Hartman wrote:
> >On Wed, Feb 12, 2014 at 01:20:33PM +, Martyn Welch wrote:
> >>Hmm, can't see this patch on the mailing list, though get send-mail cc'ed me
> >>and I got it that way. As you've added a
The ca91cx42 and tsi148 VME bridges use the width of reads and writes on the
PCI bus in part to control the width of the cycles on the VME bus. It is
important that we can control the width of cycles on the VME bus as some VME
hardware requires cycles of a specific width. The memcpy_toio() and
memc
On 12/02/14 16:43, Greg Kroah-Hartman wrote:
On Wed, Feb 12, 2014 at 01:20:33PM +, Martyn Welch wrote:
Hmm, can't see this patch on the mailing list, though get send-mail cc'ed me
and I got it that way. As you've added a later patch that I wrote and not
this one, can I assume that you didn't
On Wed, Feb 12, 2014 at 01:20:33PM +, Martyn Welch wrote:
> Hmm, can't see this patch on the mailing list, though get send-mail cc'ed me
> and I got it that way. As you've added a later patch that I wrote and not
> this one, can I assume that you didn't get it either Greg?
No, I didn't get thi
Hmm, can't see this patch on the mailing list, though get send-mail
cc'ed me and I got it that way. As you've added a later patch that I
wrote and not this one, can I assume that you didn't get it either Greg?
(This one is needed as well)
Martyn
On 06/02/14 13:35, Martyn Welch wrote:
The ca9
