On 16-11-20, 13:59, Mauro Carvalho Chehab wrote:
> +#define CTRL7_USB2_REFCLKSEL_MASK(3 << 3)
> +#define CTRL7_USB2_REFCLKSEL_ABB (3 << 3)
> +#define CTRL7_USB2_REFCLKSEL_PAD (2 << 3)
This should use GENMASK()
> +
> +#define CFG50_USB3_PHY_TEST_POWERDOWNBIT(23)
> +
> +#define
On 17-11-20, 07:55, Mauro Carvalho Chehab wrote:
> Em Mon, 16 Nov 2020 09:31:06 -0600
> Rob Herring escreveu:
>
> > On Mon, Nov 16, 2020 at 01:59:27PM +0100, Mauro Carvalho Chehab wrote:
> > > The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> > > for mainstream. Mode it from staging into
Em Mon, 16 Nov 2020 09:31:06 -0600
Rob Herring escreveu:
> On Mon, Nov 16, 2020 at 01:59:27PM +0100, Mauro Carvalho Chehab wrote:
> > The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> > for mainstream. Mode it from staging into the main driver's
>
> s/Mode/Move/
>
> > phy/ directory.
On Mon, 16 Nov 2020 13:59:27 +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
> phy/ directory.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> .../bindings/phy/phy-hi3670-usb3.yaml
On Mon, Nov 16, 2020 at 01:59:27PM +0100, Mauro Carvalho Chehab wrote:
> The phy USB3 driver for Hisilicon 970 (hi3670) is ready
> for mainstream. Mode it from staging into the main driver's
s/Mode/Move/
> phy/ directory.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
The phy USB3 driver for Hisilicon 970 (hi3670) is ready
for mainstream. Mode it from staging into the main driver's
phy/ directory.
Signed-off-by: Mauro Carvalho Chehab
---
.../bindings/phy/phy-hi3670-usb3.yaml | 72 ++
MAINTAINERS | 9 +-
