Le 25/05/2021 à 17:39, Hans Verkuil a écrit :
On 05/05/2021 16:42, Hans Verkuil wrote:
Hi Benjamin,
On 20/04/2021 14:10, Benjamin Gaignard wrote:
The IMX8MQ got two VPUs but until now only G1 has been enabled.
This series aim to add the second VPU (aka G2) and provide basic
HEVC decoding supp
On 05/05/2021 16:42, Hans Verkuil wrote:
> Hi Benjamin,
>
> On 20/04/2021 14:10, Benjamin Gaignard wrote:
>> The IMX8MQ got two VPUs but until now only G1 has been enabled.
>> This series aim to add the second VPU (aka G2) and provide basic
>> HEVC decoding support.
>>
>> To be able to decode HEV
Hi Benjamin,
On 20/04/2021 14:10, Benjamin Gaignard wrote:
> The IMX8MQ got two VPUs but until now only G1 has been enabled.
> This series aim to add the second VPU (aka G2) and provide basic
> HEVC decoding support.
>
> To be able to decode HEVC it is needed to add/update some of the
> structur
The IMX8MQ got two VPUs but until now only G1 has been enabled.
This series aim to add the second VPU (aka G2) and provide basic
HEVC decoding support.
To be able to decode HEVC it is needed to add/update some of the
structures in the uapi. In addition of them one HANTRO dedicated
control is requ
