Hi Andy,
Nice work on this patch series. Its getting better and better :).
On 14/11/14 03:27, Andy Yan wrote:
hdmi phy clock symbol and transmission termination value
can adjust platform specific to get the best SI
^Is this signal integrity?
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v10:
- add more display mode support mpll configuration for rk3288
Changes in v9:
- move some phy configuration to platform
On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v10:
- add more display mode support mpll configuration for rk3288
Changes in
I have added Markus to the CC list because I want to describe how
extra if statements make the code more readable towards the end of
this function.
This patch needs more work.
The subject shouldn't be 11/11 because it's not part of a series.
Just say: [PATCH] staging: unisys: small bug in
Hi ZubairLK:
Thanks for your review.
On 2014年11月14日 18:19, Zubair Lutfullah Kakakhel wrote:
Hi Andy,
Nice work on this patch series. Its getting better and better :).
On 14/11/14 03:27, Andy Yan wrote:
hdmi phy clock symbol and transmission termination value
can adjust platform specific to
On 14/11/14 10:37, Andy Yan wrote:
On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v10:
- add more display mode support
On 14/11/14 10:53, Andy Yan wrote:
Hi ZubairLK:
Thanks for your review.
On 2014年11月14日 18:19, Zubair Lutfullah Kakakhel wrote:
Hi Andy,
Nice work on this patch series. Its getting better and better :).
On 14/11/14 03:27, Andy Yan wrote:
hdmi phy clock symbol and transmission
On Fri, Nov 14, 2014 at 01:48:32PM +0300, Dan Carpenter wrote:
out_rgn:
if (rgn)
visor_memregion_destroy(rgn);
Oops. We're supposed to increase controlvm_payload_bytes_buffered on
the success path:
controlvm_payload_bytes_buffered += ctx-param_bytes;
On 2014年11月14日 18:55, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 10:53, Andy Yan wrote:
Hi ZubairLK:
Thanks for your review.
On 2014年11月14日 18:19, Zubair Lutfullah Kakakhel wrote:
Hi Andy,
Nice work on this patch series. Its getting better and better :).
On 14/11/14 03:27, Andy Yan
On 2014年11月14日 18:53, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 10:37, Andy Yan wrote:
On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
On 14/11/14 11:08, Andy Yan wrote:
On 2014年11月14日 18:55, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 10:53, Andy Yan wrote:
Hi ZubairLK:
Thanks for your review.
On 2014年11月14日 18:19, Zubair Lutfullah Kakakhel wrote:
Hi Andy,
Nice work on this patch series. Its getting better and
On 14/11/14 11:13, Andy Yan wrote:
On 2014年11月14日 18:53, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 10:37, Andy Yan wrote:
On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
On 2014年11月14日 19:16, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 11:13, Andy Yan wrote:
On 2014年11月14日 18:53, Zubair Lutfullah Kakakhel wrote:
On 14/11/14 10:37, Andy Yan wrote:
On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
Rockchip
We found Freescale imx6 and Rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly differences, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only be
IMX6 and Rockchip RK3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
To reuse the imx
the original imx hdmi driver is under staging/imx-drm,
which depends on imx-drm, so move the imx hdmi driver out
to drm/bridge and rename imx-hdmi to dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
From: Yakir Yang y...@rock-chips.com
keep the connector birdge in dw_hdmi.c, handle encoder
in dw_hdmi-imx.c, as most of the encoder operation are
platform specific such as crtc select and panel format
set
Signed-off-by: Andy Yan andy@rock-chips.com
Signed-off-by: Yakir Yang
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- correct some spelling mistake
- modify ddc-i2c-bus and interrupt description
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes
On rockchip rk3288, only word(32-bit) accesses are
permitted for hdmi registers. Byte width accesses (writeb,
readb) generate an imprecise external abort.
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
some platform may not support all the display mode,
add mode_valid interface check it
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
HDMI_IH_I2CMPHY_STAT0 is a clear on write register, which indicates i2cm
operation status(i2c transfer done or error), every hdmi phy register
configuration must check this register to make sure the configuration
has complete. But the indication bit should be cleared after check, otherwise
the
RK3288 HDMI will not work without the spare bit of
HDMI_PHY_CONF0 enable
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11:
- split from patch dw_hdmi: add rk3288 support
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v11: None
Changes in v10:
- add more display mode support mpll configuration for rk3288
Changes in v9:
- move some phy configuration to platform driver
Changes in v8: None
Changes in
Replaced cleanups in the struct parser_init_guts with err_rgn,
err_ctx, and out_rgn. The purpose is to remove redundant code and
have proper error handling
Signed-off-by: Jeffrey Brown jeffrey.br...@unisys.com
---
drivers/staging/unisys/visorchipset/parser.c | 43 +++--
1
Better, but it still needs more work.
On Fri, Nov 14, 2014 at 07:41:28AM -0500, Jeffrey Brown wrote:
Replaced cleanups in the struct parser_init_guts with err_rgn,
err_ctx, and out_rgn. The purpose is to remove redundant code and
have proper error handling
Signed-off-by: Jeffrey Brown
On Fri, Nov 14, 2014 at 05:43:24PM +0300, Dan Carpenter wrote:
@@ -90,7 +88,6 @@ parser_init_guts(u64 addr, u32 bytes, BOOL is_local,
__func__,
(unsigned long long)addr, (ulong)bytes);
rc = NULL;
-
Hi,
attached patch applies value of pixelclk-active
to support displays which need a falling edge on pixelclk like
seiko-wvga on wandboard.
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index 720868b..71c741b 100644
---
Replaced cleanups in the struct parser_init_guts with err_rgn,
err_ctx, and out_rgn. The purpose is to remove redundant code and
have proper error handling. Put goto out_rgn on lin 108 because
there was no out_ctx.
Signed-off-by: Jeffrey Brown jeffrey.br...@unisys.com
---
Hi Stefan,
On Fri, Nov 14, 2014 at 2:39 PM, Stefan strawberrybl...@googlemail.com wrote:
Hi,
attached patch applies value of pixelclk-active
to support displays which need a falling edge on pixelclk like
seiko-wvga on wandboard.
Thanks for the patch.
Please split it in two patches: one for
I'm sorry this one doesn't make any sense. ??? Take the weekend off.
Have your co-workers review the patch on Monday. Then resend.
regards,
dan carpenter
___
devel mailing list
de...@linuxdriverproject.org
On Wed, Nov 12, 2014 at 05:03:18PM -0500, Alan Stern wrote:
On Wed, 12 Nov 2014, Sean O. Stalley wrote:
Our plan to support multiple MA devices is to have them all connected
to the same virtual host controller, so only 1 would be needed.
Would you prefer we have 1 host controller
Dear all,
mmap() on VME bridge devices is a feature present in many existing Linux and
UNIX drivers. The proposed solution follows the approach so that mmap()
offsets are coherent with read() and write() offsets, which seems to be the
only manner compatible with the current vme_user API. It
From: Martyn Welch martyn.we...@ge.com
The tsi148 driver is registering the slave images as supporting the USER
access modes and CR/CSR access mode rather than the master images as it
should.
Remove the incorrect case entries for these modes from the
tsi148_slave_set() function, stop registering
We also make sure that user won't be able to reconfigure the window while it is
mmap'ed.
Signed-off-by: Dmitry Kalinkin dmitry.kalin...@gmail.com
Cc: Igor Alekseev igor.aleks...@itep.ru
---
drivers/staging/vme/devices/vme_user.c | 85 ++
drivers/vme/vme.c
This implements more granular locking in vme_user_ioctl() by using separate
locks for each devfs device.
This also provides a synchronization between vme_user_read(), vme_user_write()
and vme_user_ioctl().
Signed-off-by: Dmitry Kalinkin dmitry.kalin...@gmail.com
Cc: Igor Alekseev
On Sat, Nov 15, 2014 at 02:36:17AM +0300, Dmitry Kalinkin wrote:
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct
*vma)
+{
+ struct vme_master_resource *image;
+ phys_addr_t phys_addr;
+ unsigned long vma_size;
+
+ if (resource-type != VME_MASTER)
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