On 09/19/2017 04:55 AM, Benjamin Gaignard wrote:
2017-09-19 13:02 GMT+02:00 Greg KH :
On Tue, Sep 19, 2017 at 12:25:38PM +0200, Benjamin Gaignard wrote:
Instead a getting one common device "/dev/ion" for
all the heaps this patch allow to create one device
entry
Add the command build/parse APIs for operating on DPSW objects through
the DPAA2 Management Complex.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/Kconfig |8 +
drivers/staging/fsl-dpaa2/Makefile |1 +
This patchset introduces the Ethernet Switch Driver for Freescale/NXP SoCs
with DPAA2 (DataPath Acceleration Architecture v2). The driver manages
switch objects discovered on the fsl-mc bus. A description of the driver
can be found in the associated README file.
The patchset consists of:
* A set
Add driver information, link details and hardware statistics to be
reported via ethtool -S.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/Makefile| 2 +-
drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h | 13 ++
Introduce the DPAA2 Ethernet Switch driver, which manages Datapath Switch
(DPSW) objects discovered on the MC bus.
Suggested-by: Alexandru Marginean
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/Makefile |2 +-
Signed-off-by: Razvan Stefanescu
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2281af4..cfd4f74 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4297,6 +4297,12 @@ L: linux-ker...@vger.kernel.org
S:
Add a README file describing the driver architecture, components and
interfaces.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/README | 106 +
1 file changed, 106 insertions(+)
create mode 100644
Add a TODO file describing what needs to be added/changed before the driver
can be moved out of staging.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/TODO | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
The Atom ISP driver initializes and configures PMC clocks which are
already handled by the clock framework.
Remove all legacy vlv2_platform_clock stuff and move to the clk API to
avoid conflicts, e.g. with audio machine drivers enabling the MCLK for
external codecs
Tested-by: Carlo Caione
On Tue, Sep 19, 2017 at 1:07 PM, Benjamin Gaignard
wrote:
> 2017-09-19 11:40 GMT+02:00 Dan Carpenter :
>> On Mon, Sep 18, 2017 at 04:58:46PM +0200, Benjamin Gaignard wrote:
>>> -static int validate_ioctl_arg(unsigned int cmd, union
On Tue, Sep 19, 2017 at 12:20:15PM +0200, Benjamin Gaignard wrote:
> 2017-09-19 12:15 GMT+02:00 Tomas Winkler :
> > On Tue, Sep 19, 2017 at 1:07 PM, Benjamin Gaignard
> > wrote:
> >> 2017-09-19 11:40 GMT+02:00 Dan Carpenter
If you had spelled out how this patch breaks user space in the changelog
then you wouldn't be catching so much flak for it now... You should
fix that in v3.
regards,
dan carpenter
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devel mailing list
de...@linuxdriverproject.org
On Tue, Sep 19, 2017 at 12:01:32PM +0300, Razvan Stefanescu wrote:
> This patchset introduces the Ethernet Switch Driver for Freescale/NXP SoCs
> with DPAA2 (DataPath Acceleration Architecture v2). The driver manages
> switch objects discovered on the fsl-mc bus. A description of the driver
> can
version 2:
- simplify ioctl check like propose by Dan
- make sure that we don't register more than ION_DEV_MAX heaps
Instead a getting one common device "/dev/ion" for
all the heaps this patch allow to create one device
entry ("/dev/ionX") per heap.
Getting an entry per heap could allow to set
Instead a getting one common device "/dev/ion" for
all the heaps this patch allow to create one device
entry ("/dev/ionX") per heap.
Getting an entry per heap could allow to set security rules
per heap and global ones for all heaps.
Allocation requests will be only allowed if the mask_id
match
Make arguments checking more easy to read.
Signed-off-by: Benjamin Gaignard
---
drivers/staging/android/ion/ion-ioctl.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/android/ion/ion-ioctl.c
2017-09-19 11:40 GMT+02:00 Dan Carpenter :
> On Mon, Sep 18, 2017 at 04:58:46PM +0200, Benjamin Gaignard wrote:
>> -static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg)
>> +static int validate_ioctl_arg(struct file *filp,
>> +
On Tue, Sep 19, 2017 at 12:25:38PM +0200, Benjamin Gaignard wrote:
> Instead a getting one common device "/dev/ion" for
> all the heaps this patch allow to create one device
> entry ("/dev/ionX") per heap.
> Getting an entry per heap could allow to set security rules
> per heap and global ones for
On Tue, Sep 19, 2017 at 12:01:37PM +0300, Razvan Stefanescu wrote:
> +Driver uses the switch device driver model and exposes each switch port as
> +a network interface, which can be included in a bridge. Traffic switched
> +between ports is offloaded into the hardware. Exposed network interfaces
>
On Tue, Sep 19, 2017 at 01:55:36PM +0200, Benjamin Gaignard wrote:
> >> +
> >> spin_lock_init(>free_lock);
> >> heap->free_list_size = 0;
> >>
> >> @@ -595,13 +610,9 @@ static int ion_device_create(void)
> >> if (!idev)
> >> return -ENOMEM;
> >>
> >> -
2017-09-19 12:15 GMT+02:00 Tomas Winkler :
> On Tue, Sep 19, 2017 at 1:07 PM, Benjamin Gaignard
> wrote:
>> 2017-09-19 11:40 GMT+02:00 Dan Carpenter :
>>> On Mon, Sep 18, 2017 at 04:58:46PM +0200, Benjamin Gaignard wrote:
Hi,
sorry about the long delay
On 07.09.2017 18:49, Hans de Goede wrote:
Hi,
On 07-09-17 15:14, Mathias Nyman wrote:
On 05.09.2017 19:42, Hans de Goede wrote:
The Intel cherrytrail xhci controller has an extended cap mmio-range
which contains registers to control the muxing to the xhci
On Mon, Sep 18, 2017 at 04:58:46PM +0200, Benjamin Gaignard wrote:
> -static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg)
> +static int validate_ioctl_arg(struct file *filp,
> + unsigned int cmd, union ion_ioctl_arg *arg)
> {
> int ret = 0;
>
2017-09-19 13:02 GMT+02:00 Greg KH :
> On Tue, Sep 19, 2017 at 12:25:38PM +0200, Benjamin Gaignard wrote:
>> Instead a getting one common device "/dev/ion" for
>> all the heaps this patch allow to create one device
>> entry ("/dev/ionX") per heap.
>> Getting an entry
On 09/13/2017 11:29 PM, Greg KH wrote:
> On Wed, Sep 13, 2017 at 09:23:31PM +0200, Lars-Peter Clausen wrote:
>> On 09/13/2017 08:58 PM, Greg KH wrote:
>>> On Wed, Sep 13, 2017 at 06:03:10PM +0100, Jonathan Cameron wrote:
On Wed, 13 Sep 2017 14:14:07 +0530
Himanshi Jain
Add the command build/parse APIs for operating on DPSW objects through
the DPAA2 Management Complex.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/Kconfig |8 +
drivers/staging/fsl-dpaa2/Makefile |1 +
Add a TODO file describing what needs to be added/changed before the driver
can be moved out of staging.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/TODO | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Signed-off-by: Razvan Stefanescu
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2281af4..cfd4f74 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4297,6 +4297,12 @@ L: linux-ker...@vger.kernel.org
S:
Add a README file describing the driver architecture, components and
interfaces.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/README | 106 +
1 file changed, 106 insertions(+)
create mode 100644
Introduce the DPAA2 Ethernet Switch driver, which manages Datapath Switch
(DPSW) objects discovered on the MC bus.
Suggested-by: Alexandru Marginean
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/Makefile |2 +-
This patchset introduces the Ethernet Switch Driver for Freescale/NXP SoCs
with DPAA2 (DataPath Acceleration Architecture v2). The driver manages
switch objects discovered on the fsl-mc bus. A description of the driver
can be found in the associated README file.
The patchset consists of:
* A set
Add driver information, link details and hardware statistics to be
reported via ethtool -S.
Signed-off-by: Razvan Stefanescu
---
drivers/staging/fsl-dpaa2/ethsw/Makefile| 2 +-
drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h | 13 ++
Hi,
Thank you for the reviews and patches!
On 09/08/2017 05:45 PM, Peter Rosin wrote:
On 2017-09-05 18:42, Hans de Goede wrote:
Intel Cherrytrail SoCs have an internal USB mux for muxing the otg-port
USB data lines between the xHCI host controller and the dwc3 gadget
controller. On some
Hi,
On 09/08/2017 05:54 PM, Peter Rosin wrote:
On 2017-09-08 17:45, Peter Rosin wrote:
From: Stephen Boyd
Sometimes drivers only use muxes under certain scenarios. For
example, the chipidea usb controller may be connected to a usb
switch on some platforms, and
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