[PATCH V6 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-02-27 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael

[Resend PATCH V5 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-02-26 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael

[Resend PATCH V5 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

2019-02-26 Thread lantianyu1986
From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose

[PATCH V2] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

2019-02-25 Thread lantianyu1986
From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc:

[Update PATCH] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

2019-02-25 Thread lantianyu1986
From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc:

[PATCH V3 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

2019-02-22 Thread lantianyu1986
From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This

[PATCH V3 1/10] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

2019-02-22 Thread lantianyu1986
From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 4 ++-- arch/x86/include/asm/mshyperv.h | 2 +- arch/x86/kvm/vmx/vmx.c | 2

[PATCH] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

2019-02-22 Thread lantianyu1986
From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc:

[PATCH V4 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-02-11 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Signed-off-by: Lan

[PATCH V4 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

2019-02-11 Thread lantianyu1986
From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose

[PATCH V3 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

2019-02-07 Thread lantianyu1986
From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose

[PATCH V3 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-02-07 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Signed-off-by: Lan Tianyu --- Change since v2:

[PATCH V2 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-02-02 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Signed-off-by: Lan Tianyu --- Change since v1:

[PATCH V2 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

2019-02-02 Thread lantianyu1986
From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose

[PATCH V2 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

2019-02-01 Thread lantianyu1986
From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This

[PATCH V2 1/10] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

2019-02-01 Thread lantianyu1986
From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 4 ++-- arch/x86/include/asm/mshyperv.h | 2 +- arch/x86/kvm/vmx/vmx.c | 2

[PATCH V2 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

2019-02-01 Thread lantianyu1986
From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This

[PATCH 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

2019-01-31 Thread lantianyu1986
From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Signed-off-by: Lan Tianyu ---

[PATCH 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

2019-01-31 Thread lantianyu1986
From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose

[PATCH 1/11] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

2019-01-04 Thread lantianyu1986
From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 4 ++-- arch/x86/include/asm/mshyperv.h | 2 +- arch/x86/kvm/vmx/vmx.c | 2

[PATCH 00/11] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

2019-01-04 Thread lantianyu1986
From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This

[Resend PATCH V5 0/10] x86/KVM/Hyper-v: Add HV ept tlb range flush hypercall support in KVM

2018-12-06 Thread lantianyu1986
From: Lan Tianyu For nested memory virtualization, Hyper-v doesn't set write-protect L1 hypervisor EPT page directory and page table node to track changes while it relies on guest to tell it changes via HvFlushGuestAddressLlist hypercall. HvFlushGuestAddressLlist hypercall provides a way to

[Resend PATCH V5 1/10] KVM: Add tlb_remote_flush_with_range callback in kvm_x86_ops

2018-12-06 Thread lantianyu1986
From: Lan Tianyu Add flush range call back in the kvm_x86_ops and platform can use it to register its associated function. The parameter "kvm_tlb_range" accepts a single range and flush list which contains a list of ranges. Signed-off-by: Lan Tianyu --- Change since v1: Change "end_gfn"

[Resend PATCH V5 3/10] x86/Hyper-v: Add trace in the hyperv_nested_flush_guest_mapping_range()

2018-12-06 Thread lantianyu1986
From: Lan Tianyu This patch is to trace log in the hyperv_nested_flush_ guest_mapping_range(). Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 1 + arch/x86/include/asm/trace/hyperv.h | 14 ++ 2 files changed, 15 insertions(+) diff --git

[Resend PATCH V5 2/10] x86/hyper-v: Add HvFlushGuestAddressList hypercall support

2018-12-06 Thread lantianyu1986
From: Lan Tianyu Hyper-V provides HvFlushGuestAddressList() hypercall to flush EPT tlb with specified ranges. This patch is to add the hypercall support. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- Change sincd v4: - Expose function hyperv_fill_flush_guest_mapping_list()

[Resend PATCH V5 2/10] x86/hyper-v: Add HvFlushGuestAddressList hypercall support

2018-11-08 Thread lantianyu1986
From: Lan Tianyu Hyper-V provides HvFlushGuestAddressList() hypercall to flush EPT tlb with specified ranges. This patch is to add the hypercall support. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- Change sincd v4: - Expose function hyperv_fill_flush_guest_mapping_list()

[Resend PATCH V5 3/10] x86/Hyper-v: Add trace in the hyperv_nested_flush_guest_mapping_range()

2018-11-08 Thread lantianyu1986
From: Lan Tianyu This patch is to trace log in the hyperv_nested_flush_ guest_mapping_range(). Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 1 + arch/x86/include/asm/trace/hyperv.h | 14 ++ 2 files changed, 15 insertions(+) diff --git

[Resend PATCH V5 1/10] KVM: Add tlb_remote_flush_with_range callback in kvm_x86_ops

2018-11-08 Thread lantianyu1986
From: Lan Tianyu Add flush range call back in the kvm_x86_ops and platform can use it to register its associated function. The parameter "kvm_tlb_range" accepts a single range and flush list which contains a list of ranges. Signed-off-by: Lan Tianyu --- Change since v1: Change "end_gfn"

[PATCH V5 00/10] x86/KVM/Hyper-v: Add HV ept tlb range flush hypercall support in KVM

2018-11-08 Thread lantianyu1986
From: Lan Tianyu Sorry. Some patches was blocked and I try to resend via another account. For nested memory virtualization, Hyper-v doesn't set write-protect L1 hypervisor EPT page directory and page table node to track changes while it relies on guest to tell it changes via

[PATCH V4 12/15] x86/hyper-v: Add HvFlushGuestAddressList hypercall support

2018-10-13 Thread lantianyu1986
From: Lan Tianyu Hyper-V provides HvFlushGuestAddressList() hypercall to flush EPT tlb with specified ranges. This patch is to add the hypercall support. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- Change since v2: Fix some coding style issues - Move

[PATCH V4 13/15] x86/Hyper-v: Add trace in the hyperv_nested_flush_guest_mapping_range()

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to trace log in the hyperv_nested_flush_ guest_mapping_range(). Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 1 + arch/x86/include/asm/trace/hyperv.h | 14 ++ 2 files changed, 15 insertions(+) diff --git

[PATCH V4 10/15] KVM: Add spte's point in the struct kvm_mmu_page

2018-10-13 Thread lantianyu1986
From: Lan Tianyu It's necessary to check whether mmu page is last or large page when add mmu page into flush list. "spte" is needed for such check and so add spte point in the struct kvm_mmu_page. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu.c

[PATCH V4 7/15] KVM/MMU: Flush tlb directly in the kvm_zap_gfn_range()

2018-10-13 Thread lantianyu1986
From: Lan Tianyu Originally, flush tlb is done by slot_handle_level_range(). This patch is to flush tlb directly in the kvm_zap_gfn_range() when range flush is available. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-)

[PATCH V4 5/15] KVM/MMU: Move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte()

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte() in order to avoid redundant tlb flush. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 8 ++-- virt/kvm/kvm_main.c | 5 - 2 files changed, 6 insertions(+), 7 deletions(-) diff

[PATCH V4 9/15] KVM: Add flush_link and parent_pte in the struct kvm_mmu_page

2018-10-13 Thread lantianyu1986
From: Lan Tianyu PV EPT tlb flush function will accept a list of flush ranges and use struct kvm_mmu_page as the list entry. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/kvm_host.h

[PATCH V4 8/15] KVM/MMU: Flush tlb directly in kvm_mmu_zap_collapsible_spte()

2018-10-13 Thread lantianyu1986
From: Lan Tianyu kvm_mmu_zap_collapsible_spte() returns flush request to the slot_handle_leaf() and the latter does flush on demand. When range flush is available, make kvm_mmu_zap_collapsible_spte() to flush tlb with range directly to avoid returning range back to slot_handle_leaf().

[PATCH V4 6/15] KVM/MMU: Flush tlb directly in the kvm_set_pte_rmapp()

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to flush tlb directly in the kvm_set_pte_rmapp() and return 0. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 5d3a180c57e2..f3742ff4ec18 100644 ---

[PATCH V4 11/15] KVM/MMU: Replace tlb flush function with range list flush function

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to use range list flush function in the mmu_sync_children(), kvm_mmu_commit_zap_page() and FNAME(sync_page)(). Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 26 +++--- arch/x86/kvm/paging_tmpl.h | 5 - 2 files changed, 27

[PATCH V4 4/15] KVM: Make kvm_set_spte_hva() return int

2018-10-13 Thread lantianyu1986
From: Lan Tianyu The patch is to make kvm_set_spte_hva() return int and caller can check return value to determine flush tlb or not. Signed-off-by: Lan Tianyu --- arch/arm/include/asm/kvm_host.h | 2 +- arch/arm64/include/asm/kvm_host.h | 2 +- arch/mips/include/asm/kvm_host.h| 2 +-

[PATCH V4 1/15] KVM: Add tlb_remote_flush_with_range callback in kvm_x86_ops

2018-10-13 Thread lantianyu1986
From: Lan Tianyu Add flush range call back in the kvm_x86_ops and platform can use it to register its associated function. The parameter "kvm_tlb_range" accepts a single range and flush list which contains a list of ranges. Signed-off-by: Lan Tianyu --- Change since v1: Change "end_gfn"

[PATCH V4 2/15] KVM/MMU: Add tlb flush with range helper function

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to add wrapper functions for tlb_remote_flush_with_range callback. Signed-off-by: Lan Tianyu --- Change sicne V3: Remove code of updating "tlbs_dirty" Change since V2: Fix comment in the kvm_flush_remote_tlbs_with_range() --- arch/x86/kvm/mmu.c |

[PATCH V4 3/15] KVM: Replace old tlb flush function with new one to flush a specified range.

2018-10-13 Thread lantianyu1986
From: Lan Tianyu This patch is to replace kvm_flush_remote_tlbs() with kvm_flush_ remote_tlbs_with_address() in some functions without logic change. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 31 +-- arch/x86/kvm/paging_tmpl.h | 3 ++- 2 files

[PATCH V4 00/15] x86/KVM/Hyper-v: Add HV ept tlb range flush hypercall support in KVM

2018-10-13 Thread lantianyu1986
From: Lan Tianyu For nested memory virtualization, Hyper-v doesn't set write-protect L1 hypervisor EPT page directory and page table node to track changes while it relies on guest to tell it changes via HvFlushGuestAddressLlist hypercall. HvFlushGuestAddressLlist hypercall provides a way to

[PATCH v2] vmbus/ring_buffer: remove some redundant helper function.

2018-01-25 Thread lantianyu1986
From: Tianyu Lan Some hv_get/set** helper functions in ring_buffer code are only called once or not used. This patch is to clear up these codes. Signed-off-by: Tianyu Lan --- Change since v1: Clear up more hv_get/set** functions. ---

[Patch] vmbus: Simply hv_get_next_write_location() function

2018-01-23 Thread lantianyu1986
From: Tianyu Lan The "next" variable is redundant in hv_get_next_write_location(). This patch is to remove it and return write_index directly. Signed-off-by: Tianyu Lan --- drivers/hv/ring_buffer.c | 4 +--- 1 file changed, 1 insertion(+), 3