Re: [PATCH v2 09/19] ARM: dts: imx6-sabreauto: add the ADV7180 video decoder

[Steve Longerbeam]

On 01/04/2017 04:41 AM, Vladimir Zapolskiy wrote:

On 01/03/2017 10:57 PM, Steve Longerbeam wrote:

+
+   camera: adv7180@21 {

adv7180: camera@21


done.

  
+		pinctrl_ipu1_csi0: ipu1grp-csi0 {

Please rename node name to ipu1csi0grp.


done.


Steve

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Re: [PATCH v2 09/19] ARM: dts: imx6-sabreauto: add the ADV7180 video decoder

[Vladimir Zapolskiy]

On 01/03/2017 10:57 PM, Steve Longerbeam wrote:
> Enables the ADV7180 decoder sensor. The ADV7180 connects to the
> parallel-bus mux input on ipu1_csi0_mux.
> 
> On the sabreauto, two analog video inputs are routed to the ADV7180,
> composite on Ain1, and composite on Ain3. Those inputs are defined
> via inputs and input-names under the ADV7180 node. The ADV7180 power
> pin is via max7310_b port expander.
> 
> Signed-off-by: Steve Longerbeam 
> ---
>  arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 56 
> 
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
> b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> index 83ac2ff..30ee378 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
> @@ -147,10 +147,42 @@
>   gpio-controller;
>   #gpio-cells = <2>;
>   };
> +
> + camera: adv7180@21 {

adv7180: camera@21

> + compatible = "adi,adv7180";
> + reg = <0x21>;
> + powerdown-gpios = <_b 2 
> GPIO_ACTIVE_LOW>;
> + interrupt-parent = <>;
> + interrupts = <27 0x8>;
> + inputs = <0x00 0x02>;
> + input-names = "ADV7180 Composite on Ain1",
> + "ADV7180 Composite on Ain3";
> +
> + port {
> + adv7180_to_ipu1_csi0_mux: endpoint {
> + remote-endpoint = 
> <_csi0_mux_from_parallel_sensor>;
> + bus-width = <8>;
> + };
> + };
> + };
>   };
>   };
>  };
>  
> +_csi0_from_ipu1_csi0_mux {
> + bus-width = <8>;
> +};
> +
> +_csi0_mux_from_parallel_sensor {
> + remote-endpoint = <_to_ipu1_csi0_mux>;
> + bus-width = <8>;
> +};
> +
> +_csi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <_ipu1_csi0>;
> +};
> +
>   {
>   assigned-clocks = < IMX6QDL_PLL4_BYPASS_SRC>,
> < IMX6QDL_PLL4_BYPASS>,
> @@ -451,6 +483,30 @@
>   >;
>   };
>  
> + pinctrl_ipu1_csi0: ipu1grp-csi0 {

Please rename node name to ipu1csi0grp.

> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09   
> 0x8000
> + MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  
> 0x8000
> + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  
> 0x8000
> + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 
> 0x8000
> + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
> 0x8000
> + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   
> 0x8000
> + >;
> + };
> +
>   pinctrl_pwm3: pwm1grp {
>   fsl,pins = <
>   MX6QDL_PAD_SD4_DAT1__PWM3_OUT   0x1b0b1
> 

--
With best wishes,
Vladimir
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[PATCH v2 09/19] ARM: dts: imx6-sabreauto: add the ADV7180 video decoder

[Steve Longerbeam]

Enables the ADV7180 decoder sensor. The ADV7180 connects to the
parallel-bus mux input on ipu1_csi0_mux.

On the sabreauto, two analog video inputs are routed to the ADV7180,
composite on Ain1, and composite on Ain3. Those inputs are defined
via inputs and input-names under the ADV7180 node. The ADV7180 power
pin is via max7310_b port expander.

Signed-off-by: Steve Longerbeam 
---
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 56 
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 83ac2ff..30ee378 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -147,10 +147,42 @@
gpio-controller;
#gpio-cells = <2>;
};
+
+   camera: adv7180@21 {
+   compatible = "adi,adv7180";
+   reg = <0x21>;
+   powerdown-gpios = <_b 2 
GPIO_ACTIVE_LOW>;
+   interrupt-parent = <>;
+   interrupts = <27 0x8>;
+   inputs = <0x00 0x02>;
+   input-names = "ADV7180 Composite on Ain1",
+   "ADV7180 Composite on Ain3";
+
+   port {
+   adv7180_to_ipu1_csi0_mux: endpoint {
+   remote-endpoint = 
<_csi0_mux_from_parallel_sensor>;
+   bus-width = <8>;
+   };
+   };
+   };
};
};
 };
 
+_csi0_from_ipu1_csi0_mux {
+   bus-width = <8>;
+};
+
+_csi0_mux_from_parallel_sensor {
+   remote-endpoint = <_to_ipu1_csi0_mux>;
+   bus-width = <8>;
+};
+
+_csi0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <_ipu1_csi0>;
+};
+
  {
assigned-clocks = < IMX6QDL_PLL4_BYPASS_SRC>,
  < IMX6QDL_PLL4_BYPASS>,
@@ -451,6 +483,30 @@
>;
};
 
+   pinctrl_ipu1_csi0: ipu1grp-csi0 {
+   fsl,pins = <
+   MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04   
0x8000
+   MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05   
0x8000
+   MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06   
0x8000
+   MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07   
0x8000
+   MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08   
0x8000
+   MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09   
0x8000
+   MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10  
0x8000
+   MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11  
0x8000
+   MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  
0x8000
+   MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  
0x8000
+   MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  
0x8000
+   MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  
0x8000
+   MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  
0x8000
+   MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  
0x8000
+   MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  
0x8000
+   MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  
0x8000
+   MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 
0x8000
+   MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
0x8000
+   MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   
0x8000
+   >;
+   };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT   0x1b0b1
-- 
2.7.4

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