[DynInst_API:] [dyninst/dyninst] dc58f1: Added high-level of diagram of ROSE semantics

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: dc58f189b2fd2590853c65c95579f30b26e988d5 https://github.com/dyninst/dyninst/commit/dc58f189b2fd2590853c65c95579f30b26e988d5 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-1

[DynInst_API:] [dyninst/dyninst] 23e069: Improve PIC thunk handling.

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 23e06914110b0090354f9d1864f06bc2f3e5cb01 https://github.com/dyninst/dyninst/commit/23e06914110b0090354f9d1864f06bc2f3e5cb01 Author: Matt Morehouse Date: 2016-10-27

[DynInst_API:] [dyninst/dyninst] b3e423: Added pseudocode extractor extract and instruction...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: b3e423b88325156d5d5fd22bffafc14784af37ff https://github.com/dyninst/dyninst/commit/b3e423b88325156d5d5fd22bffafc14784af37ff Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-1

[DynInst_API:] [dyninst/dyninst] 23e069: Improve PIC thunk handling.

API/src/function.C M dyninstAPI/src/function.h Log Message: --- Merge pull request #364 from dyninst/sfm/feature/reaching_defs Sfm/feature/reaching defs Commit: 4596d3a2b769b8518fb717ec16476e091e59d1ac https://github.com/dyninst/dyninst/commit/4596d3a2b769b8518fb717ec1

[DynInst_API:] [dyninst/dyninst] 23e069: Improve PIC thunk handling.

I/src/codegen-x86.C M dyninstAPI/src/function.C M dyninstAPI/src/function.h Log Message: --- Merge pull request #364 from dyninst/sfm/feature/reaching_defs Sfm/feature/reaching defs Commit: c10d781fd967b0ac10ab5a65258fe91043c42343 https://github.com/dyninst/d

[DynInst_API:] [dyninst/dyninst] ff4ffd: Issue #269 (SQRSHRN should be SQRSHRN2)

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: ff4ffd9d49b07d471c3f20dedd376fccaab5430d https://github.com/dyninst/dyninst/commit/ff4ffd9d49b07d471c3f20dedd376fccaab5430d Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-04 (Thu, 04 Ma

[DynInst_API:] [dyninst/dyninst] 48fa64: Issue #264 (SHA instruction should have 0s for bit...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 48fa64f9f12b810c827034ee312823346cd7fe14 https://github.com/dyninst/dyninst/commit/48fa64f9f12b810c827034ee312823346cd7fe14 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-04 (Thu, 04 Ma

[DynInst_API:] [dyninst/dyninst] a973ef: Fixes for issues #246 (REV64 instruction operand 1...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: a973ef698ba22faaa658f4087541f2d7a7ef7d59 https://github.com/dyninst/dyninst/commit/a973ef698ba22faaa658f4087541f2d7a7ef7d59 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-03 (Wed, 03 Ma

[DynInst_API:] [dyninst/dyninst] 5e63e6: Issues #237 (Should print zero immediate for compa...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 5e63e682ad6d46d0031939f0785dad2d068839bb https://github.com/dyninst/dyninst/commit/5e63e682ad6d46d0031939f0785dad2d068839bb Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-03 (Wed, 03 Ma

[DynInst_API:] [dyninst/dyninst] 1eff20: Issues #235(SQSHL instruction has invalid bits set...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 1eff200c1158f645f1842be92771c00289a124bf https://github.com/dyninst/dyninst/commit/1eff200c1158f645f1842be92771c00289a124bf Author: Sunny Shah <sha...@wisc.edu> Date: 2017-05-02 (Tue, 02 Ma

[DynInst_API:] [dyninst/dyninst] 621924: Issue #234 (Invalid Subtract instruction)

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 6219243e6e2fd10955a8bae153f134d6ad1b311d https://github.com/dyninst/dyninst/commit/6219243e6e2fd10955a8bae153f134d6ad1b311d Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-28 (Fri, 28 Ap

[DynInst_API:] [dyninst/dyninst] d574b0: Mark implicit registers

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: d574b0ff3e8ea091ed23e76d176794ce508db265 https://github.com/dyninst/dyninst/commit/d574b0ff3e8ea091ed23e76d176794ce508db265 Author: Sunny Shah <shahsunny...@gmail.com> Date: 2017-04-28 (Fri,

[DynInst_API:] [dyninst/dyninst] f8ffd8: Fixed invalid instruction detection for SIMD shift...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: f8ffd81aa5173f2f5897e2abd388eebaf6f09d84 https://github.com/dyninst/dyninst/commit/f8ffd81aa5173f2f5897e2abd388eebaf6f09d84 Author: Sunny Shah <shahsunny...@gmail.com> Date: 2017-04-27 (Thu,

[DynInst_API:] [dyninst/dyninst] 095f63: Call the right region_* methods for ARM.

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 095f63e6cdfbbc7b1f88f31ae8657ecbdb1ab1e1 https://github.com/dyninst/dyninst/commit/095f63e6cdfbbc7b1f88f31ae8657ecbdb1ab1e1 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-2

[DynInst_API:] [dyninst/dyninst] 1b6b1d: Implemented IP patch application for ARM.

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 1b6b1d3304403be7ef0c935a1f0bdb5a426fc40a https://github.com/dyninst/dyninst/commit/1b6b1d3304403be7ef0c935a1f0bdb5a426fc40a Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-1

[DynInst_API:] [dyninst/dyninst] a4373a: Fixes for runtime errors

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: a4373ac3decff4de4eacb5600436bd181ac4312d https://github.com/dyninst/dyninst/commit/a4373ac3decff4de4eacb5600436bd181ac4312d Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-1

[DynInst_API:] [dyninst/dyninst] 8f302f: Fixed conditional branch instruction generation fo...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 8f302fa0d9c22008f9e8b1a91c5ecb15deebf476 https://github.com/dyninst/dyninst/commit/8f302fa0d9c22008f9e8b1a91c5ecb15deebf476 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-1

[DynInst_API:] [dyninst/dyninst] d91911: Fixed offset calculation in modifyData for the ADR...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: d91911cb758fced6f6daa98d8b49600e80c7d9fb https://github.com/dyninst/dyninst/commit/d91911cb758fced6f6daa98d8b49600e80c7d9fb Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-1

[DynInst_API:] [dyninst/dyninst] a2b967: Fixed modifyData logic for offset values beyond +/...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: a2b9679273c1b3a456fd1bdac5d254562fe4d4d0 https://github.com/dyninst/dyninst/commit/a2b9679273c1b3a456fd1bdac5d254562fe4d4d0 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-0

[DynInst_API:] [dyninst/dyninst] 83bdf6: Differentiate modifyData() processing for ADR/ADRP...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 83bdf66346d4c9c0904519383e397934931d245f https://github.com/dyninst/dyninst/commit/83bdf66346d4c9c0904519383e397934931d245f Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-0

[DynInst_API:] [dyninst/dyninst] cc15c5: Added implementation for modifyData() in codegen.

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: cc15c557b909affb721b3118daccedb1b4a526ec https://github.com/dyninst/dyninst/commit/cc15c557b909affb721b3118daccedb1b4a526ec Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-0

[DynInst_API:] [dyninst/dyninst] 99fd77: Implemented plus, minus and times operation in emi...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 99fd77249fb449ed7a637294fc04b760ce679f11 https://github.com/dyninst/dyninst/commit/99fd77249fb449ed7a637294fc04b760ce679f11 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-04-0

[DynInst_API:] [dyninst/dyninst] b6608b: Codegen functions for ADD variants

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: b6608b67aaade2957731778f7afe097310a49095 https://github.com/dyninst/dyninst/commit/b6608b67aaade2957731778f7afe097310a49095 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-3

[DynInst_API:] [dyninst/dyninst] b9a239: Implemented clobberAllFuncCall for ARM64.

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: b9a239546e22de611f4eebd01653f84220c472c6 https://github.com/dyninst/dyninst/commit/b9a239546e22de611f4eebd01653f84220c472c6 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-3

[DynInst_API:] [dyninst/dyninst] ee6955: make Address portable

odule.C M symtabAPI/src/Object-elf.C M symtabAPI/src/Type.C M symtabAPI/src/dwarfWalker.C Log Message: --- Merge pull request #341 from dyninst/v9.3.x v9.3.x Commit: 692109d97aec8cd7aa5e2e5681ec4c8b3edb5b5b https://github.com/dyninst/dyninst/commit/692109d97aec8

[DynInst_API:] [dyninst/dyninst] e4b766: Added line to relocation log to indicate a failed ...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: e4b766f0e5ddb9aa66ead8ee84e716fb942843bf https://github.com/dyninst/dyninst/commit/e4b766f0e5ddb9aa66ead8ee84e716fb942843bf Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-3

[DynInst_API:] [dyninst/dyninst] 34109d: Implemented restoreRegister() and restoreFPRegiste...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 34109d33ec717ddd07b22cfa645081793ad18863 https://github.com/dyninst/dyninst/commit/34109d33ec717ddd07b22cfa645081793ad18863 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-1

[DynInst_API:] [dyninst/dyninst] 2f435d: Implemented saveGPRegister(), saveFPRegisters() an...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 2f435d7e1606a49cdea288c213a6b8e36b17cb16 https://github.com/dyninst/dyninst/commit/2f435d7e1606a49cdea288c213a6b8e36b17cb16 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-1

[DynInst_API:] [dyninst/dyninst] cd6c19: Implemented stack frame creation and tear down fun...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: cd6c19f159c22f23a1b793c7ac46f1eacdb68054 https://github.com/dyninst/dyninst/commit/cd6c19f159c22f23a1b793c7ac46f1eacdb68054 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] ed027c: Added method to generate an instruction to move a ...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: ed027c4f8e1bb1cb5cad459dc1dacb194e1df145 https://github.com/dyninst/dyninst/commit/ed027c4f8e1bb1cb5cad459dc1dacb194e1df145 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] 242e7e: Implemented baseTramp::generateSaves and baseTramp...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 242e7e8562c836ab64fb9f23a1809c5e8695e6ce https://github.com/dyninst/dyninst/commit/242e7e8562c836ab64fb9f23a1809c5e8695e6ce Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] 797a7a: Perform only post-indexed memory operations in

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 797a7a6ae54274be6a6710e169b9ea04225e904a https://github.com/dyninst/dyninst/commit/797a7a6ae54274be6a6710e169b9ea04225e904a Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] b6a340: Moved all register saving/restoring functions to o...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: b6a340b8508c74691d42e7468179c6765c0cd017 https://github.com/dyninst/dyninst/commit/b6a340b8508c74691d42e7468179c6765c0cd017 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] 66dd18: Removed unneeded/redundant code for saving/restori...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 66dd187145a51c2b7d6f83b3c907fd7e65999c3b https://github.com/dyninst/dyninst/commit/66dd187145a51c2b7d6f83b3c907fd7e65999c3b Author: Sunny Shah <sha...@wisc.edu> Date: 2017-03-0

[DynInst_API:] [dyninst/dyninst] 66e453: Fix build warning

3858c0770d58 https://github.com/dyninst/dyninst/commit/b9e9c0c2aac9926ea7505c29604e3858c0770d58 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-24 (Fri, 24 Feb 2017) Changed paths: M common/src/arch-aarch64.h Log Message: --- Merge remote-tracking branch 'remotes/i

[DynInst_API:] [dyninst/dyninst] 504099: The last commit, for whatever reason, did not add ...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 504099dc12fc9d61fa347f3298a840014ac8825d https://github.com/dyninst/dyninst/commit/504099dc12fc9d61fa347f3298a840014ac8825d Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-2

[DynInst_API:] [dyninst/dyninst] fb9bc6: Update instrumentation/emitter macro definitions f...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: fb9bc666aedfe0221e6b6ff9eb686c9fb90cfc0f https://github.com/dyninst/dyninst/commit/fb9bc666aedfe0221e6b6ff9eb686c9fb90cfc0f Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-2

[DynInst_API:] [dyninst/dyninst] 4b02a4: Implemented initialization of register space for A...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 4b02a4870640abff7ee6986ff23df793395703f4 https://github.com/dyninst/dyninst/commit/4b02a4870640abff7ee6986ff23df793395703f4 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-2

[DynInst_API:] [dyninst/dyninst] d7a442: Implemented generation of long branches for ARM64.

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: d7a442552463db8f3cc65f465ba30563cf1474d6 https://github.com/dyninst/dyninst/commit/d7a442552463db8f3cc65f465ba30563cf1474d6 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-2

[DynInst_API:] [dyninst/dyninst] 15526b: Adding back functions removed in last commit

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 15526b1b93d32bda9abe9baab98406866a755b53 https://github.com/dyninst/dyninst/commit/15526b1b93d32bda9abe9baab98406866a755b53 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-1

[DynInst_API:] [dyninst/dyninst] 7c5ca5: Completed implementation of modify*() functions fo...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 7c5ca5914ce36d69b2ba99caf7d64077384520db https://github.com/dyninst/dyninst/commit/7c5ca5914ce36d69b2ba99caf7d64077384520db Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-1

[DynInst_API:] [dyninst/dyninst] 435f14: The include "libtasn1.h" was wrongly added and sho...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 435f147b180978f52fbd8c0ef2d5b681249ed194 https://github.com/dyninst/dyninst/commit/435f147b180978f52fbd8c0ef2d5b681249ed194 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-07-2

[DynInst_API:] [dyninst/dyninst] e6c830: Codegen function changes to support the ARM CF Wid...

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: e6c83044abaa9644d590e5cd6ae6fa316d717913 https://github.com/dyninst/dyninst/commit/e6c83044abaa9644d590e5cd6ae6fa316d717913 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-0

[DynInst_API:] [dyninst/dyninst] 417aff: Removed definitions and declarations of

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 417aff65978fe5ffe23a4a847aa02453912e1e22 https://github.com/dyninst/dyninst/commit/417aff65978fe5ffe23a4a847aa02453912e1e22 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-0

[DynInst_API:] [dyninst/dyninst] 0e5c47: Add basic relocation functionality

Branch: refs/heads/arm64/feature/relocation Home: https://github.com/dyninst/dyninst Commit: 0e5c47e3ad9b0e593895b95516d6fc8d9b26b30a https://github.com/dyninst/dyninst/commit/0e5c47e3ad9b0e593895b95516d6fc8d9b26b30a Author: Sunny Shah <sha...@wisc.edu> Date: 2017-02-0

[DynInst_API:] [dyninst/dyninst] 06d5ee: Semantics for load/store acquire/release instructi...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 06d5ee6fda8acdf94a20ab89840bb26f9ba4067f https://github.com/dyninst/dyninst/commit/06d5ee6fda8acdf94a20ab89840bb26f9ba4067f Author: Sunny Shah <sha...@wisc.edu> Date: 2017-01-1

[DynInst_API:] [dyninst/dyninst] a9a941: Semantics for CLS and CLZ

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: a9a9410e6b0b8a88a125b9286997b236bbcb44b6 https://github.com/dyninst/dyninst/commit/a9a9410e6b0b8a88a125b9286997b236bbcb44b6 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-01-0

[DynInst_API:] [dyninst/dyninst] 78a770: Semantics for CSEL

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 78a770dcd10c207a7d5939ac6d6b36aced84fc6c https://github.com/dyninst/dyninst/commit/78a770dcd10c207a7d5939ac6d6b36aced84fc6c Author: Sunny Shah <sha...@wisc.edu> Date: 2017-01-0

[DynInst_API:] [dyninst/dyninst] 6b899d: Semantics for CSINC, CSINV and CSNEG

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 6b899dd037e1f44ca22eb23fb5d4476e0c0a97b5 https://github.com/dyninst/dyninst/commit/6b899dd037e1f44ca22eb23fb5d4476e0c0a97b5 Author: Sunny Shah <sha...@wisc.edu> Date: 2017-01-0

[DynInst_API:] [dyninst/dyninst] 4a9987: Semantics for more arithmetic instructions

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 4a998751642abac2949a7864ffc653ab76d9a043 https://github.com/dyninst/dyninst/commit/4a998751642abac2949a7864ffc653ab76d9a043 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-2

[DynInst_API:] [dyninst/dyninst] 4ec677: Append "2" to the mnemonic of SIMD instructions th...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 4ec677a01ef566c4a5713255c1fa7d390009aefe https://github.com/dyninst/dyninst/commit/4ec677a01ef566c4a5713255c1fa7d390009aefe Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-22 (Thu, 22 De

[DynInst_API:] [dyninst/dyninst] bdd6c9: Issue #258 ([ARM Decoding] FMUL instructions canno...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: bdd6c9754a96818faf12218bbaf65d305c41fad8 https://github.com/dyninst/dyninst/commit/bdd6c9754a96818faf12218bbaf65d305c41fad8 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-21 (Wed, 21 De

[DynInst_API:] [dyninst/dyninst] aa9539: Issue #257 ([ARM Decoding] Convert instruction imm...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: aa9539368ffa549ad945ad9df8128db7dbd89fa3 https://github.com/dyninst/dyninst/commit/aa9539368ffa549ad945ad9df8128db7dbd89fa3 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-21 (Wed, 21 De

[DynInst_API:] [dyninst/dyninst] 5cc151: Issue #253 (Floating point instructions can have m...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 5cc151bb4b5c1261f2be333b01fd91167ec1e44a https://github.com/dyninst/dyninst/commit/5cc151bb4b5c1261f2be333b01fd91167ec1e44a Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-20 (Tue, 20 De

[DynInst_API:] [dyninst/dyninst] 5c210a: Semantics for shift instruction.

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 5c210a53c0a5924e48c583e2f04722b2be9beb2a https://github.com/dyninst/dyninst/commit/5c210a53c0a5924e48c583e2f04722b2be9beb2a Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-2

[DynInst_API:] [dyninst/dyninst] d62aa7: Updated invalid instruction detection code for SIM...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: d62aa74cccaefec1f35a109b481e64cf7c50bee3 https://github.com/dyninst/dyninst/commit/d62aa74cccaefec1f35a109b481e64cf7c50bee3 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-19 (Mon, 19 De

[DynInst_API:] [dyninst/dyninst] fea0fd: Issue #249 (Reserved size value for some vector re...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: fea0fdbef2bfd52c019bfe1962654bc6803f13d1 https://github.com/dyninst/dyninst/commit/fea0fdbef2bfd52c019bfe1962654bc6803f13d1 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-19 (Mon, 19 De

[DynInst_API:] [dyninst/dyninst] cc98e0: Semantics for load/store-unscaled instructions

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: cc98e05dac00fa8095f739fcb3fd326e4f8d9c82 https://github.com/dyninst/dyninst/commit/cc98e05dac00fa8095f739fcb3fd326e4f8d9c82 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-1

[DynInst_API:] [dyninst/dyninst] 83f325: Semantics for load/store (unprivileged instruction...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 83f3259cf12d8de1012fe23aa204f224fb119c34 https://github.com/dyninst/dyninst/commit/83f3259cf12d8de1012fe23aa204f224fb119c34 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-1

[DynInst_API:] [dyninst/dyninst] 6ac352: Semantics for load/store pair instructions

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 6ac352993e1cf81d7aeb67de45ae31de40ff6561 https://github.com/dyninst/dyninst/commit/6ac352993e1cf81d7aeb67de45ae31de40ff6561 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-0

[DynInst_API:] [dyninst/dyninst] 9fd5b3: Issue #248 ([ARM Decoding] Stack pointer used wher...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 9fd5b32c52bbac9d52937aabf3a6a63b83ee6ce5 https://github.com/dyninst/dyninst/commit/9fd5b32c52bbac9d52937aabf3a6a63b83ee6ce5 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-03 (Sat, 03 De

[DynInst_API:] [dyninst/dyninst] 801206: Issue #245 (ARM Decoding] Paired memory accesses m...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 8012061aa80b44d6ac176b4662f33bbe52e4c2b1 https://github.com/dyninst/dyninst/commit/8012061aa80b44d6ac176b4662f33bbe52e4c2b1 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-02 (Fri, 02 De

[DynInst_API:] [dyninst/dyninst] d4c5b3: Issue #241 ([ARM Decoding] Convert instruction imm...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: d4c5b36b777fc067fcc58ef991b144828b20e5ab https://github.com/dyninst/dyninst/commit/d4c5b36b777fc067fcc58ef991b144828b20e5ab Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-01 (Thu, 01 De

[DynInst_API:] [dyninst/dyninst] 409263: Issue #238 ([ARM Decoding] We should print the ful...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 409263315ff647c8ea180fd28d21f91548ca9fe5 https://github.com/dyninst/dyninst/commit/409263315ff647c8ea180fd28d21f91548ca9fe5 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-12-01 (Thu, 01 De

[DynInst_API:] [dyninst/dyninst] 5dbfd7: Rewrite default instruction handler.

4 (Wed, 14 Sep 2016) Changed paths: A dataflowAPI/README.md R dyninstAPI/README A dyninstAPI/README.md R parseAPI/README A parseAPI/README.md M symtabAPI/README Log Message: --- Updated READMEs for Github markdown Commit: 16ccee18b807800bbb086

[DynInst_API:] [dyninst/dyninst] d60c21: Issue #216 (Repeated register number as constant)

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: d60c21bc943e800f95cc4d54fe4c21c1ee6a4902 https://github.com/dyninst/dyninst/commit/d60c21bc943e800f95cc4d54fe4c21c1ee6a4902 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-11-07 (Mon, 07 No

[DynInst_API:] [dyninst/dyninst] 5f9bbf: Instruction decoding fix: Alias ORR to MOV when th...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 5f9bbfdd1875d079be34d74a9f5ae8feb82b3c3c https://github.com/dyninst/dyninst/commit/5f9bbfdd1875d079be34d74a9f5ae8feb82b3c3c Author: Sunny Shah <sha...@wisc.edu> Date: 2016-11-0

[DynInst_API:] [dyninst/dyninst] 99fb8f: Updated semantics for SBFM and UBFM variants

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 99fb8f7d7f29e19f9d476bc3188be3bbe62e725b https://github.com/dyninst/dyninst/commit/99fb8f7d7f29e19f9d476bc3188be3bbe62e725b Author: Sunny Shah <sha...@wisc.edu> Date: 2016-11-0

[DynInst_API:] [dyninst/dyninst] 234210: Semantics for MOVZ, MOVK, MOVN and the MOV variant...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 23421044f0c6a9fbf594747dc18489ecaa656e22 https://github.com/dyninst/dyninst/commit/23421044f0c6a9fbf594747dc18489ecaa656e22 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-3

[DynInst_API:] [dyninst/dyninst] 657761: Syntax fixes for ARM64

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 657761f1a1e4e5747ac860c89ca270c9b19de3bc https://github.com/dyninst/dyninst/commit/657761f1a1e4e5747ac860c89ca270c9b19de3bc Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-24 (Mon, 24 Oc

[DynInst_API:] [dyninst/dyninst] a979a5: ARM syntax fixes dealign with hexadecimal values a...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: a979a5bff2e00f31bf4e058b5ff9557a3a2750c1 https://github.com/dyninst/dyninst/commit/a979a5bff2e00f31bf4e058b5ff9557a3a2750c1 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-21 (Fri, 21 Oc

[DynInst_API:] [dyninst/dyninst] ba425e: Update the debug log message print calls across va...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: ba425e4cd103d9bead50b4c757374b28d1a32f55 https://github.com/dyninst/dyninst/commit/ba425e4cd103d9bead50b4c757374b28d1a32f55 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-17 (Mon, 17 Oc

[DynInst_API:] [dyninst/dyninst] a41383: Modifications to use the new ArchSpecificFormatter...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: a41383bc7229ccfad4c6c372edcd0bc39ac46126 https://github.com/dyninst/dyninst/commit/a41383bc7229ccfad4c6c372edcd0bc39ac46126 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-17 (Mon, 17 Oc

[DynInst_API:] [dyninst/dyninst] 91f689: Class declaration for base architecture specific f...

Branch: refs/heads/att_syntax Home: https://github.com/dyninst/dyninst Commit: 91f68981d16606d4c725a27315c6f970bf83addc https://github.com/dyninst/dyninst/commit/91f68981d16606d4c725a27315c6f970bf83addc Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-17 (Mon, 17 Oc

[DynInst_API:] [dyninst/dyninst] 94beeb: Bug fix for setting major and minor numbers of the...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 94beeb565c3967a14be8e3d87254b986c0a107d2 https://github.com/dyninst/dyninst/commit/94beeb565c3967a14be8e3d87254b986c0a107d2 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-0

[DynInst_API:] [dyninst/dyninst] e255d6: Added ability to convert the ARM64 SIMD/FP registe...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: e255d6e0c395f07c48b0d40d419c6432bbb2919b https://github.com/dyninst/dyninst/commit/e255d6e0c395f07c48b0d40d419c6432bbb2919b Author: Sunny Shah <sha...@wisc.edu> Date: 2016-10-0

[DynInst_API:] [dyninst/dyninst] 3a15c6: 1. Create an architecture independent interface to...

table analysis 2. Change slicing code to use architecture independent interface to get program counter Commit: a269cee660426cb533a7fde57a7b16b8ad3a17de https://github.com/dyninst/dyninst/commit/a269cee660426cb533a7fde57a7b16b8ad3a17de Author: Sunny Shah <shahsunny...@gmail.com>

[DynInst_API:] [dyninst/dyninst] 237d17: Updated semantics to use register descriptor REG_N...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 237d17d7cb4aded05e879ae42fb7d50efa919846 https://github.com/dyninst/dyninst/commit/237d17d7cb4aded05e879ae42fb7d50efa919846 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-2

[DynInst_API:] [dyninst/dyninst] a43a70: Modify DispatcherARM64 methods accessing flags to ...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: a43a70ed9d1e0dc97fe17a76015af76522a86ef8 https://github.com/dyninst/dyninst/commit/a43a70ed9d1e0dc97fe17a76015af76522a86ef8 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-2

[DynInst_API:] [dyninst/dyninst] ae8875: Register definitions for treating the 4 ARM64 flag...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: ae8875e306a2c2ad77d2ea9b4b9c41e1770c8d74 https://github.com/dyninst/dyninst/commit/ae8875e306a2c2ad77d2ea9b4b9c41e1770c8d74 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-2

[DynInst_API:] [dyninst/dyninst] 82a571: The argument to SymEvalSemantics::addWithCarries f...

Branch: refs/heads/master Home: https://github.com/dyninst/dyninst Commit: 82a57100bb9adcc2f633f008dd94cb5fb94d8901 https://github.com/dyninst/dyninst/commit/82a57100bb9adcc2f633f008dd94cb5fb94d8901 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-18 (Sun, 18 Se

[DynInst_API:] [dyninst/dyninst] 49e7cd: The argument to SymEvalSemantics::addWithCarries f...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 49e7cd96b6ba4e6db7607156cf6f126c2492021c https://github.com/dyninst/dyninst/commit/49e7cd96b6ba4e6db7607156cf6f126c2492021c Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-1

[DynInst_API:] [dyninst/dyninst] 16ccee: When determining the ROSE register category for AR...

Branch: refs/heads/master Home: https://github.com/dyninst/dyninst Commit: 16ccee18b807800bbb08638607d6302df831eb76 https://github.com/dyninst/dyninst/commit/16ccee18b807800bbb08638607d6302df831eb76 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-14 (Wed, 14 Se

[DynInst_API:] [dyninst/dyninst] 5bc0be: When determining the ROSE register category for AR...

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 5bc0beb79a4aece49ab4f94e4851cbf7902fe01c https://github.com/dyninst/dyninst/commit/5bc0beb79a4aece49ab4f94e4851cbf7902fe01c Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-1

Re: [DynInst_API:] instructionAPI fails on ARM 64

Hi Mark, This message couldn't have come at a better time. The "Instruction processing threw exception for instruction" messages are thrown when Dyninst cannot find the semantics for said instruction. The master branch does not contain semantics for load/store instructions; in fact, I just

[DynInst_API:] [dyninst/dyninst] 31e138: Minor fixes for ARM64 semantics

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 31e138a3eef66fe7992236deacc5504b9d7851d0 https://github.com/dyninst/dyninst/commit/31e138a3eef66fe7992236deacc5504b9d7851d0 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-1

[DynInst_API:] [dyninst/dyninst] 3ac05a: Added semantics for the following instructions:

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: 3ac05a7597024895d504adcc2c74ec75d873f02a https://github.com/dyninst/dyninst/commit/3ac05a7597024895d504adcc2c74ec75d873f02a Author: Sunny Shah <sha...@wisc.edu> Date: 2016-09-0

[DynInst_API:] [dyninst/dyninst] d087ef: Fix register conversion between Dyninst and ROSE

Branch: refs/heads/arm64/feature/semantics Home: https://github.com/dyninst/dyninst Commit: d087ef0ac96c21eaca191c744d220080c2b58840 https://github.com/dyninst/dyninst/commit/d087ef0ac96c21eaca191c744d220080c2b58840 Author: Sunny Shah <sha...@wisc.edu> Date: 2016-07-2

[DynInst_API:] [dyninst/dyninst] 91be3b: set_type() in SgAsmExpression has to be virtual

Branch: refs/heads/arm64/feature/semantics_setup Home: https://github.com/dyninst/dyninst Commit: 91be3b474cfd0f29cfe1eb2fb6ce21d9082f0bc5 https://github.com/dyninst/dyninst/commit/91be3b474cfd0f29cfe1eb2fb6ce21d9082f0bc5 Author: Sunny Shah <sha...@wisc.edu> Date: 2016

[DynInst_API:] [dyninst/dyninst] 322964: Allow accessing StateARM64's Dyninst::Address memb...

Branch: refs/heads/arm64/feature/semantics_setup Home: https://github.com/dyninst/dyninst Commit: 322964ef7b002bb470f0d595c54c5ba84835490e https://github.com/dyninst/dyninst/commit/322964ef7b002bb470f0d595c54c5ba84835490e Author: Sunny Shah <sha...@wisc.edu> Date: 2016

[DynInst_API:] [dyninst/dyninst] f8ad50: Added definitions for the remaining pure virtual m...

Branch: refs/heads/arm64/feature/semantics_setup Home: https://github.com/dyninst/dyninst Commit: f8ad50d8b1b691761f0eaf7ccf3f3dbbfe7a8ea3 https://github.com/dyninst/dyninst/commit/f8ad50d8b1b691761f0eaf7ccf3f3dbbfe7a8ea3 Author: Sunny Shah <sha...@wisc.edu> Date: 2016

[DynInst_API:] [dyninst/dyninst] 4e4f31: Merge branch 'master' of https://github.com/dynins...

Branch: refs/heads/arm64/feature/semantics_setup Home: https://github.com/dyninst/dyninst Commit: 4e4f312fd963725767f21988e8ad07809faab30e https://github.com/dyninst/dyninst/commit/4e4f312fd963725767f21988e8ad07809faab30e Author: Sunny Shah <sha...@wisc.edu> Date: 2016

[DynInst_API:] [dyninst/dyninst] ae5df2: Merge branch 'arm64/feature/semantics_roseconvert'

Branch: refs/heads/arm64/feature/semantics_importnew Home: https://github.com/dyninst/dyninst Commit: ae5df2f421f85e049a9ee7b4be6851ee9be9d381 https://github.com/dyninst/dyninst/commit/ae5df2f421f85e049a9ee7b4be6851ee9be9d381 Author: Sunny Shah <sha...@wisc.edu> Date: 2

[DynInst_API:] Deletion of the arm64 branch

Hello, The arm64 branch, that until now was used for committing changes specific to the ARMv8 port of Dyninst, has been brought up to date with master and was merged into it yesterday. Keeping in mind our policy on branching going ahead (short topic branches created off master and then

Re: [DynInst_API:] Dyninst aarch64 ISA xml files

Peter, The XML files are not publicly available - they're accessible to a very small group of people at UW. Thanks, Sunny On 4/28/2016 8:49 AM, Peter Foley wrote: Hi, I've been poking at the ISA generation script at