Ignore me ;)
I described one thing but implemeted something else. I had IRQ pinned to
core 0, doing housekeeping and L3 cache trashing happened.
With Core 0 - housekeeping
Core 1 - IRQ
Core 2 - leftovers of softIRQ, kernel side of AFP
I have L3 misses 0.6% on Core 1 where packets are delivered.
Hey, one more question to the already known (to some of you) tuning
project. We can see excellent performance, findings how to achieve that
will soon be published. There is one more little thing that keeps me up at
night though ;)
2x E5-2697 v3, 2x X710 now, one per NUMA node.
I use isolcpus kern
