Hi Andrew,
wt., 25 wrz 2018 o 18:25 Andrew Fish napisał(a):
>
>
>
> On Sep 25, 2018, at 8:41 AM, Marcin Wojtas wrote:
>
> Hi Star, Ard
>
> With this patch, my platforms which use NonDiscoverableDevices layer
> for supporting generic Xhci controller, fail in a strange way:
> "Synchronous Exceptio
> On Sep 25, 2018, at 8:41 AM, Marcin Wojtas wrote:
>
> Hi Star, Ard
>
> With this patch, my platforms which use NonDiscoverableDevices layer
> for supporting generic Xhci controller, fail in a strange way:
> "Synchronous Exception at 0x3F910AFC
> PC 0x3F910AFC (0x3F908000+0x00
On Tue, 25 Sep 2018 at 17:51, Ard Biesheuvel wrote:
>
> On Tue, 25 Sep 2018 at 17:41, Marcin Wojtas wrote:
> >
> > Hi Star, Ard
> >
> > With this patch, my platforms which use NonDiscoverableDevices layer
> > for supporting generic Xhci controller, fail in a strange way:
> > "Synchronous Exceptio
On Tue, 25 Sep 2018 at 17:41, Marcin Wojtas wrote:
>
> Hi Star, Ard
>
> With this patch, my platforms which use NonDiscoverableDevices layer
> for supporting generic Xhci controller, fail in a strange way:
> "Synchronous Exception at 0x3F910AFC
> PC 0x3F910AFC (0x3F908000+0x8AF
Hi Star, Ard
With this patch, my platforms which use NonDiscoverableDevices layer
for supporting generic Xhci controller, fail in a strange way:
"Synchronous Exception at 0x3F910AFC
PC 0x3F910AFC (0x3F908000+0x8AFC) [ 0] DxeCore.dll
PC 0x3F910AE0 (0x3F908000+0x8AE0)
Reviewed-by: Ruiyu Ni
Thanks/Ray
> -Original Message-
> From: Zeng, Star
> Sent: Tuesday, September 11, 2018 10:04 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Ni, Ruiyu ; Wang,
> Jian J ; Wang, Fei1
> Subject: [PATCH] MdeModulePkg XhciDxe: Set HSEE Bit if SERR# Enable Bit is
> s
When the HSEE in the USBCMD bit is a ‘1’ and the HSE bit in the USBSTS
register is a ‘1’, the xHC shall assert out-of-band error signaling to
the host and assert the SERR# pin.
To prevent masking any potential issues with SERR, this patch is to set
USBCMD Host System Error Enable(HSEE) Bit if PCICM
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