Remove FspPlatformSecLib, and align FspWrapper Sec platform library to
PlatformSecLib defined in UefiCpuPkg.
Add Wrapper to indicate it for FspWrapper only.
The FSP1.1 compatibility is NOT maintained.
The new Intel platform will follow FSP2.0.
The old platform can either use an old EDK branch,
or move FSP1.1 support to platform directory.
Cc: Giri P Mudusuru <giri.p.mudus...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangara...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen....@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudus...@intel.com>
Reviewed-by: Maurice Ma <maurice...@intel.com>
Reviewed-by: Ravi P Rangarajan <ravi.p.rangara...@intel.com>
---
IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h
| 67 ----
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/FspWrapperPlatformSecLibSample.c
| 133 ++++++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Fsp.h
| 51 +++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.S
| 130 +++++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.asm
| 140 ++++++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.S
| 336 ++++++++++++++++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.asm
| 353 +++++++++++++++++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.S
| 77 +++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.asm
| 82 +++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/PlatformInit.c
| 45 +++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf
| 90 +++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecGetPerformance.c
| 90 +++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecPlatformInformation.c
| 84 +++++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
| 45 +++
IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecTempRamDone.c
| 52 +++
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c
| 151 ---------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S
| 43 ---
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm
| 50 ---
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h
| 48 ---
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S
| 130 -------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm
| 140 --------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
| 338 -------------------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
| 355 --------------------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S
| 77 -----
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm
| 82 -----
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c
| 43 ---
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c
| 111 ------
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c
| 90 -----
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
| 93 -----
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c
| 84 -----
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
| 22 --
IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c
| 154 ---------
32 files changed, 1708 insertions(+), 2078 deletions(-)
diff --git a/IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h
b/IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h
deleted file mode 100644
index 58447a6..0000000
--- a/IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/** @file
- Provide FSP wrapper platform sec related function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __FSP_PLATFORM_SEC_LIB_H__
-#define __FSP_PLATFORM_SEC_LIB_H__
-
-/**
- A developer supplied function to perform platform specific operations.
-
- It's a developer supplied function to perform any operations appropriate to a
- given platform. It's invoked just before passing control to PEI core by SEC
- core. Platform developer may modify the SecCoreData passed to PEI Core.
- It returns a platform specific PPI list that platform wishes to pass to PEI
core.
- The Generic SEC core module will merge this list to join the final list
passed to
- PEI core.
-
- @param[in,out] SecCoreData The same parameter as passing to PEI
core. It
- could be overridden by this function.
-
- @return The platform specific PPI list to be passed to PEI core or
- NULL if there is no need of such platform specific PPI list.
-
-**/
-EFI_PEI_PPI_DESCRIPTOR *
-EFIAPI
-SecPlatformMain (
- IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
- );
-
-/**
- Call PEI core entry point with new temporary RAM.
-
- @param[in] FspHobList HobList produced by FSP.
- @param[in] StartOfRange Start of temporary RAM.
- @param[in] EndOfRange End of temporary RAM.
-**/
-VOID
-EFIAPI
-CallPeiCoreEntryPoint (
- IN VOID *FspHobList,
- IN VOID *StartOfRange,
- IN VOID *EndOfRange
- );
-
-/**
- Save SEC context before call FspInit.
-
- @param[in] PeiServices Pointer to PEI Services Table.
-**/
-VOID
-EFIAPI
-SaveSecContext (
- IN CONST EFI_PEI_SERVICES **PeiServices
- );
-
-#endif
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/FspWrapperPlatformSecLibSample.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/FspWrapperPlatformSecLibSample.c
new file mode 100644
index 0000000..19379c2
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/FspWrapperPlatformSecLibSample.c
@@ -0,0 +1,133 @@
+/** @file
+ Sample to provide FSP wrapper platform sec related function.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Ppi/SecPlatformInformation.h>
+#include <Ppi/SecPerformance.h>
+
+#include <Library/LocalApicLib.h>
+
+/**
+ This interface conveys state information out of the Security (SEC) phase
into PEI.
+
+ @param[in] PeiServices Pointer to the PEI Services Table.
+ @param[in,out] StructureSize Pointer to the variable describing
size of the input buffer.
+ @param[out] PlatformInformationRecord Pointer to the
EFI_SEC_PLATFORM_INFORMATION_RECORD.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
+
+**/
+EFI_STATUS
+EFIAPI
+SecPlatformInformation (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINT64 *StructureSize,
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
+ );
+
+/**
+ This interface conveys performance information out of the Security (SEC)
phase into PEI.
+
+ This service is published by the SEC phase. The SEC phase handoff has an
optional
+ EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed
from SEC into the
+ PEI Foundation. As such, if the platform supports collecting performance
data in SEC,
+ this information is encapsulated into the data structure abstracted by this
service.
+ This information is collected for the boot-strap processor (BSP) on IA-32.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
PEI_SEC_PERFORMANCE_PPI.
+ @param[out] Performance The pointer to performance data collected in SEC
phase.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+
+**/
+EFI_STATUS
+EFIAPI
+SecGetPerformance (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SEC_PERFORMANCE_PPI *This,
+ OUT FIRMWARE_SEC_PERFORMANCE *Performance
+ );
+
+PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
+ SecGetPerformance
+};
+
+EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gTopOfTemporaryRamPpiGuid,
+ NULL // To be patched later.
+ },
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gPeiSecPerformancePpiGuid,
+ &mSecPerformancePpi
+ },
+};
+
+/**
+ A developer supplied function to perform platform specific operations.
+
+ It's a developer supplied function to perform any operations appropriate to a
+ given platform. It's invoked just before passing control to PEI core by SEC
+ core. Platform developer may modify the SecCoreData passed to PEI Core.
+ It returns a platform specific PPI list that platform wishes to pass to PEI
core.
+ The Generic SEC core module will merge this list to join the final list
passed to
+ PEI core.
+
+ @param[in,out] SecCoreData The same parameter as passing to PEI
core. It
+ could be overridden by this function.
+
+ @return The platform specific PPI list to be passed to PEI core or
+ NULL if there is no need of such platform specific PPI list.
+
+**/
+EFI_PEI_PPI_DESCRIPTOR *
+EFIAPI
+SecPlatformMain (
+ IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
+ )
+{
+ EFI_PEI_PPI_DESCRIPTOR *PpiList;
+
+ DEBUG((DEBUG_INFO, "SecPlatformMain\n"));
+
+ DEBUG((DEBUG_INFO, "BootFirmwareVolumeBase - 0x%x\n",
SecCoreData->BootFirmwareVolumeBase));
+ DEBUG((DEBUG_INFO, "BootFirmwareVolumeSize - 0x%x\n",
SecCoreData->BootFirmwareVolumeSize));
+ DEBUG((DEBUG_INFO, "TemporaryRamBase - 0x%x\n",
SecCoreData->TemporaryRamBase));
+ DEBUG((DEBUG_INFO, "TemporaryRamSize - 0x%x\n",
SecCoreData->TemporaryRamSize));
+ DEBUG((DEBUG_INFO, "PeiTemporaryRamBase - 0x%x\n",
SecCoreData->PeiTemporaryRamBase));
+ DEBUG((DEBUG_INFO, "PeiTemporaryRamSize - 0x%x\n",
SecCoreData->PeiTemporaryRamSize));
+ DEBUG((DEBUG_INFO, "StackBase - 0x%x\n",
SecCoreData->StackBase));
+ DEBUG((DEBUG_INFO, "StackSize - 0x%x\n",
SecCoreData->StackSize));
+
+ InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
+
+ //
+ // Use middle of Heap as temp buffer, it will be copied by caller.
+ // Do not use Stack, because it will cause wrong calculation on stack by
PeiCore
+ //
+ PpiList = (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase +
(UINTN)SecCoreData->PeiTemporaryRamSize/2);
+ CopyMem (PpiList, mPeiSecPlatformPpi, sizeof(mPeiSecPlatformPpi));
+
+ //
+ // Patch TopOfTemporaryRamPpi
+ //
+ PpiList[0].Ppi = (VOID *)((UINTN)SecCoreData->TemporaryRamBase +
SecCoreData->TemporaryRamSize);
+
+ return PpiList;
+}
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Fsp.h
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Fsp.h
new file mode 100644
index 0000000..c625a88
--- /dev/null
+++ b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Fsp.h
@@ -0,0 +1,51 @@
+/** @file
+ Fsp related definitions
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __FSP_H__
+#define __FSP_H__
+
+//
+// Fv Header
+//
+#define FVH_FV_LENGTH_OFFSET 0x20
+#define FVH_SIGINATURE_OFFSET 0x28
+#define FVH_SIGINATURE_VALID_VALUE 0x4856465F // valid signature:_FVH
+#define FVH_HEADER_LENGTH_OFFSET 0x30
+#define FVH_EXTHEADER_OFFSET_OFFSET 0x34
+#define FVH_EXTHEADER_SIZE_OFFSET 0x10
+
+//
+// Ffs Header
+//
+#define FSP_HEADER_SIGNATURE_OFFSET 0x1C
+#define FSP_HEADER_SIGNATURE 0x48505346 ; valid signature:FSPH
+#define FSP_HEADER_GUID_DWORD1 0x912740BE
+#define FSP_HEADER_GUID_DWORD2 0x47342284
+#define FSP_HEADER_GUID_DWORD3 0xB08471B9
+#define FSP_HEADER_GUID_DWORD4 0x0C3F3527
+#define FFS_HEADER_SIZE_VALUE 0x18
+
+//
+// Section Header
+//
+#define SECTION_HEADER_TYPE_OFFSET 0x03
+#define RAW_SECTION_HEADER_SIZE_VALUE 0x04
+
+//
+// Fsp Header
+//
+#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
+#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
+
+#endif
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.S
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.S
new file mode 100644
index 0000000..c35f02b
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.S
@@ -0,0 +1,130 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# PeiCoreEntry.S
+#
+# Abstract:
+#
+# Find and call SecStartup
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
+ASM_PFX(CallPeiCoreEntryPoint):
+ #
+ # Obtain the hob list pointer
+ #
+ movl 0x4(%esp), %eax
+ #
+ # Obtain the stack information
+ # ECX: start of range
+ # EDX: end of range
+ #
+ movl 0x8(%esp), %ecx
+ movl 0xC(%esp), %edx
+
+ #
+ # Platform init
+ #
+ pushal
+ pushl %edx
+ pushl %ecx
+ pushl %eax
+ call ASM_PFX(PlatformInit)
+ popl %eax
+ popl %eax
+ popl %eax
+ popal
+
+ #
+ # Set stack top pointer
+ #
+ movl %edx, %esp
+
+ #
+ # Push the hob list pointer
+ #
+ pushl %eax
+
+ #
+ # Save the value
+ # ECX: start of range
+ # EDX: end of range
+ #
+ movl %esp, %ebp
+ pushl %ecx
+ pushl %edx
+
+ #
+ # Push processor count to stack first, then BIST status (AP then BSP)
+ #
+ movl $1, %eax
+ cpuid
+ shr $16, %ebx
+ andl $0x000000FF, %ebx
+ cmp $1, %bl
+ jae PushProcessorCount
+
+ #
+ # Some processors report 0 logical processors. Effectively 0 = 1.
+ # So we fix up the processor count
+ #
+ inc %ebx
+
+PushProcessorCount:
+ pushl %ebx
+
+ #
+ # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
+ # for all processor threads
+ #
+ xorl %ecx, %ecx
+ movb %bl, %cl
+PushBist:
+ movd %mm0, %eax
+ pushl %eax
+ loop PushBist
+
+ # Save Time-Stamp Counter
+ movd %mm5, %eax
+ pushl %eax
+
+ movd %mm6, %eax
+ pushl %eax
+
+ #
+ # Pass entry point of the PEI core
+ #
+ movl $0xFFFFFFE0, %edi
+ pushl %ds:(%edi)
+
+ #
+ # Pass BFV into the PEI Core
+ #
+ movl $0xFFFFFFFC, %edi
+ pushl %ds:(%edi)
+
+ #
+ # Pass stack size into the PEI Core
+ #
+ movl -4(%ebp), %ecx
+ movl -8(%ebp), %edx
+ pushl %ecx # RamBase
+
+ subl %ecx, %edx
+ pushl %edx # RamSize
+
+ #
+ # Pass Control into the PEI Core
+ #
+ call ASM_PFX(SecStartup)
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.asm
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.asm
new file mode 100644
index 0000000..cd1c7b8
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.asm
@@ -0,0 +1,140 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD
License
+; which accompanies this distribution. The full text of the license may be
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; PeiCoreEntry.asm
+;
+; Abstract:
+;
+; Find and call SecStartup
+;
+;------------------------------------------------------------------------------
+
+.686p
+.xmm
+.model flat, c
+.code
+
+EXTRN SecStartup:NEAR
+EXTRN PlatformInit:NEAR
+
+CallPeiCoreEntryPoint PROC PUBLIC
+ ;
+ ; Obtain the hob list pointer
+ ;
+ mov eax, [esp+4]
+ ;
+ ; Obtain the stack information
+ ; ECX: start of range
+ ; EDX: end of range
+ ;
+ mov ecx, [esp+8]
+ mov edx, [esp+0Ch]
+
+ ;
+ ; Platform init
+ ;
+ pushad
+ push edx
+ push ecx
+ push eax
+ call PlatformInit
+ pop eax
+ pop eax
+ pop eax
+ popad
+
+ ;
+ ; Set stack top pointer
+ ;
+ mov esp, edx
+
+ ;
+ ; Push the hob list pointer
+ ;
+ push eax
+
+ ;
+ ; Save the value
+ ; ECX: start of range
+ ; EDX: end of range
+ ;
+ mov ebp, esp
+ push ecx
+ push edx
+
+ ;
+ ; Push processor count to stack first, then BIST status (AP then BSP)
+ ;
+ mov eax, 1
+ cpuid
+ shr ebx, 16
+ and ebx, 0000000FFh
+ cmp bl, 1
+ jae PushProcessorCount
+
+ ;
+ ; Some processors report 0 logical processors. Effectively 0 = 1.
+ ; So we fix up the processor count
+ ;
+ inc ebx
+
+PushProcessorCount:
+ push ebx
+
+ ;
+ ; We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
+ ; for all processor threads
+ ;
+ xor ecx, ecx
+ mov cl, bl
+PushBist:
+ movd eax, mm0
+ push eax
+ loop PushBist
+
+ ; Save Time-Stamp Counter
+ movd eax, mm5
+ push eax
+
+ movd eax, mm6
+ push eax
+
+ ;
+ ; Pass entry point of the PEI core
+ ;
+ mov edi, 0FFFFFFE0h
+ push DWORD PTR ds:[edi]
+
+ ;
+ ; Pass BFV into the PEI Core
+ ;
+ mov edi, 0FFFFFFFCh
+ push DWORD PTR ds:[edi]
+
+ ;
+ ; Pass stack size into the PEI Core
+ ;
+ mov ecx, [ebp - 4]
+ mov edx, [ebp - 8]
+ push ecx ; RamBase
+
+ sub edx, ecx
+ push edx ; RamSize
+
+ ;
+ ; Pass Control into the PEI Core
+ ;
+ call SecStartup
+CallPeiCoreEntryPoint ENDP
+
+END
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.S
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.S
new file mode 100644
index 0000000..aff77f6
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.S
@@ -0,0 +1,336 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SecEntry.S
+#
+# Abstract:
+#
+# This is the code that goes from real-mode to protected mode.
+# It consumes the reset vector, calls TempRamInit API from FSP binary.
+#
+#------------------------------------------------------------------------------
+
+#include "Fsp.h"
+
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress)
+
+ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
+ASM_PFX(_TEXT_REALMODE):
+#----------------------------------------------------------------------------
+#
+# Procedure: _ModuleEntryPoint
+#
+# Input: None
+#
+# Output: None
+#
+# Destroys: Assume all registers
+#
+# Description:
+#
+# Transition to non-paged flat-model protected mode from a
+# hard-coded GDT that provides exactly two descriptors.
+# This is a bare bones transition to protected mode only
+# used for a while in PEI and possibly DXE.
+#
+# After enabling protected mode, a far jump is executed to
+# transfer to PEI using the newly loaded GDT.
+#
+# Return: None
+#
+# MMX Usage:
+# MM0 = BIST State
+# MM5 = Save time-stamp counter value high32bit
+# MM6 = Save time-stamp counter value low32bit.
+#
+#----------------------------------------------------------------------------
+
+.align 4
+ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ fninit # clear any pending Floating point
exceptions
+ #
+ # Store the BIST value in mm0
+ #
+ movd %eax, %mm0
+
+ #
+ # Save time-stamp counter value
+ # rdtsc load 64bit time-stamp counter to EDX:EAX
+ #
+ rdtsc
+ movd %edx, %mm5
+ movd %ecx, %mm6
+
+ #
+ # Load the GDT table in GdtDesc
+ #
+ movl $GdtDesc, %esi
+ .byte 0x66
+ lgdt %cs:(%si)
+
+ #
+ # Transition to 16 bit protected mode
+ #
+ movl %cr0, %eax # Get control register 0
+ orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
+ movl %eax, %cr0 # Activate protected mode
+
+ movl %cr4, %eax # Get control register 4
+ orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT
bit (bit #10)
+ movl %eax, %cr4
+
+ #
+ # Now we're in 16 bit protected mode
+ # Set up the selectors for 32 bit protected mode entry
+ #
+ movw SYS_DATA_SEL, %ax
+ movw %ax, %ds
+ movw %ax, %es
+ movw %ax, %fs
+ movw %ax, %gs
+ movw %ax, %ss
+
+ #
+ # Transition to Flat 32 bit protected mode
+ # The jump to a far pointer causes the transition to 32 bit mode
+ #
+ movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
+ jmp *%cs:(%si)
+
+ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
+ASM_PFX(_TEXT_PROTECTED_MODE):
+
+#----------------------------------------------------------------------------
+#
+# Procedure: ProtectedModeEntryPoint
+#
+# Input: None
+#
+# Output: None
+#
+# Destroys: Assume all registers
+#
+# Description:
+#
+# This function handles:
+# Call two basic APIs from FSP binary
+# Initializes stack with some early data (BIST, PEI entry, etc)
+#
+# Return: None
+#
+#----------------------------------------------------------------------------
+
+.align 4
+ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
+ASM_PFX(ProtectedModeEntryPoint):
+
+ # Find the fsp info header
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress), %edi
+
+ movl FVH_SIGINATURE_OFFSET(%edi), %eax
+ cmp $FVH_SIGINATURE_VALID_VALUE, %eax
+ jnz FspHeaderNotFound
+
+ xorl %eax, %eax
+ movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
+ cmp %ax, 0
+ jnz FspFvExtHeaderExist
+
+ xorl %eax, %eax
+ movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
+ addl %eax, %edi
+ jmp FspCheckFfsHeader
+
+FspFvExtHeaderExist:
+ addl %eax, %edi
+ movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
+ addl %eax, %edi
+
+ # Round up to 8 byte alignment
+ movl %edi, %eax
+ andb $0x07, %al
+ jz FspCheckFfsHeader
+
+ and $0xFFFFFFF8, %edi
+ add $0x08, %edi
+
+FspCheckFfsHeader:
+ # Check the ffs guid
+ movl (%edi), %eax
+ cmp $FSP_HEADER_GUID_DWORD1, %eax
+ jnz FspHeaderNotFound
+
+ movl 0x4(%edi), %eax
+ cmp $FSP_HEADER_GUID_DWORD2, %eax
+ jnz FspHeaderNotFound
+
+ movl 0x08(%edi), %eax
+ cmp $FSP_HEADER_GUID_DWORD3, %eax
+ jnz FspHeaderNotFound
+
+ movl 0x0c(%edi), %eax
+ cmp $FSP_HEADER_GUID_DWORD4, %eax
+ jnz FspHeaderNotFound
+
+ add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
+
+ # Check the section type as raw section
+ movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
+ cmp $0x19, %al
+ jnz FspHeaderNotFound
+
+ addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
+ jmp FspHeaderFound
+
+FspHeaderNotFound:
+ jmp .
+
+FspHeaderFound:
+ # Get the fsp TempRamInit Api address
+ movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
+ addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
+
+ # Setup the hardcode stack
+ movl $TempRamInitStack, %esp
+
+ # Call the fsp TempRamInit Api
+ jmp *%eax
+
+TempRamInitDone:
+ cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for
Microcode Update not found.
+ je CallSecFspInit #If microcode not found, don't hang, but continue.
+
+ cmp $0x0, %eax
+ jnz FspApiFailed
+
+ # ECX: start of range
+ # EDX: end of range
+CallSecFspInit:
+ xorl %eax, %eax
+ movl %edx, %esp
+
+ # Align the stack at DWORD
+ addl $3, %esp
+ andl $0xFFFFFFFC, %esp
+
+ pushl %edx
+ pushl %ecx
+ pushl %eax # zero - no hob list yet
+ call ASM_PFX(CallPeiCoreEntryPoint)
+
+FspApiFailed:
+ jmp .
+
+.align 0x10
+TempRamInitStack:
+ .long TempRamInitDone
+ .long ASM_PFX(FsptUpdDataPtr)
+
+#
+# ROM-based Global-Descriptor Table for the Tiano PEI Phase
+#
+.align 16
+
+#
+# GDT[0]: 0x00: Null entry, never used.
+#
+.equ NULL_SEL, . - GDT_BASE # Selector [0]
+GDT_BASE:
+BootGdtTable: .long 0
+ .long 0
+#
+# Linear data segment descriptor
+#
+.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
+ .word 0xFFFF # limit 0xFFFFF
+ .word 0 # base 0
+ .byte 0
+ .byte 0x92 # present, ring 0, data, expand-up,
writable
+ .byte 0xCF # page-granular, 32-bit
+ .byte 0
+#
+# Linear code segment descriptor
+#
+.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
+ .word 0xFFFF # limit 0xFFFFF
+ .word 0 # base 0
+ .byte 0
+ .byte 0x9B # present, ring 0, data, expand-up,
not-writable
+ .byte 0xCF # page-granular, 32-bit
+ .byte 0
+#
+# System data segment descriptor
+#
+.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
+ .word 0xFFFF # limit 0xFFFFF
+ .word 0 # base 0
+ .byte 0
+ .byte 0x93 # present, ring 0, data, expand-up,
not-writable
+ .byte 0xCF # page-granular, 32-bit
+ .byte 0
+
+#
+# System code segment descriptor
+#
+.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
+ .word 0xFFFF # limit 0xFFFFF
+ .word 0 # base 0
+ .byte 0
+ .byte 0x9A # present, ring 0, data, expand-up,
writable
+ .byte 0xCF # page-granular, 32-bit
+ .byte 0
+#
+# Spare segment descriptor
+#
+.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
+ .word 0xFFFF # limit 0xFFFFF
+ .word 0 # base 0
+ .byte 0x0E # Changed from F000 to E000.
+ .byte 0x9B # present, ring 0, code, expand-up,
writable
+ .byte 0x00 # byte-granular, 16-bit
+ .byte 0
+#
+# Spare segment descriptor
+#
+.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
+ .word 0xFFFF # limit 0xFFFF
+ .word 0 # base 0
+ .byte 0
+ .byte 0x93 # present, ring 0, data, expand-up,
not-writable
+ .byte 0x00 # byte-granular, 16-bit
+ .byte 0
+
+#
+# Spare segment descriptor
+#
+.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
+ .word 0 # limit 0
+ .word 0 # base 0
+ .byte 0
+ .byte 0 # present, ring 0, data, expand-up,
writable
+ .byte 0 # page-granular, 32-bit
+ .byte 0
+.equ GDT_SIZE, . - BootGdtTable # Size, in bytes
+
+#
+# GDT Descriptor
+#
+GdtDesc: # GDT descriptor
+ .word GDT_SIZE - 1 # GDT limit
+ .long BootGdtTable # GDT base address
+
+ASM_PFX(ProtectedModeEntryLinearAddress):
+ProtectedModeEntryLinearOffset:
+ .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
+ .word LINEAR_CODE_SEL
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.asm
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.asm
new file mode 100644
index 0000000..ab8d46e
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.asm
@@ -0,0 +1,353 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD
License
+; which accompanies this distribution. The full text of the license may be
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SecEntry.asm
+;
+; Abstract:
+;
+; This is the code that goes from real-mode to protected mode.
+; It consumes the reset vector, calls TempRamInit API from FSP binary.
+;
+;------------------------------------------------------------------------------
+
+#include "Fsp.h"
+
+.686p
+.xmm
+.model small, c
+
+EXTRN CallPeiCoreEntryPoint:NEAR
+EXTRN FsptUpdDataPtr:FAR
+
+; Pcds
+EXTRN PcdGet32 (PcdFsptBaseAddress):DWORD
+
+_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
+ ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
+
+;----------------------------------------------------------------------------
+;
+; Procedure: _ModuleEntryPoint
+;
+; Input: None
+;
+; Output: None
+;
+; Destroys: Assume all registers
+;
+; Description:
+;
+; Transition to non-paged flat-model protected mode from a
+; hard-coded GDT that provides exactly two descriptors.
+; This is a bare bones transition to protected mode only
+; used for a while in PEI and possibly DXE.
+;
+; After enabling protected mode, a far jump is executed to
+; transfer to PEI using the newly loaded GDT.
+;
+; Return: None
+;
+; MMX Usage:
+; MM0 = BIST State
+; MM5 = Save time-stamp counter value high32bit
+; MM6 = Save time-stamp counter value low32bit.
+;
+;----------------------------------------------------------------------------
+
+align 4
+_ModuleEntryPoint PROC NEAR C PUBLIC
+ fninit ; clear any pending Floating point
exceptions
+ ;
+ ; Store the BIST value in mm0
+ ;
+ movd mm0, eax
+
+ ;
+ ; Save time-stamp counter value
+ ; rdtsc load 64bit time-stamp counter to EDX:EAX
+ ;
+ rdtsc
+ movd mm5, edx
+ movd mm6, eax
+
+ ;
+ ; Load the GDT table in GdtDesc
+ ;
+ mov esi, OFFSET GdtDesc
+ DB 66h
+ lgdt fword ptr cs:[si]
+
+ ;
+ ; Transition to 16 bit protected mode
+ ;
+ mov eax, cr0 ; Get control register 0
+ or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
+ mov cr0, eax ; Activate protected mode
+
+ mov eax, cr4 ; Get control register 4
+ or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT
bit (bit #10)
+ mov cr4, eax
+
+ ;
+ ; Now we're in 16 bit protected mode
+ ; Set up the selectors for 32 bit protected mode entry
+ ;
+ mov ax, SYS_DATA_SEL
+ mov ds, ax
+ mov es, ax
+ mov fs, ax
+ mov gs, ax
+ mov ss, ax
+
+ ;
+ ; Transition to Flat 32 bit protected mode
+ ; The jump to a far pointer causes the transition to 32 bit mode
+ ;
+ mov esi, offset ProtectedModeEntryLinearAddress
+ jmp fword ptr cs:[si]
+
+_ModuleEntryPoint ENDP
+_TEXT_REALMODE ENDS
+
+_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
+ ASSUME CS:_TEXT_PROTECTED_MODE,
DS:_TEXT_PROTECTED_MODE
+
+;----------------------------------------------------------------------------
+;
+; Procedure: ProtectedModeEntryPoint
+;
+; Input: None
+;
+; Output: None
+;
+; Destroys: Assume all registers
+;
+; Description:
+;
+; This function handles:
+; Call two basic APIs from FSP binary
+; Initializes stack with some early data (BIST, PEI entry, etc)
+;
+; Return: None
+;
+;----------------------------------------------------------------------------
+
+align 4
+ProtectedModeEntryPoint PROC NEAR PUBLIC
+
+ ; Find the fsp info header
+ mov edi, PcdGet32 (PcdFsptBaseAddress)
+
+ mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
+ cmp eax, FVH_SIGINATURE_VALID_VALUE
+ jnz FspHeaderNotFound
+
+ xor eax, eax
+ mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
+ cmp ax, 0
+ jnz FspFvExtHeaderExist
+
+ xor eax, eax
+ mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
+ add edi, eax
+ jmp FspCheckFfsHeader
+
+FspFvExtHeaderExist:
+ add edi, eax
+ mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
+ add edi, eax
+
+ ; Round up to 8 byte alignment
+ mov eax, edi
+ and al, 07h
+ jz FspCheckFfsHeader
+
+ and edi, 0FFFFFFF8h
+ add edi, 08h
+
+FspCheckFfsHeader:
+ ; Check the ffs guid
+ mov eax, dword ptr [edi]
+ cmp eax, FSP_HEADER_GUID_DWORD1
+ jnz FspHeaderNotFound
+
+ mov eax, dword ptr [edi + 4]
+ cmp eax, FSP_HEADER_GUID_DWORD2
+ jnz FspHeaderNotFound
+
+ mov eax, dword ptr [edi + 8]
+ cmp eax, FSP_HEADER_GUID_DWORD3
+ jnz FspHeaderNotFound
+
+ mov eax, dword ptr [edi + 0Ch]
+ cmp eax, FSP_HEADER_GUID_DWORD4
+ jnz FspHeaderNotFound
+
+ add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
+
+ ; Check the section type as raw section
+ mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
+ cmp al, 019h
+ jnz FspHeaderNotFound
+
+ add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
+ jmp FspHeaderFound
+
+FspHeaderNotFound:
+ jmp $
+
+FspHeaderFound:
+ ; Get the fsp TempRamInit Api address
+ mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
+ add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
+
+ ; Setup the hardcode stack
+ mov esp, OFFSET TempRamInitStack
+
+ ; Call the fsp TempRamInit Api
+ jmp eax
+
+TempRamInitDone:
+ cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for
Microcode Update not found.
+ je CallSecFspInit ;If microcode not found, don't hang, but continue.
+
+ cmp eax, 0 ;Check if EFI_SUCCESS retuned.
+ jnz FspApiFailed
+
+ ; ECX: start of range
+ ; EDX: end of range
+CallSecFspInit:
+ xor eax, eax
+ mov esp, edx
+
+ ; Align the stack at DWORD
+ add esp, 3
+ and esp, 0FFFFFFFCh
+
+ push edx
+ push ecx
+ push eax ; zero - no hob list yet
+ call CallPeiCoreEntryPoint
+
+FspApiFailed:
+ jmp $
+
+align 10h
+TempRamInitStack:
+ DD OFFSET TempRamInitDone
+ DD OFFSET FsptUpdDataPtr ; TempRamInitParams
+
+ProtectedModeEntryPoint ENDP
+
+;
+; ROM-based Global-Descriptor Table for the Tiano PEI Phase
+;
+align 16
+PUBLIC BootGdtTable
+
+;
+; GDT[0]: 0x00: Null entry, never used.
+;
+NULL_SEL EQU $ - GDT_BASE ; Selector [0]
+GDT_BASE:
+BootGdtTable DD 0
+ DD 0
+;
+; Linear data segment descriptor
+;
+LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
+ DW 0FFFFh ; limit 0xFFFFF
+ DW 0 ; base 0
+ DB 0
+ DB 092h ; present, ring 0, data, expand-up,
writable
+ DB 0CFh ; page-granular, 32-bit
+ DB 0
+;
+; Linear code segment descriptor
+;
+LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
+ DW 0FFFFh ; limit 0xFFFFF
+ DW 0 ; base 0
+ DB 0
+ DB 09Bh ; present, ring 0, data, expand-up,
not-writable
+ DB 0CFh ; page-granular, 32-bit
+ DB 0
+;
+; System data segment descriptor
+;
+SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
+ DW 0FFFFh ; limit 0xFFFFF
+ DW 0 ; base 0
+ DB 0
+ DB 093h ; present, ring 0, data, expand-up,
not-writable
+ DB 0CFh ; page-granular, 32-bit
+ DB 0
+
+;
+; System code segment descriptor
+;
+SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
+ DW 0FFFFh ; limit 0xFFFFF
+ DW 0 ; base 0
+ DB 0
+ DB 09Ah ; present, ring 0, data, expand-up,
writable
+ DB 0CFh ; page-granular, 32-bit
+ DB 0
+;
+; Spare segment descriptor
+;
+SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
+ DW 0FFFFh ; limit 0xFFFFF
+ DW 0 ; base 0
+ DB 0Eh ; Changed from F000 to E000.
+ DB 09Bh ; present, ring 0, code, expand-up,
writable
+ DB 00h ; byte-granular, 16-bit
+ DB 0
+;
+; Spare segment descriptor
+;
+SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
+ DW 0FFFFh ; limit 0xFFFF
+ DW 0 ; base 0
+ DB 0
+ DB 093h ; present, ring 0, data, expand-up,
not-writable
+ DB 00h ; byte-granular, 16-bit
+ DB 0
+
+;
+; Spare segment descriptor
+;
+SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
+ DW 0 ; limit 0
+ DW 0 ; base 0
+ DB 0
+ DB 0 ; present, ring 0, data, expand-up,
writable
+ DB 0 ; page-granular, 32-bit
+ DB 0
+GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
+
+;
+; GDT Descriptor
+;
+GdtDesc: ; GDT descriptor
+ DW GDT_SIZE - 1 ; GDT limit
+ DD OFFSET BootGdtTable ; GDT base address
+
+
+ProtectedModeEntryLinearAddress LABEL FWORD
+ProtectedModeEntryLinearOffset LABEL DWORD
+ DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
+ DW LINEAR_CODE_SEL
+
+_TEXT_PROTECTED_MODE ENDS
+END
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.S
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.S
new file mode 100644
index 0000000..ae42935
--- /dev/null
+++ b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.S
@@ -0,0 +1,77 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Abstract:
+#
+# Switch the stack from temporary memory to permenent memory.
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# SecSwitchStack (
+# UINT32 TemporaryMemoryBase,
+# UINT32 PermanentMemoryBase
+# )#
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX (SecSwitchStack)
+ASM_PFX(SecSwitchStack):
+ #
+ # Save standard registers so they can be used to change stack
+ #
+ pushl %eax
+ pushl %ebx
+ pushl %ecx
+ pushl %edx
+
+ #
+ # !!CAUTION!! this function address's is pushed into stack after
+ # migration of whole temporary memory, so need save it to permanent
+ # memory at first!
+ #
+ movl 20(%esp), %ebx # Save the first parameter
+ movl 24(%esp), %ecx # Save the second parameter
+
+ #
+ # Save this function's return address into permanent memory at first.
+ # Then, Fixup the esp point to permanent memory
+ #
+ movl %esp, %eax
+ subl %ebx, %eax
+ addl %ecx, %eax
+ movl 0(%esp), %edx # copy pushed register's value to permanent
memory
+ movl %edx, 0(%eax)
+ movl 4(%esp), %edx
+ movl %edx, 4(%eax)
+ movl 8(%esp), %edx
+ movl %edx, 8(%eax)
+ movl 12(%esp), %edx
+ movl %edx, 12(%eax)
+ movl 16(%esp), %edx # Update this function's return address into
permanent memory
+ movl %edx, 16(%eax)
+ movl %eax, %esp # From now, esp is pointed to permanent memory
+
+ #
+ # Fixup the ebp point to permanent memory
+ #
+ movl %ebp, %eax
+ subl %ebx, %eax
+ addl %ecx, %eax
+ movl %eax, %ebp # From now, ebp is pointed to permanent memory
+
+ popl %edx
+ popl %ecx
+ popl %ebx
+ popl %eax
+ ret
+
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.asm
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.asm
new file mode 100644
index 0000000..116b738
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.asm
@@ -0,0 +1,82 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD
License
+; which accompanies this distribution. The full text of the license may be
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permenent memory.
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; SecSwitchStack (
+; UINT32 TemporaryMemoryBase,
+; UINT32 PermanentMemoryBase
+; );
+;------------------------------------------------------------------------------
+SecSwitchStack PROC
+ ;
+ ; Save three register: eax, ebx, ecx
+ ;
+ push eax
+ push ebx
+ push ecx
+ push edx
+
+ ;
+ ; !!CAUTION!! this function address's is pushed into stack after
+ ; migration of whole temporary memory, so need save it to permanent
+ ; memory at first!
+ ;
+
+ mov ebx, [esp + 20] ; Save the first parameter
+ mov ecx, [esp + 24] ; Save the second parameter
+
+ ;
+ ; Save this function's return address into permanent memory at first.
+ ; Then, Fixup the esp point to permanent memory
+ ;
+ mov eax, esp
+ sub eax, ebx
+ add eax, ecx
+ mov edx, dword ptr [esp] ; copy pushed register's value to
permanent memory
+ mov dword ptr [eax], edx
+ mov edx, dword ptr [esp + 4]
+ mov dword ptr [eax + 4], edx
+ mov edx, dword ptr [esp + 8]
+ mov dword ptr [eax + 8], edx
+ mov edx, dword ptr [esp + 12]
+ mov dword ptr [eax + 12], edx
+ mov edx, dword ptr [esp + 16] ; Update this function's return address
into permanent memory
+ mov dword ptr [eax + 16], edx
+ mov esp, eax ; From now, esp is pointed to permanent
memory
+
+ ;
+ ; Fixup the ebp point to permanent memory
+ ;
+ mov eax, ebp
+ sub eax, ebx
+ add eax, ecx
+ mov ebp, eax ; From now, ebp is pointed to permanent
memory
+
+ pop edx
+ pop ecx
+ pop ebx
+ pop eax
+ ret
+SecSwitchStack ENDP
+
+ END
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/PlatformInit.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/PlatformInit.c
new file mode 100644
index 0000000..ba75e0f
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/PlatformInit.c
@@ -0,0 +1,45 @@
+/** @file
+ Sample to provide platform init function.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/SerialPortLib.h>
+
+/**
+ Platform initialization.
+
+ @param[in] FspHobList HobList produced by FSP.
+ @param[in] StartOfRange Start of temporary RAM.
+ @param[in] EndOfRange End of temporary RAM.
+**/
+VOID
+EFIAPI
+PlatformInit (
+ IN VOID *FspHobList,
+ IN VOID *StartOfRange,
+ IN VOID *EndOfRange
+ )
+{
+ //
+ // Platform initialization
+ // Enable Serial port here
+ //
+ SerialPortInitialize ();
+
+ DEBUG ((DEBUG_INFO, "PrintPeiCoreEntryPointParam in PlatformInit\n"));
+ DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
+ DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
+ DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
+}
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf
new file mode 100644
index 0000000..1348336
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWrapperPlatformSecLibSample.inf
@@ -0,0 +1,90 @@
+## @file
+# Sample to provide FSP wrapper platform sec related function.
+#
+# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php.
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SecFspWrapperPlatformSecLibSample
+ FILE_GUID = 4E1C4F95-90EA-47de-9ACC-B8920189A1F5
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = FspWrapperPlatformSecLib
+
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ FspWrapperPlatformSecLibSample.c
+ SecRamInitData.c
+ SecPlatformInformation.c
+ SecGetPerformance.c
+ SecTempRamDone.c
+ PlatformInit.c
+
+[Sources.IA32]
+ Ia32/SecEntry.asm
+ Ia32/PeiCoreEntry.asm
+ Ia32/Stack.asm
+ Ia32/Fsp.h
+ Ia32/SecEntry.S
+ Ia32/PeiCoreEntry.S
+ Ia32/Stack.S
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+ IntelFspPkg/IntelFspPkg.dec
+ IntelFspWrapperPkg/IntelFspWrapperPkg.dec
+
+[LibraryClasses]
+ LocalApicLib
+ SerialPortLib
+
+[Ppis]
+ gEfiSecPlatformInformationPpiGuid ## CONSUMES
+ gPeiSecPerformancePpiGuid ## CONSUMES
+ gTopOfTemporaryRamPpiGuid ## PRODUCES
+
+[Pcd]
+ gFspWrapperTokenSpaceGuid.PcdFsptBaseAddress ## CONSUMES
+ gFspWrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
+
+[FixedPcd]
+ gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
+ gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
+ gFspWrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## CONSUMES
+ gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
+ gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecGetPerformance.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecGetPerformance.c
new file mode 100644
index 0000000..e2d6b3d
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecGetPerformance.c
@@ -0,0 +1,90 @@
+/** @file
+ Sample to provide SecGetPerformance function.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Ppi/SecPerformance.h>
+#include <Ppi/TopOfTemporaryRam.h>
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/TimerLib.h>
+#include <Library/DebugLib.h>
+
+/**
+ This interface conveys performance information out of the Security (SEC)
phase into PEI.
+
+ This service is published by the SEC phase. The SEC phase handoff has an
optional
+ EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed
from SEC into the
+ PEI Foundation. As such, if the platform supports collecting performance
data in SEC,
+ this information is encapsulated into the data structure abstracted by this
service.
+ This information is collected for the boot-strap processor (BSP) on IA-32.
+
+ @param[in] PeiServices The pointer to the PEI Services Table.
+ @param[in] This The pointer to this instance of the
PEI_SEC_PERFORMANCE_PPI.
+ @param[out] Performance The pointer to performance data collected in SEC
phase.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+
+**/
+EFI_STATUS
+EFIAPI
+SecGetPerformance (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN PEI_SEC_PERFORMANCE_PPI *This,
+ OUT FIRMWARE_SEC_PERFORMANCE *Performance
+ )
+{
+ UINT32 Size;
+ UINT32 Count;
+ UINT32 TopOfTemporaryRam;
+ UINT64 Ticker;
+ VOID *TopOfTemporaryRamPpi;
+ EFI_STATUS Status;
+
+ DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
+
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gTopOfTemporaryRamPpiGuid,
+ 0,
+ NULL,
+ (VOID **) &TopOfTemporaryRamPpi
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // |--------------| <- TopOfTemporaryRam
+ // |Number of BSPs|
+ // |--------------|
+ // | BIST |
+ // |--------------|
+ // | .... |
+ // |--------------|
+ // | TSC[63:32] |
+ // |--------------|
+ // | TSC[31:00] |
+ // |--------------|
+ //
+ TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
+ TopOfTemporaryRam -= sizeof(UINT32) * 2;
+ Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof
(UINT32));
+ Size = Count * sizeof (UINT64);
+
+ Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size -
sizeof (UINT32) * 2);
+ Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
+
+ return EFI_SUCCESS;
+}
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecPlatformInformation.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecPlatformInformation.c
new file mode 100644
index 0000000..b879080
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecPlatformInformation.c
@@ -0,0 +1,84 @@
+/** @file
+ Sample to provide SecPlatformInformation function.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Ppi/SecPlatformInformation.h>
+#include <Ppi/TopOfTemporaryRam.h>
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+
+/**
+ This interface conveys state information out of the Security (SEC) phase
into PEI.
+
+ @param[in] PeiServices Pointer to the PEI Services Table.
+ @param[in,out] StructureSize Pointer to the variable describing
size of the input buffer.
+ @param[out] PlatformInformationRecord Pointer to the
EFI_SEC_PLATFORM_INFORMATION_RECORD.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
+
+**/
+EFI_STATUS
+EFIAPI
+SecPlatformInformation (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINT64 *StructureSize,
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
+ )
+{
+ UINT32 *Bist;
+ UINT32 Size;
+ UINT32 Count;
+ UINT32 TopOfTemporaryRam;
+ VOID *TopOfTemporaryRamPpi;
+ EFI_STATUS Status;
+
+ DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
+
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gTopOfTemporaryRamPpiGuid,
+ 0,
+ NULL,
+ (VOID **) &TopOfTemporaryRamPpi
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // The entries of BIST information, together with the number of them,
+ // reside in the bottom of stack, left untouched by normal stack operation.
+ // This routine copies the BIST information to the buffer pointed by
+ // PlatformInformationRecord for output.
+ //
+ TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
+ TopOfTemporaryRam -= sizeof(UINT32) * 2;
+ Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof
(UINT32)));
+ Size = Count * sizeof (IA32_HANDOFF_STATUS);
+
+ if ((*StructureSize) < (UINT64) Size) {
+ *StructureSize = Size;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ *StructureSize = Size;
+ Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
+
+ CopyMem (PlatformInformationRecord, Bist, Size);
+
+ return EFI_SUCCESS;
+}
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
new file mode 100644
index 0000000..6c93289
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
@@ -0,0 +1,45 @@
+/** @file
+ Sample to provide TempRamInitParams data.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/PcdLib.h>
+#include <FspApi.h>
+
+typedef struct {
+ UINT32 MicrocodeRegionBase;
+ UINT32 MicrocodeRegionSize;
+ UINT32 CodeRegionBase;
+ UINT32 CodeRegionSize;
+} FSPT_CORE_UPD;
+
+typedef struct {
+ FSP_UPD_HEADER FspUpdHeader;
+ FSPT_CORE_UPD FsptCoreUpd;
+} FSPT_UPD_CORE_DATA;
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
+ {
+ 0x4450555F54505346,
+ 0x00,
+ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ },
+ {
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32
(PcdFlashMicrocodeOffset)),
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32
(PcdFlashMicrocodeOffset)),
+ FixedPcdGet32 (PcdFlashCodeCacheAddress),
+ FixedPcdGet32 (PcdFlashCodeCacheSize),
+ }
+};
+
diff --git
a/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecTempRamDone.c
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecTempRamDone.c
new file mode 100644
index 0000000..76d2f42
--- /dev/null
+++
b/IntelFspWrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecTempRamDone.c
@@ -0,0 +1,52 @@
+/** @file
+ Sample to provide SecTemporaryRamDone function.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Ppi/TemporaryRamDone.h>
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugAgentLib.h>
+#include <Library/FspPlatformInfoLib.h>
+#include <Library/FspApiLib.h>
+
+/**
+This interface disables temporary memory in SEC Phase.
+**/
+VOID
+EFIAPI
+SecPlatformDisableTemporaryMemory (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ VOID *TempRamExitParam;
+ FSP_INFO_HEADER *FspHeader;
+
+ FspHeader = FspFindFspHeader (PcdGet32(PcdFspmBaseAddress));
+ if (FspHeader == NULL) {
+ return ;
+ }
+
+ DEBUG((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n"));
+
+ TempRamExitParam = GetTempRamExitParam ();
+ Status = CallTempRamExit (FspHeader, TempRamExitParam);
+ DEBUG((DEBUG_INFO, "TempRamExit status: 0x%x\n", Status));
+ ASSERT_EFI_ERROR(Status);
+
+ return ;
+}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c
deleted file mode 100644
index 6bf2e86..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/FspPlatformSecLibSample.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/** @file
- Sample to provide FSP wrapper platform sec related function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/SecPerformance.h>
-#include <Ppi/TemporaryRamSupport.h>
-
-#include <Library/LocalApicLib.h>
-
-/**
- This interface conveys state information out of the Security (SEC) phase
into PEI.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in,out] StructureSize Pointer to the variable describing
size of the input buffer.
- @param[out] PlatformInformationRecord Pointer to the
EFI_SEC_PLATFORM_INFORMATION_RECORD.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
- );
-
-/**
- This interface conveys performance information out of the Security (SEC)
phase into PEI.
-
- This service is published by the SEC phase. The SEC phase handoff has an
optional
- EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed
from SEC into the
- PEI Foundation. As such, if the platform supports collecting performance
data in SEC,
- this information is encapsulated into the data structure abstracted by this
service.
- This information is collected for the boot-strap processor (BSP) on IA-32.
-
- @param[in] PeiServices The pointer to the PEI Services Table.
- @param[in] This The pointer to this instance of the
PEI_SEC_PERFORMANCE_PPI.
- @param[out] Performance The pointer to performance data collected in SEC
phase.
-
- @retval EFI_SUCCESS The data was successfully returned.
-
-**/
-EFI_STATUS
-EFIAPI
-SecGetPerformance (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_SEC_PERFORMANCE_PPI *This,
- OUT FIRMWARE_SEC_PERFORMANCE *Performance
- );
-
-/**
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM
into
- permanent memory.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in] TemporaryMemoryBase Source Address in temporary memory from
which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] PermanentMemoryBase Destination Address in permanent memory
into which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] CopySize Amount of memory to migrate from temporary
to permanent memory.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize >
TemporaryMemoryBase when
- TemporaryMemoryBase > PermanentMemoryBase.
-
-**/
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
- IN UINTN CopySize
- );
-
-EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = {
- SecPlatformInformation
-};
-
-PEI_SEC_PERFORMANCE_PPI mSecPerformancePpi = {
- SecGetPerformance
-};
-
-EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
- SecTemporaryRamSupport
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformPpi[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gEfiSecPlatformInformationPpiGuid,
- &mSecPlatformInformationPpi
- },
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gPeiSecPerformancePpiGuid,
- &mSecPerformancePpi
- },
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
- &gEfiTemporaryRamSupportPpiGuid,
- &gSecTemporaryRamSupportPpi
- },
-};
-
-/**
- A developer supplied function to perform platform specific operations.
-
- It's a developer supplied function to perform any operations appropriate to a
- given platform. It's invoked just before passing control to PEI core by SEC
- core. Platform developer may modify the SecCoreData passed to PEI Core.
- It returns a platform specific PPI list that platform wishes to pass to PEI
core.
- The Generic SEC core module will merge this list to join the final list
passed to
- PEI core.
-
- @param[in,out] SecCoreData The same parameter as passing to PEI
core. It
- could be overridden by this function.
-
- @return The platform specific PPI list to be passed to PEI core or
- NULL if there is no need of such platform specific PPI list.
-
-**/
-EFI_PEI_PPI_DESCRIPTOR *
-EFIAPI
-SecPlatformMain (
- IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
- )
-{
- EFI_PEI_PPI_DESCRIPTOR *PpiList;
-
- InitializeApicTimer (0, (UINT32) -1, TRUE, 5);
-
- PpiList = &mPeiSecPlatformPpi[0];
-
- return PpiList;
-}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S
deleted file mode 100644
index 3838cc8..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.S
+++ /dev/null
@@ -1,43 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD
License
-# which accompanies this distribution. The full text of the license may be
found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# AsmSaveSecContext.S
-#
-# Abstract:
-#
-# Save Sec Conext before call FspInit API
-#
-#------------------------------------------------------------------------------
-
-#----------------------------------------------------------------------------
-# MMX Usage:
-# MM0 = BIST State
-# MM5 = Save time-stamp counter value high32bit
-# MM6 = Save time-stamp counter value low32bit.
-#
-# It should be same as SecEntry.asm and PeiCoreEntry.asm.
-#----------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(AsmSaveBistValue)
-ASM_PFX(AsmSaveBistValue):
- movl 4(%esp), %eax
- movd %eax, %mm0
- ret
-
-ASM_GLOBAL ASM_PFX(AsmSaveTickerValue)
-ASM_PFX(AsmSaveTickerValue):
- movl 4(%esp), %eax
- movd %eax, %mm6
- movl 8(%esp), %eax
- movd %eax, %mm5
- ret
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm
deleted file mode 100644
index bb147a9..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/AsmSaveSecContext.asm
+++ /dev/null
@@ -1,50 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD
License
-; which accompanies this distribution. The full text of the license may be
found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; AsmSaveSecContext.asm
-;
-; Abstract:
-;
-; Save Sec Conext before call FspInit API
-;
-;------------------------------------------------------------------------------
-
-.686p
-.xmm
-.model flat,c
-.code
-
-;----------------------------------------------------------------------------
-; MMX Usage:
-; MM0 = BIST State
-; MM5 = Save time-stamp counter value high32bit
-; MM6 = Save time-stamp counter value low32bit.
-;
-; It should be same as SecEntry.asm and PeiCoreEntry.asm.
-;----------------------------------------------------------------------------
-
-AsmSaveBistValue PROC PUBLIC
- mov eax, [esp+4]
- movd mm0, eax
- ret
-AsmSaveBistValue ENDP
-
-AsmSaveTickerValue PROC PUBLIC
- mov eax, [esp+4]
- movd mm6, eax
- mov eax, [esp+8]
- movd mm5, eax
- ret
-AsmSaveTickerValue ENDP
-
-END
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h
deleted file mode 100644
index e145b4e..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Fsp.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/** @file
- Fsp related definitions
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __FSP_H__
-#define __FSP_H__
-
-//
-// Fv Header
-//
-#define FVH_SIGINATURE_OFFSET 0x28
-#define FVH_SIGINATURE_VALID_VALUE 0x4856465F // valid signature:_FVH
-#define FVH_HEADER_LENGTH_OFFSET 0x30
-#define FVH_EXTHEADER_OFFSET_OFFSET 0x34
-#define FVH_EXTHEADER_SIZE_OFFSET 0x10
-
-//
-// Ffs Header
-//
-#define FSP_HEADER_GUID_DWORD1 0x912740BE
-#define FSP_HEADER_GUID_DWORD2 0x47342284
-#define FSP_HEADER_GUID_DWORD3 0xB08471B9
-#define FSP_HEADER_GUID_DWORD4 0x0C3F3527
-#define FFS_HEADER_SIZE_VALUE 0x18
-
-//
-// Section Header
-//
-#define SECTION_HEADER_TYPE_OFFSET 0x03
-#define RAW_SECTION_HEADER_SIZE_VALUE 0x04
-
-//
-// Fsp Header
-//
-#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C
-#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30
-
-#endif
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S
deleted file mode 100644
index c35f02b..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.S
+++ /dev/null
@@ -1,130 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD
License
-# which accompanies this distribution. The full text of the license may be
found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# PeiCoreEntry.S
-#
-# Abstract:
-#
-# Find and call SecStartup
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl 0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl 0x8(%esp), %ecx
- movl 0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl %edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl %esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl $1, %eax
- cpuid
- shr $16, %ebx
- andl $0x000000FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- # for all processor threads
- #
- xorl %ecx, %ecx
- movb %bl, %cl
-PushBist:
- movd %mm0, %eax
- pushl %eax
- loop PushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl $0xFFFFFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl $0xFFFFFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl -4(%ebp), %ecx
- movl -8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl %ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm
deleted file mode 100644
index cd1c7b8..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/PeiCoreEntry.asm
+++ /dev/null
@@ -1,140 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD
License
-; which accompanies this distribution. The full text of the license may be
found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; PeiCoreEntry.asm
-;
-; Abstract:
-;
-; Find and call SecStartup
-;
-;------------------------------------------------------------------------------
-
-.686p
-.xmm
-.model flat, c
-.code
-
-EXTRN SecStartup:NEAR
-EXTRN PlatformInit:NEAR
-
-CallPeiCoreEntryPoint PROC PUBLIC
- ;
- ; Obtain the hob list pointer
- ;
- mov eax, [esp+4]
- ;
- ; Obtain the stack information
- ; ECX: start of range
- ; EDX: end of range
- ;
- mov ecx, [esp+8]
- mov edx, [esp+0Ch]
-
- ;
- ; Platform init
- ;
- pushad
- push edx
- push ecx
- push eax
- call PlatformInit
- pop eax
- pop eax
- pop eax
- popad
-
- ;
- ; Set stack top pointer
- ;
- mov esp, edx
-
- ;
- ; Push the hob list pointer
- ;
- push eax
-
- ;
- ; Save the value
- ; ECX: start of range
- ; EDX: end of range
- ;
- mov ebp, esp
- push ecx
- push edx
-
- ;
- ; Push processor count to stack first, then BIST status (AP then BSP)
- ;
- mov eax, 1
- cpuid
- shr ebx, 16
- and ebx, 0000000FFh
- cmp bl, 1
- jae PushProcessorCount
-
- ;
- ; Some processors report 0 logical processors. Effectively 0 = 1.
- ; So we fix up the processor count
- ;
- inc ebx
-
-PushProcessorCount:
- push ebx
-
- ;
- ; We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- ; for all processor threads
- ;
- xor ecx, ecx
- mov cl, bl
-PushBist:
- movd eax, mm0
- push eax
- loop PushBist
-
- ; Save Time-Stamp Counter
- movd eax, mm5
- push eax
-
- movd eax, mm6
- push eax
-
- ;
- ; Pass entry point of the PEI core
- ;
- mov edi, 0FFFFFFE0h
- push DWORD PTR ds:[edi]
-
- ;
- ; Pass BFV into the PEI Core
- ;
- mov edi, 0FFFFFFFCh
- push DWORD PTR ds:[edi]
-
- ;
- ; Pass stack size into the PEI Core
- ;
- mov ecx, [ebp - 4]
- mov edx, [ebp - 8]
- push ecx ; RamBase
-
- sub edx, ecx
- push edx ; RamSize
-
- ;
- ; Pass Control into the PEI Core
- ;
- call SecStartup
-CallPeiCoreEntryPoint ENDP
-
-END
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
deleted file mode 100644
index c0b84e0..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
+++ /dev/null
@@ -1,338 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD
License
-# which accompanies this distribution. The full text of the license may be
found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# SecEntry.S
-#
-# Abstract:
-#
-# This is the code that goes from real-mode to protected mode.
-# It consumes the reset vector, calls TempRamInit API from FSP binary.
-#
-#------------------------------------------------------------------------------
-
-#include "Fsp.h"
-
-ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)
-ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)
-
-ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
-ASM_PFX(_TEXT_REALMODE):
-#----------------------------------------------------------------------------
-#
-# Procedure: _ModuleEntryPoint
-#
-# Input: None
-#
-# Output: None
-#
-# Destroys: Assume all registers
-#
-# Description:
-#
-# Transition to non-paged flat-model protected mode from a
-# hard-coded GDT that provides exactly two descriptors.
-# This is a bare bones transition to protected mode only
-# used for a while in PEI and possibly DXE.
-#
-# After enabling protected mode, a far jump is executed to
-# transfer to PEI using the newly loaded GDT.
-#
-# Return: None
-#
-# MMX Usage:
-# MM0 = BIST State
-# MM5 = Save time-stamp counter value high32bit
-# MM6 = Save time-stamp counter value low32bit.
-#
-#----------------------------------------------------------------------------
-
-.align 4
-ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
-ASM_PFX(_ModuleEntryPoint):
- fninit # clear any pending Floating point
exceptions
- #
- # Store the BIST value in mm0
- #
- movd %eax, %mm0
-
- #
- # Save time-stamp counter value
- # rdtsc load 64bit time-stamp counter to EDX:EAX
- #
- rdtsc
- movd %edx, %mm5
- movd %ecx, %mm6
-
- #
- # Load the GDT table in GdtDesc
- #
- movl $GdtDesc, %esi
- .byte 0x66
- lgdt %cs:(%si)
-
- #
- # Transition to 16 bit protected mode
- #
- movl %cr0, %eax # Get control register 0
- orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
- movl %eax, %cr0 # Activate protected mode
-
- movl %cr4, %eax # Get control register 4
- orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT
bit (bit #10)
- movl %eax, %cr4
-
- #
- # Now we're in 16 bit protected mode
- # Set up the selectors for 32 bit protected mode entry
- #
- movw SYS_DATA_SEL, %ax
- movw %ax, %ds
- movw %ax, %es
- movw %ax, %fs
- movw %ax, %gs
- movw %ax, %ss
-
- #
- # Transition to Flat 32 bit protected mode
- # The jump to a far pointer causes the transition to 32 bit mode
- #
- movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
- jmp *%cs:(%si)
-
-ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
-ASM_PFX(_TEXT_PROTECTED_MODE):
-
-#----------------------------------------------------------------------------
-#
-# Procedure: ProtectedModeEntryPoint
-#
-# Input: None
-#
-# Output: None
-#
-# Destroys: Assume all registers
-#
-# Description:
-#
-# This function handles:
-# Call two basic APIs from FSP binary
-# Initializes stack with some early data (BIST, PEI entry, etc)
-#
-# Return: None
-#
-#----------------------------------------------------------------------------
-
-.align 4
-ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
-ASM_PFX(ProtectedModeEntryPoint):
-
- # Find the fsp info header
- movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi
- movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx
-
- movl FVH_SIGINATURE_OFFSET(%edi), %eax
- cmp $FVH_SIGINATURE_VALID_VALUE, %eax
- jnz FspHeaderNotFound
-
- xorl %eax, %eax
- movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
- cmp %ax, 0
- jnz FspFvExtHeaderExist
-
- xorl %eax, %eax
- movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
- addl %eax, %edi
- jmp FspCheckFfsHeader
-
-FspFvExtHeaderExist:
- addl %eax, %edi
- movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
- addl %eax, %edi
-
- # Round up to 8 byte alignment
- movl %edi, %eax
- andb $0x07, %al
- jz FspCheckFfsHeader
-
- and $0xFFFFFFF8, %edi
- add $0x08, %edi
-
-FspCheckFfsHeader:
- # Check the ffs guid
- movl (%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD1, %eax
- jnz FspHeaderNotFound
-
- movl 0x4(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD2, %eax
- jnz FspHeaderNotFound
-
- movl 0x08(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD3, %eax
- jnz FspHeaderNotFound
-
- movl 0x0c(%edi), %eax
- cmp $FSP_HEADER_GUID_DWORD4, %eax
- jnz FspHeaderNotFound
-
- add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
-
- # Check the section type as raw section
- movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
- cmp $0x19, %al
- jnz FspHeaderNotFound
-
- addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
- jmp FspHeaderFound
-
-FspHeaderNotFound:
- jmp .
-
-FspHeaderFound:
- # Get the fsp TempRamInit Api address
- movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
- addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
-
- # Setup the hardcode stack
- movl $TempRamInitStack, %esp
-
- # Call the fsp TempRamInit Api
- jmp *%eax
-
-TempRamInitDone:
- cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for
Microcode Update not found.
- je CallSecFspInit #If microcode not found, don't hang, but continue.
-
- cmp $0x0, %eax
- jnz FspApiFailed
-
- # ECX: start of range
- # EDX: end of range
-CallSecFspInit:
- xorl %eax, %eax
- movl %edx, %esp
-
- # Align the stack at DWORD
- addl $3, %esp
- andl $0xFFFFFFFC, %esp
-
- pushl %edx
- pushl %ecx
- pushl %eax # zero - no hob list yet
- call ASM_PFX(CallPeiCoreEntryPoint)
-
-FspApiFailed:
- jmp .
-
-.align 0x10
-TempRamInitStack:
- .long TempRamInitDone
- .long ASM_PFX(TempRamInitParams)
-
-#
-# ROM-based Global-Descriptor Table for the Tiano PEI Phase
-#
-.align 16
-
-#
-# GDT[0]: 0x00: Null entry, never used.
-#
-.equ NULL_SEL, . - GDT_BASE # Selector [0]
-GDT_BASE:
-BootGdtTable: .long 0
- .long 0
-#
-# Linear data segment descriptor
-#
-.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x92 # present, ring 0, data, expand-up,
writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# Linear code segment descriptor
-#
-.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x9B # present, ring 0, data, expand-up,
not-writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# System data segment descriptor
-#
-.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x93 # present, ring 0, data, expand-up,
not-writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-
-#
-# System code segment descriptor
-#
-.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x9A # present, ring 0, data, expand-up,
writable
- .byte 0xCF # page-granular, 32-bit
- .byte 0
-#
-# Spare segment descriptor
-#
-.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
- .word 0xFFFF # limit 0xFFFFF
- .word 0 # base 0
- .byte 0x0E # Changed from F000 to E000.
- .byte 0x9B # present, ring 0, code, expand-up,
writable
- .byte 0x00 # byte-granular, 16-bit
- .byte 0
-#
-# Spare segment descriptor
-#
-.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
- .word 0xFFFF # limit 0xFFFF
- .word 0 # base 0
- .byte 0
- .byte 0x93 # present, ring 0, data, expand-up,
not-writable
- .byte 0x00 # byte-granular, 16-bit
- .byte 0
-
-#
-# Spare segment descriptor
-#
-.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
- .word 0 # limit 0
- .word 0 # base 0
- .byte 0
- .byte 0 # present, ring 0, data, expand-up,
writable
- .byte 0 # page-granular, 32-bit
- .byte 0
-.equ GDT_SIZE, . - BootGdtTable # Size, in bytes
-
-#
-# GDT Descriptor
-#
-GdtDesc: # GDT descriptor
- .word GDT_SIZE - 1 # GDT limit
- .long BootGdtTable # GDT base address
-
-ASM_PFX(ProtectedModeEntryLinearAddress):
-ProtectedModeEntryLinearOffset:
- .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
- .word LINEAR_CODE_SEL
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
deleted file mode 100644
index 3c2e43a..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
+++ /dev/null
@@ -1,355 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD
License
-; which accompanies this distribution. The full text of the license may be
found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; SecEntry.asm
-;
-; Abstract:
-;
-; This is the code that goes from real-mode to protected mode.
-; It consumes the reset vector, calls TempRamInit API from FSP binary.
-;
-;------------------------------------------------------------------------------
-
-#include "Fsp.h"
-
-.686p
-.xmm
-.model small, c
-
-EXTRN CallPeiCoreEntryPoint:NEAR
-EXTRN TempRamInitParams:FAR
-
-; Pcds
-EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD
-EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD
-
-_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
- ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
-
-;----------------------------------------------------------------------------
-;
-; Procedure: _ModuleEntryPoint
-;
-; Input: None
-;
-; Output: None
-;
-; Destroys: Assume all registers
-;
-; Description:
-;
-; Transition to non-paged flat-model protected mode from a
-; hard-coded GDT that provides exactly two descriptors.
-; This is a bare bones transition to protected mode only
-; used for a while in PEI and possibly DXE.
-;
-; After enabling protected mode, a far jump is executed to
-; transfer to PEI using the newly loaded GDT.
-;
-; Return: None
-;
-; MMX Usage:
-; MM0 = BIST State
-; MM5 = Save time-stamp counter value high32bit
-; MM6 = Save time-stamp counter value low32bit.
-;
-;----------------------------------------------------------------------------
-
-align 4
-_ModuleEntryPoint PROC NEAR C PUBLIC
- fninit ; clear any pending Floating point
exceptions
- ;
- ; Store the BIST value in mm0
- ;
- movd mm0, eax
-
- ;
- ; Save time-stamp counter value
- ; rdtsc load 64bit time-stamp counter to EDX:EAX
- ;
- rdtsc
- movd mm5, edx
- movd mm6, eax
-
- ;
- ; Load the GDT table in GdtDesc
- ;
- mov esi, OFFSET GdtDesc
- DB 66h
- lgdt fword ptr cs:[si]
-
- ;
- ; Transition to 16 bit protected mode
- ;
- mov eax, cr0 ; Get control register 0
- or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)
- mov cr0, eax ; Activate protected mode
-
- mov eax, cr4 ; Get control register 4
- or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT
bit (bit #10)
- mov cr4, eax
-
- ;
- ; Now we're in 16 bit protected mode
- ; Set up the selectors for 32 bit protected mode entry
- ;
- mov ax, SYS_DATA_SEL
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- ;
- ; Transition to Flat 32 bit protected mode
- ; The jump to a far pointer causes the transition to 32 bit mode
- ;
- mov esi, offset ProtectedModeEntryLinearAddress
- jmp fword ptr cs:[si]
-
-_ModuleEntryPoint ENDP
-_TEXT_REALMODE ENDS
-
-_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'
- ASSUME CS:_TEXT_PROTECTED_MODE,
DS:_TEXT_PROTECTED_MODE
-
-;----------------------------------------------------------------------------
-;
-; Procedure: ProtectedModeEntryPoint
-;
-; Input: None
-;
-; Output: None
-;
-; Destroys: Assume all registers
-;
-; Description:
-;
-; This function handles:
-; Call two basic APIs from FSP binary
-; Initializes stack with some early data (BIST, PEI entry, etc)
-;
-; Return: None
-;
-;----------------------------------------------------------------------------
-
-align 4
-ProtectedModeEntryPoint PROC NEAR PUBLIC
-
- ; Find the fsp info header
- mov edi, PcdGet32 (PcdFlashFvFspBase)
- mov ecx, PcdGet32 (PcdFlashFvFspSize)
-
- mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
- cmp eax, FVH_SIGINATURE_VALID_VALUE
- jnz FspHeaderNotFound
-
- xor eax, eax
- mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
- cmp ax, 0
- jnz FspFvExtHeaderExist
-
- xor eax, eax
- mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
- add edi, eax
- jmp FspCheckFfsHeader
-
-FspFvExtHeaderExist:
- add edi, eax
- mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
- add edi, eax
-
- ; Round up to 8 byte alignment
- mov eax, edi
- and al, 07h
- jz FspCheckFfsHeader
-
- and edi, 0FFFFFFF8h
- add edi, 08h
-
-FspCheckFfsHeader:
- ; Check the ffs guid
- mov eax, dword ptr [edi]
- cmp eax, FSP_HEADER_GUID_DWORD1
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 4]
- cmp eax, FSP_HEADER_GUID_DWORD2
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 8]
- cmp eax, FSP_HEADER_GUID_DWORD3
- jnz FspHeaderNotFound
-
- mov eax, dword ptr [edi + 0Ch]
- cmp eax, FSP_HEADER_GUID_DWORD4
- jnz FspHeaderNotFound
-
- add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
-
- ; Check the section type as raw section
- mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
- cmp al, 019h
- jnz FspHeaderNotFound
-
- add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
- jmp FspHeaderFound
-
-FspHeaderNotFound:
- jmp $
-
-FspHeaderFound:
- ; Get the fsp TempRamInit Api address
- mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
- add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
-
- ; Setup the hardcode stack
- mov esp, OFFSET TempRamInitStack
-
- ; Call the fsp TempRamInit Api
- jmp eax
-
-TempRamInitDone:
- cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for
Microcode Update not found.
- je CallSecFspInit ;If microcode not found, don't hang, but continue.
-
- cmp eax, 0 ;Check if EFI_SUCCESS retuned.
- jnz FspApiFailed
-
- ; ECX: start of range
- ; EDX: end of range
-CallSecFspInit:
- xor eax, eax
- mov esp, edx
-
- ; Align the stack at DWORD
- add esp, 3
- and esp, 0FFFFFFFCh
-
- push edx
- push ecx
- push eax ; zero - no hob list yet
- call CallPeiCoreEntryPoint
-
-FspApiFailed:
- jmp $
-
-align 10h
-TempRamInitStack:
- DD OFFSET TempRamInitDone
- DD OFFSET TempRamInitParams
-
-ProtectedModeEntryPoint ENDP
-
-;
-; ROM-based Global-Descriptor Table for the Tiano PEI Phase
-;
-align 16
-PUBLIC BootGdtTable
-
-;
-; GDT[0]: 0x00: Null entry, never used.
-;
-NULL_SEL EQU $ - GDT_BASE ; Selector [0]
-GDT_BASE:
-BootGdtTable DD 0
- DD 0
-;
-; Linear data segment descriptor
-;
-LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 092h ; present, ring 0, data, expand-up,
writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; Linear code segment descriptor
-;
-LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 09Bh ; present, ring 0, data, expand-up,
not-writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; System data segment descriptor
-;
-SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 093h ; present, ring 0, data, expand-up,
not-writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-
-;
-; System code segment descriptor
-;
-SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0
- DB 09Ah ; present, ring 0, data, expand-up,
writable
- DB 0CFh ; page-granular, 32-bit
- DB 0
-;
-; Spare segment descriptor
-;
-SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]
- DW 0FFFFh ; limit 0xFFFFF
- DW 0 ; base 0
- DB 0Eh ; Changed from F000 to E000.
- DB 09Bh ; present, ring 0, code, expand-up,
writable
- DB 00h ; byte-granular, 16-bit
- DB 0
-;
-; Spare segment descriptor
-;
-SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]
- DW 0FFFFh ; limit 0xFFFF
- DW 0 ; base 0
- DB 0
- DB 093h ; present, ring 0, data, expand-up,
not-writable
- DB 00h ; byte-granular, 16-bit
- DB 0
-
-;
-; Spare segment descriptor
-;
-SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]
- DW 0 ; limit 0
- DW 0 ; base 0
- DB 0
- DB 0 ; present, ring 0, data, expand-up,
writable
- DB 0 ; page-granular, 32-bit
- DB 0
-GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes
-
-;
-; GDT Descriptor
-;
-GdtDesc: ; GDT descriptor
- DW GDT_SIZE - 1 ; GDT limit
- DD OFFSET BootGdtTable ; GDT base address
-
-
-ProtectedModeEntryLinearAddress LABEL FWORD
-ProtectedModeEntryLinearOffset LABEL DWORD
- DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code
- DW LINEAR_CODE_SEL
-
-_TEXT_PROTECTED_MODE ENDS
-END
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S
deleted file mode 100644
index 950b3a1..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.S
+++ /dev/null
@@ -1,77 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD
License
-# which accompanies this distribution. The full text of the license may be
found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Abstract:
-#
-# Switch the stack from temporary memory to permenent memory.
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# SecSwitchStack (
-# UINT32 TemporaryMemoryBase,
-# UINT32 PermenentMemoryBase
-# )#
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX (SecSwitchStack)
-ASM_PFX(SecSwitchStack):
- #
- # Save standard registers so they can be used to change stack
- #
- pushl %eax
- pushl %ebx
- pushl %ecx
- pushl %edx
-
- #
- # !!CAUTION!! this function address's is pushed into stack after
- # migration of whole temporary memory, so need save it to permenent
- # memory at first!
- #
- movl 20(%esp), %ebx # Save the first parameter
- movl 24(%esp), %ecx # Save the second parameter
-
- #
- # Save this function's return address into permenent memory at first.
- # Then, Fixup the esp point to permenent memory
- #
- movl %esp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl 0(%esp), %edx # copy pushed register's value to permenent
memory
- movl %edx, 0(%eax)
- movl 4(%esp), %edx
- movl %edx, 4(%eax)
- movl 8(%esp), %edx
- movl %edx, 8(%eax)
- movl 12(%esp), %edx
- movl %edx, 12(%eax)
- movl 16(%esp), %edx # Update this function's return address into
permenent memory
- movl %edx, 16(%eax)
- movl %eax, %esp # From now, esp is pointed to permenent memory
-
- #
- # Fixup the ebp point to permenent memory
- #
- movl %ebp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl %eax, %ebp # From now, ebp is pointed to permenent memory
-
- popl %edx
- popl %ecx
- popl %ebx
- popl %eax
- ret
-
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm
deleted file mode 100644
index f96a55f..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/Stack.asm
+++ /dev/null
@@ -1,82 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD
License
-; which accompanies this distribution. The full text of the license may be
found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Abstract:
-;
-; Switch the stack from temporary memory to permenent memory.
-;
-;------------------------------------------------------------------------------
-
- .586p
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; SecSwitchStack (
-; UINT32 TemporaryMemoryBase,
-; UINT32 PermenentMemoryBase
-; );
-;------------------------------------------------------------------------------
-SecSwitchStack PROC
- ;
- ; Save three register: eax, ebx, ecx
- ;
- push eax
- push ebx
- push ecx
- push edx
-
- ;
- ; !!CAUTION!! this function address's is pushed into stack after
- ; migration of whole temporary memory, so need save it to permenent
- ; memory at first!
- ;
-
- mov ebx, [esp + 20] ; Save the first parameter
- mov ecx, [esp + 24] ; Save the second parameter
-
- ;
- ; Save this function's return address into permenent memory at first.
- ; Then, Fixup the esp point to permenent memory
- ;
- mov eax, esp
- sub eax, ebx
- add eax, ecx
- mov edx, dword ptr [esp] ; copy pushed register's value to
permenent memory
- mov dword ptr [eax], edx
- mov edx, dword ptr [esp + 4]
- mov dword ptr [eax + 4], edx
- mov edx, dword ptr [esp + 8]
- mov dword ptr [eax + 8], edx
- mov edx, dword ptr [esp + 12]
- mov dword ptr [eax + 12], edx
- mov edx, dword ptr [esp + 16] ; Update this function's return address
into permenent memory
- mov dword ptr [eax + 16], edx
- mov esp, eax ; From now, esp is pointed to permenent
memory
-
- ;
- ; Fixup the ebp point to permenent memory
- ;
- mov eax, ebp
- sub eax, ebx
- add eax, ecx
- mov ebp, eax ; From now, ebp is pointed to permenent
memory
-
- pop edx
- pop ecx
- pop ebx
- pop eax
- ret
-SecSwitchStack ENDP
-
- END
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c
deleted file mode 100644
index e8b7166..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/PlatformInit.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/** @file
- Sample to provide platform init function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiPei.h>
-#include <Library/DebugLib.h>
-
-/**
- Platform initialization.
-
- @param[in] FspHobList HobList produced by FSP.
- @param[in] StartOfRange Start of temporary RAM.
- @param[in] EndOfRange End of temporary RAM.
-**/
-VOID
-EFIAPI
-PlatformInit (
- IN VOID *FspHobList,
- IN VOID *StartOfRange,
- IN VOID *EndOfRange
- )
-{
- //
- // Platform initialization
- // Enable Serial port here
- //
-
- DEBUG ((DEBUG_INFO, "PrintPeiCoreEntryPointParam\n"));
- DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
- DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
- DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
-}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c
deleted file mode 100644
index 3d37441..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SaveSecContext.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/** @file
- Sample to provide SaveSecContext function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiPei.h>
-#include <Library/DebugLib.h>
-
-#include <Ppi/TopOfTemporaryRam.h>
-#include <Ppi/SecPlatformInformation.h>
-
-/**
- Save BIST value before call FspInit.
-
- @param[in] Bist BIST value.
-**/
-VOID
-AsmSaveBistValue (
- IN UINT32 Bist
- );
-
-/**
- Save Ticker value before call FspInit.
-
- @param[in] Ticker Ticker value.
-**/
-VOID
-AsmSaveTickerValue (
- IN UINT64 Ticker
- );
-
-/**
- Save SEC context before call FspInit.
-
- @param[in] PeiServices Pointer to PEI Services Table.
-**/
-VOID
-EFIAPI
-SaveSecContext (
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- UINT32 *Bist;
- UINT64 *Ticker;
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SaveSecContext - 0x%x\n", PeiServices));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return ;
- }
-
- DEBUG ((DEBUG_INFO, "TopOfTemporaryRamPpi - 0x%x\n", TopOfTemporaryRamPpi));
-
- //
- // The entries of BIST information, together with the number of them,
- // reside in the bottom of stack, left untouched by normal stack operation.
- // This routine copies the BIST information to the buffer pointed by
- // PlatformInformationRecord for output.
- //
- // |--------------| <- TopOfTemporaryRam
- // |Number of BSPs|
- // |--------------|
- // | BIST |
- // |--------------|
- // | .... |
- // |--------------|
- // | TSC[63:32] |
- // |--------------|
- // | TSC[31:00] |
- // |--------------|
- //
-
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- DEBUG ((DEBUG_INFO, "TopOfTemporaryRam - 0x%x\n", TopOfTemporaryRam));
- Count = *(UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32));
- DEBUG ((DEBUG_INFO, "Count - 0x%x\n", Count));
- Size = Count * sizeof (IA32_HANDOFF_STATUS);
- DEBUG ((DEBUG_INFO, "Size - 0x%x\n", Size));
-
- Bist = (UINT32 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size);
- DEBUG ((DEBUG_INFO, "Bist - 0x%x\n", *Bist));
- Ticker = (UINT64 *)(UINTN)(TopOfTemporaryRam - sizeof(UINT32) - Size -
sizeof(UINT64));
- DEBUG ((DEBUG_INFO, "Ticker - 0x%lx\n", *Ticker));
-
- // Just need record BSP
- AsmSaveBistValue (*Bist);
- AsmSaveTickerValue (*Ticker);
-}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c
deleted file mode 100644
index e2d6b3d..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecGetPerformance.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/** @file
- Sample to provide SecGetPerformance function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Ppi/SecPerformance.h>
-#include <Ppi/TopOfTemporaryRam.h>
-
-#include <Library/BaseMemoryLib.h>
-#include <Library/TimerLib.h>
-#include <Library/DebugLib.h>
-
-/**
- This interface conveys performance information out of the Security (SEC)
phase into PEI.
-
- This service is published by the SEC phase. The SEC phase handoff has an
optional
- EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed
from SEC into the
- PEI Foundation. As such, if the platform supports collecting performance
data in SEC,
- this information is encapsulated into the data structure abstracted by this
service.
- This information is collected for the boot-strap processor (BSP) on IA-32.
-
- @param[in] PeiServices The pointer to the PEI Services Table.
- @param[in] This The pointer to this instance of the
PEI_SEC_PERFORMANCE_PPI.
- @param[out] Performance The pointer to performance data collected in SEC
phase.
-
- @retval EFI_SUCCESS The data was successfully returned.
-
-**/
-EFI_STATUS
-EFIAPI
-SecGetPerformance (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_SEC_PERFORMANCE_PPI *This,
- OUT FIRMWARE_SEC_PERFORMANCE *Performance
- )
-{
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- UINT64 Ticker;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SecGetPerformance\n"));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return EFI_NOT_FOUND;
- }
-
- //
- // |--------------| <- TopOfTemporaryRam
- // |Number of BSPs|
- // |--------------|
- // | BIST |
- // |--------------|
- // | .... |
- // |--------------|
- // | TSC[63:32] |
- // |--------------|
- // | TSC[31:00] |
- // |--------------|
- //
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof(UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- Count = *(UINT32 *) (UINTN) (TopOfTemporaryRam - sizeof
(UINT32));
- Size = Count * sizeof (UINT64);
-
- Ticker = *(UINT64 *) (UINTN) (TopOfTemporaryRam - sizeof (UINT32) - Size -
sizeof (UINT32) * 2);
- Performance->ResetEnd = GetTimeInNanoSecond (Ticker);
-
- return EFI_SUCCESS;
-}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
deleted file mode 100644
index df82c64..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
+++ /dev/null
@@ -1,93 +0,0 @@
-## @file
-# Sample to provide FSP wrapper platform sec related function.
-#
-# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD
License
-# which accompanies this distribution. The full text of the license may be
found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
-#
-##
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SecPeiFspPlatformSecLibSample
- FILE_GUID = 4E1C4F95-90EA-47de-9ACC-B8920189A1F5
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
- LIBRARY_CLASS = FspPlatformSecLib
-
-
-#
-# The following information is for reference only and not required by the
build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-################################################################################
-#
-# Sources Section - list of files that are required for the build to succeed.
-#
-################################################################################
-
-[Sources]
- FspPlatformSecLibSample.c
- SecRamInitData.c
- SaveSecContext.c
- SecPlatformInformation.c
- SecGetPerformance.c
- SecTempRamSupport.c
- PlatformInit.c
-
-[Sources.IA32]
- Ia32/SecEntry.asm
- Ia32/PeiCoreEntry.asm
- Ia32/AsmSaveSecContext.asm
- Ia32/Stack.asm
- Ia32/Fsp.h
- Ia32/SecEntry.S
- Ia32/PeiCoreEntry.S
- Ia32/AsmSaveSecContext.S
- Ia32/Stack.S
-
-################################################################################
-#
-# Package Dependency Section - list of Package files that are required for
-# this module.
-#
-################################################################################
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
- IntelFspPkg/IntelFspPkg.dec
- IntelFspWrapperPkg/IntelFspWrapperPkg.dec
-
-[LibraryClasses]
- LocalApicLib
-
-[Ppis]
- gEfiSecPlatformInformationPpiGuid ## CONSUMES
- gPeiSecPerformancePpiGuid ## CONSUMES
- gEfiTemporaryRamSupportPpiGuid ## CONSUMES
-
-[Pcd]
- gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize ## CONSUMES
-
-[FixedPcd]
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## CONSUMES
- gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## CONSUMES
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c
deleted file mode 100644
index b879080..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPlatformInformation.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/** @file
- Sample to provide SecPlatformInformation function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/TopOfTemporaryRam.h>
-
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-
-/**
- This interface conveys state information out of the Security (SEC) phase
into PEI.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in,out] StructureSize Pointer to the variable describing
size of the input buffer.
- @param[out] PlatformInformationRecord Pointer to the
EFI_SEC_PLATFORM_INFORMATION_RECORD.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
- )
-{
- UINT32 *Bist;
- UINT32 Size;
- UINT32 Count;
- UINT32 TopOfTemporaryRam;
- VOID *TopOfTemporaryRamPpi;
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
-
- Status = (*PeiServices)->LocatePpi (
- PeiServices,
- &gTopOfTemporaryRamPpiGuid,
- 0,
- NULL,
- (VOID **) &TopOfTemporaryRamPpi
- );
- if (EFI_ERROR (Status)) {
- return EFI_NOT_FOUND;
- }
-
- //
- // The entries of BIST information, together with the number of them,
- // reside in the bottom of stack, left untouched by normal stack operation.
- // This routine copies the BIST information to the buffer pointed by
- // PlatformInformationRecord for output.
- //
- TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
- TopOfTemporaryRam -= sizeof(UINT32) * 2;
- Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof
(UINT32)));
- Size = Count * sizeof (IA32_HANDOFF_STATUS);
-
- if ((*StructureSize) < (UINT64) Size) {
- *StructureSize = Size;
- return EFI_BUFFER_TOO_SMALL;
- }
-
- *StructureSize = Size;
- Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
-
- CopyMem (PlatformInformationRecord, Bist, Size);
-
- return EFI_SUCCESS;
-}
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
deleted file mode 100644
index 0c7da44..0000000
--- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/** @file
- Sample to provide TempRamInitParams data.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/PcdLib.h>
-
-GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32 TempRamInitParams[4] = {
- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32
(PcdFlashMicroCodeOffset)),
- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32
(PcdFlashMicroCodeOffset)),
- FixedPcdGet32 (PcdFlashCodeCacheAddress),
- FixedPcdGet32 (PcdFlashCodeCacheSize)
-};
diff --git
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c
b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c
deleted file mode 100644
index 7f7a6af..0000000
---
a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecTempRamSupport.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/** @file
- Sample to provide SecTemporaryRamSupport function.
-
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Ppi/TemporaryRamSupport.h>
-
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugAgentLib.h>
-
-/**
- Switch the stack in the temporary memory to the one in the permanent memory.
-
- This function must be invoked after the memory migration immediately. The
relative
- position of the stack in the temporary and permanent memory is same.
-
- @param[in] TemporaryMemoryBase Base address of the temporary memory.
- @param[in] PermenentMemoryBase Base address of the permanent memory.
-**/
-VOID
-EFIAPI
-SecSwitchStack (
- IN UINT32 TemporaryMemoryBase,
- IN UINT32 PermenentMemoryBase
- );
-
-/**
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM
into
- permanent memory.
-
- @param[in] PeiServices Pointer to the PEI Services Table.
- @param[in] TemporaryMemoryBase Source Address in temporary memory from
which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] PermanentMemoryBase Destination Address in permanent memory
into which the SEC or PEIM will copy the
- Temporary RAM contents.
- @param[in] CopySize Amount of memory to migrate from temporary
to permanent memory.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize >
TemporaryMemoryBase when
- TemporaryMemoryBase > PermanentMemoryBase.
-
-**/
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
- IN UINTN CopySize
- )
-{
- IA32_DESCRIPTOR IdtDescriptor;
- VOID* OldHeap;
- VOID* NewHeap;
- VOID* OldStack;
- VOID* NewStack;
- DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;
- BOOLEAN OldStatus;
- UINTN PeiStackSize;
-
- PeiStackSize = (UINTN)PcdGet32 (PcdPeiTemporaryRamStackSize);
- if (PeiStackSize == 0) {
- PeiStackSize = (CopySize >> 1);
- }
-
- ASSERT (PeiStackSize < CopySize);
-
- //
- // |-------------------|---->
- // | Stack | PeiStackSize
- // |-------------------|---->
- // | Heap | PeiTemporayRamSize
- // |-------------------|----> TempRamBase
- //
- // |-------------------|---->
- // | Heap | PeiTemporayRamSize
- // |-------------------|---->
- // | Stack | PeiStackSize
- // |-------------------|----> PermanentMemoryBase
- //
-
- OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
- NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);
-
- OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);
- NewStack = (VOID*)(UINTN)PermanentMemoryBase;
-
- DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;
- DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;
-
- OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);
- //
- // Initialize Debug Agent to support source level debug in PEI phase after
memory ready.
- // It will build HOB and fix up the pointer in IDT table.
- //
- InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *)
&DebugAgentContext, NULL);
-
- //
- // Migrate Heap
- //
- CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);
-
- //
- // Migrate Stack
- //
- CopyMem (NewStack, OldStack, PeiStackSize);
-
-
- //
- // We need *not* fix the return address because currently,
- // The PeiCore is executed in flash.
- //
-
- //
- // Rebase IDT table in permanent memory
- //
- AsmReadIdtr (&IdtDescriptor);
- IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
-
- AsmWriteIdtr (&IdtDescriptor);
-
-
- //
- // Program MTRR
- //
-
- //
- // SecSwitchStack function must be invoked after the memory migration
- // immediatly, also we need fixup the stack change caused by new call into
- // permenent memory.
- //
- SecSwitchStack (
- (UINT32) (UINTN) OldStack,
- (UINT32) (UINTN) NewStack
- );
-
- SaveAndSetDebugTimerInterrupt (OldStatus);
-
- return EFI_SUCCESS;
-}
-
--
2.7.4.windows.1
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