[edk2] [PATCH v5 03/11] UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0

[Jeff Fan]

Needn't to copy register table if AllocatedSize is 0.

v4:
  Fix potential uninitialized variable issue.

v5:
  Set DestinationRegisterTableList[Index].RegisterTableEntry before
  RegisterTableEntry is updated.

Cc: Feng Tian <feng.t...@intel.com>
Cc: Michael Kinney <michael.d.kin...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff....@intel.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 12efc1f..c3280b8 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -826,21 +826,25 @@ CopyRegisterTable (
 
   CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOfCpus 
* sizeof (CPU_REGISTER_TABLE));
   for (Index = 0; Index < NumberOfCpus; Index++) {
-    RegisterTableEntry = AllocatePool 
(DestinationRegisterTableList[Index].AllocatedSize);
-    ASSERT (RegisterTableEntry != NULL);
-    CopyMem (RegisterTableEntry, (VOID 
*)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry, 
DestinationRegisterTableList[Index].AllocatedSize);
-    //
-    // Go though all MSRs in register table to initialize MSR spin lock
-    //
-    for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; 
Index1++, RegisterTableEntry++) {
-      if ((RegisterTableEntry->RegisterType == Msr) && 
(RegisterTableEntry->ValidBitLength < 64)) {
-        //
-        // Initialize MSR spin lock only for those MSRs need bit field writing
-        //
-        InitMsrSpinLockByIndex (RegisterTableEntry->Index);
+    if (DestinationRegisterTableList[Index].AllocatedSize != 0) {
+      RegisterTableEntry = AllocateCopyPool (
+        DestinationRegisterTableList[Index].AllocatedSize,
+        (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry
+        );
+      ASSERT (RegisterTableEntry != NULL);
+      DestinationRegisterTableList[Index].RegisterTableEntry = 
(EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;
+      //
+      // Go though all MSRs in register table to initialize MSR spin lock
+      //
+      for (Index1 = 0; Index1 < 
DestinationRegisterTableList[Index].TableLength; Index1++, 
RegisterTableEntry++) {
+        if ((RegisterTableEntry->RegisterType == Msr) && 
(RegisterTableEntry->ValidBitLength < 64)) {
+          //
+          // Initialize MSR spin lock only for those MSRs need bit field 
writing
+          //
+          InitMsrSpinLockByIndex (RegisterTableEntry->Index);
+        }
       }
     }
-    DestinationRegisterTableList[Index].RegisterTableEntry = 
(EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;
   }
 }
 
-- 
2.9.3.windows.2

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