Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

> On Sep 12, 2015, at 11:34 AM, Leekha Shaveta wrote: > > Thanks Andrew. > > Replies inlined. > > Regards, Shaveta > > -Original Message- > From: af...@apple.com [mailto:af...@apple.com > ] > Sent: Saturday,

Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

Thanks Andrew. Replies inlined. Regards, Shaveta -Original Message- From: af...@apple.com [mailto:af...@apple.com] Sent: Saturday, September 12, 2015 11:51 PM To: Leekha Shaveta-B20052 Cc: Benjamin Herrenschmidt ;

Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

On Sat, 2015-09-12 at 11:20 -0700, Andrew Fish wrote: > That is platform dependent. These buffers are for doing DMA. On x86 > normal memory just works, for ARM you needed an uncached buffer, and > you have to do some cache management to maintain coherency. On *some* ARM :-) It's my undertsanding

Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

On Sat, 2015-09-12 at 18:04 +, Leekha Shaveta wrote: > Hi > > I was implementing PCI RootBridgeIo protocol and have some doubts in > "IoMap" and "AllocateBuffer" functions of this protocol. > > In our platform, PCI space is starting form address 0x50__ > (40 bit addressable) > And

Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

> On Sep 12, 2015, at 11:04 AM, Leekha Shaveta wrote: > > Hi > > I was implementing PCI RootBridgeIo protocol and have some doubts in "IoMap" > and "AllocateBuffer" functions of this protocol. > > In our platform, PCI space is starting form address 0x50__ (40

Re: [edk2] PCI and non-1:1 mapping of MMIO space (Doubt o PCI Root bridge IOMap and IoAllocateBuffer)

Hi I was implementing PCI RootBridgeIo protocol and have some doubts in "IoMap" and "AllocateBuffer" functions of this protocol. In our platform, PCI space is starting form address 0x50__ (40 bit addressable) And its mapping on PCI bus is like: 50__ => _ (32