[edk2] [PATCH v1 1/1] ArmPkg/PlatformBootManagerLib: fix hotkey of boot option
Fix the parameter in EfiBootManagerAddKeyOptionVariable (). Otherwise,
the hotkey of boot option won't be registered correctly.
Cc: Laszlo Ersek
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
index f9c71d430c99..81d36f218700 100644
--- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -479,7 +479,7 @@ GetPlatformOptions (
NULL,
BootOptionNumber,
0,
- BootKeys[Index],
+ [Index],
NULL
);
if (EFI_ERROR (Status)) {
--
2.7.4
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[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Correct code format
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang
Reviewed-by: David Wei
Reviewed-by: David Wei
---
.../Common/Library/PlatformBootManagerLib/PlatformBootOption.c | 10 --
.../Common/PlatformSettings/PlatformPostMemPei/BootMode.c | 10 +-
.../SouthCluster/Library/Private/DxeScHdaLib/ScHdaLib.c| 10 +++---
3 files changed, 12 insertions(+), 18 deletions(-)
diff --git
a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootOption.c
b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootOption.c
index 0eec6ca..6ccecb2 100644
---
a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootOption.c
+++
b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootOption.c
@@ -519,12 +519,10 @@ RegisterDefaultBootOption (
//
// Shell.
//
- if (1) {
-ShellData = NULL;
-ShellDataSize = 0;
-RegisterFvBootOption (, INTERNAL_UEFI_SHELL_NAME,
(UINTN) -1, LOAD_OPTION_ACTIVE, (UINT8 *)ShellData, ShellDataSize);
- }
-
+ ShellData = NULL;
+ ShellDataSize = 0;
+ RegisterFvBootOption (, INTERNAL_UEFI_SHELL_NAME,
(UINTN) -1, LOAD_OPTION_ACTIVE, (UINT8 *)ShellData, ShellDataSize);
+
//
// UiApp.
//
diff --git
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/BootMode.c
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/BootMode.c
index c113097..6926445 100644
---
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/BootMode.c
+++
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/BootMode.c
@@ -1,7 +1,7 @@
/** @file
EFI PEIM to provide the platform support functionality.
- Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -423,14 +423,6 @@ SetPlatformBootMode (
//
CopyMem (, SAFE_SETUP_NAME, StrSize
(SAFE_SETUP_NAME));
PlatformSetupId.PlatformBootMode = PLATFORM_SAFE_MODE;
-
- } else if (0) {
-//
-// Manufacturing mode
-//
-CopyMem (, MANUFACTURE_SETUP_NAME, StrSize
(MANUFACTURE_SETUP_NAME));
-PlatformSetupId.PlatformBootMode = PLATFORM_MANUFACTURING_MODE;
-
} else {
//
// Default to normal mode.
diff --git
a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/Private/DxeScHdaLib/ScHdaLib.c
b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/Private/DxeScHdaLib/ScHdaLib.c
index 028f6ee..d05395e 100644
---
a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/Private/DxeScHdaLib/ScHdaLib.c
+++
b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/Private/DxeScHdaLib/ScHdaLib.c
@@ -1,7 +1,7 @@
/** @file
SC HD Audio Library implementation.
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -185,7 +185,9 @@ NhltFormatDump (
DEBUG ((DEBUG_INFO, " Format->FormatConfiguration.CapabilitiesSize = %d
B\n", Format->FormatConfiguration.CapabilitiesSize));
DEBUG ((DEBUG_INFO, " Format->FormatConfiguration.Capabilities:"));
for (i = 0; i < ( Format->FormatConfiguration.CapabilitiesSize ) ; i++) {
-if(i % 16 == 0) DEBUG ((DEBUG_INFO, "\n"));
+if(i % 16 == 0) {
+ DEBUG ((DEBUG_INFO, "\n"));
+}
DEBUG ((DEBUG_INFO, "0x%02x, ",
Format->FormatConfiguration.Capabilities[i]));
}
DEBUG ((DEBUG_INFO, "\n"));
@@ -260,7 +262,9 @@ NhltOedConfigDump (
DEBUG ((DEBUG_INFO, " OedConfig->CapabilitiesSize = %d B\n",
OedConfig->CapabilitiesSize));
DEBUG ((DEBUG_INFO, " OedConfig->Capabilities:"));
for (i = 0; i < (OedConfig->CapabilitiesSize) ; i++) {
-if(i % 16 == 0) DEBUG ((DEBUG_INFO, "\n"));
+if(i % 16 == 0) {
+ DEBUG ((DEBUG_INFO, "\n"));
+}
DEBUG ((DEBUG_INFO, "0x%02x, ", OedConfig->Capabilities[i]));
}
--
2.10.1.windows.1
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[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 4Initialize some pointers
Initialize some pointers which may be used without initialization
Cc: David Wei
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang
Reviewed-by: David Wei
---
.../Common/Library/PlatformBootManagerLib/PlatformBootManager.c | 5 -
.../Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c| 3 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git
a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootManager.c
b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootManager.c
index c9c2cbf..5201ac0 100644
---
a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootManager.c
+++
b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBootManagerLib/PlatformBootManager.c
@@ -524,7 +524,10 @@ ProcessTcgPp (
EFI_TCG2_PHYSICAL_PRESENCE Tcg2PpData;
EFI_PHYSICAL_PRESENCE TcgPpData;
UINTN TcgPpDataSize;
-
+
+ TcgPpData.PPRequest = TCG_PHYSICAL_PRESENCE_NO_ACTION;
+ Tcg2PpData.PPRequest = TCG2_PHYSICAL_PRESENCE_NO_ACTION;
+
//
// Initialize physical presence variable.
//
diff --git
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
index 7d003e4..17c09ec 100644
---
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
+++
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
@@ -1,7 +1,7 @@
/** @file
Do platform specific PEI stage initializations.
- Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -90,6 +90,7 @@ TpmPolicyInit (
if ((IsPttEnabled) && (SystemConfiguration->TPM == TPM_PTT)) {
if (SystemConfiguration->PttSuppressCommandSend == 1) {
+ Size = sizeof (gEfiTpmDeviceInstanceNoneGuid);
PcdSetPtrS (PcdTpmInstanceGuid, , );
DEBUG ((DEBUG_ERROR, "BIOS will send no further commands to PTT.\n"));
} else {
--
2.10.1.windows.1
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[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 3Add NULL checking for some pointers
Cc: David Wei
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang
Reviewed-by: David Wei
---
.../SmBiosMiscDxe/MiscSystemManufacturerFunction.c | 16 +---
.../DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c| 7 ++-
.../Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 10 +-
.../FspsWrapperPeim/FspsWrapperPeim.c| 6 +-
4 files changed, 29 insertions(+), 10 deletions(-)
diff --git
a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscSystemManufacturerFunction.c
b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscSystemManufacturerFunction.c
index e12..1c611f5 100644
---
a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscSystemManufacturerFunction.c
+++
b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscSystemManufacturerFunction.c
@@ -418,13 +418,15 @@ AddSmbiosManuCallback (
//
//ForType1InputData->SystemUuid.Data1 = PcdGet32 (PcdProductSerialNumber);
//ForType1InputData->SystemUuid.Data4[0] = PcdGet8 (PcdEmmcManufacturerId);
- ForType1InputData->SystemUuid.Data1 = (UINT32)MacAddressString [0] +
(((UINT32)MacAddressString [1]) << 16);
- ForType1InputData->SystemUuid.Data2 = (UINT16)MacAddressString [2];
- ForType1InputData->SystemUuid.Data3 = (UINT16)MacAddressString [3];
- ForType1InputData->SystemUuid.Data4[0] = (UINT8)MacAddressString [4];
- ForType1InputData->SystemUuid.Data4[1] = (UINT8)(MacAddressString [4] >> 8);
- ForType1InputData->SystemUuid.Data4[2] = (UINT8)MacAddressString [5];
- ForType1InputData->SystemUuid.Data4[3] = (UINT8)(MacAddressString [5] >> 8);
+ if ( MacAddressString != NULL) {
+ForType1InputData->SystemUuid.Data1 = (UINT32)MacAddressString [0] +
(((UINT32)MacAddressString [1]) << 16);
+ForType1InputData->SystemUuid.Data2 = (UINT16)MacAddressString [2];
+ForType1InputData->SystemUuid.Data3 = (UINT16)MacAddressString [3];
+ForType1InputData->SystemUuid.Data4[0] = (UINT8)MacAddressString [4];
+ForType1InputData->SystemUuid.Data4[1] = (UINT8)(MacAddressString [4] >>
8);
+ForType1InputData->SystemUuid.Data4[2] = (UINT8)MacAddressString [5];
+ForType1InputData->SystemUuid.Data4[3] = (UINT8)(MacAddressString [5] >>
8);
+ }
CopyMem ((UINT8 *) (>Uuid),>SystemUuid,16);
diff --git
a/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c
b/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c
index f182c8d..e4d157e 100644
---
a/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c
+++
b/Platform/BroxtonPlatformPkg/Common/Library/DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c
@@ -1,7 +1,7 @@
/** @file
Smbios Processor Information Driver which produces Smbios type 4 and 7
tables.
- Copyright (c) 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -276,6 +276,11 @@ InstallSmbiosCacheInfo (
// Allocate full record, including fixed data region, and string buffer
region.
//
SmbiosType7Record = (SMBIOS_TABLE_TYPE7 *) AllocateZeroPool (sizeof
(SMBIOS_TABLE_TYPE7) + StringBufferLength);
+ if (SmbiosType7Record == NULL) {
+DEBUG ((DEBUG_ERROR, "Fail to allocate memory\n"));
+return EFI_OUT_OF_RESOURCES;
+ }
+
SmbiosStringBufferPtr = ((UINT8 *) SmbiosType7Record) + sizeof
(SMBIOS_TABLE_TYPE7);
//
diff --git
a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c
b/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c
index c76f433..aa41981 100644
---
a/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c
+++
b/Platform/BroxtonPlatformPkg/Common/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c
@@ -1,7 +1,7 @@
/** @file
Implementation of Fsp SA Policy Initialization.
- Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -133,6 +133,10 @@ PeiFspSaPolicyInitPreMem (
VariableSize = sizeof (SYSTEM_CONFIGURATION);
SystemConfiguration = AllocateZeroPool (VariableSize);
+ if (SystemConfiguration == NULL) {
+DEBUG ((DEBUG_ERROR, "Fail to allocate memory\n"));
+return EFI_OUT_OF_RESOURCES;
+ }
Status = VariableServices->GetVariable (
VariableServices,
@@ -212,6 +216,10 @@ PeiFspSaPolicyInit (
VariableSize = sizeof (SYSTEM_CONFIGURATION);
SystemConfiguration = AllocateZeroPool (VariableSize);
+ if
[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 Fix klocwork issues
Guo Mang (5): Fix klocwork issues Change StrCpy() to StrCpyS() Add NULL checking for some pointers Initialize some pointers Correct code format .../Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 2 +- .../Application/FirmwareUpdate/FirmwareUpdate.c| 4 +-- .../Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c | 4 +-- .../SmBiosMiscDxe/MiscSystemManufacturerFunction.c | 16 +++- .../DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.c | 7 - .../PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c| 10 +++- .../PlatformBootManagerLib/PlatformBootManager.c | 5 +++- .../PlatformBootManagerLib/PlatformBootOption.c| 10 +++- .../PlatformSettings/PlatformPostMemPei/BootMode.c | 10 +--- .../PlatformPostMemPei/PlatformInit.c | 3 ++- .../PlatformPreMemPei/FvCallback.c | 4 +-- .../PlatformSetupDxe/SetupInfoRecords.c| 8 +++--- .../Common/PlatformSmm/Platform.c | 4 +-- .../IntelFsp2WrapperPkg/FspNotifyDxe/LoadBelow4G.c | 4 +-- .../FspsWrapperPeim/FspsWrapperPeim.c | 6 - .../BaseFspWrapperApiLib/FspWrapperApiLib.c| 10 .../SampleCode/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c | 6 ++--- .../Cpu/SmmAccess/Dxe/SmmAccessDriver.c| 4 +-- .../Cpu/SmmAccess/Pei/SmmAccessDriver.c| 6 ++--- .../BaseConfigBlockLib/BaseConfigBlockLib.c| 10 .../Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c | 4 +-- .../BroxtonSiPkg/Library/SideBandLib/SideBandLib.c | 4 +-- .../Universal/Variable/RuntimeDxe/Variable.c | 6 ++--- .../Library/BaseScSpiCommonLib/SpiCommon.c | 10 .../Library/Private/DxeScHdaLib/ScHdaLib.c | 10 +--- .../Private/PeiDxeUsbCommonLib/UsbCommonLib.c | 4 +-- .../Library/ScPlatformLib/ScPlatformLibrary.c | 4 +-- .../SouthCluster/Reset/RuntimeDxe/ScReset.c| 14 +- .../BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c | 20 +++ .../BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScLpss.c | 14 +- .../SouthCluster/ScSmiDispatcher/Smm/ScSmmSx.c | 14 +- .../ScSmiDispatcher/Smm/ScxSmmHelpers.c| 30 +++--- .../BroxtonSoC/BroxtonSiPkg/Txe/Heci/Dxe/Hecidrv.c | 8 +++--- .../BroxtonSoC/BroxtonSiPkg/Txe/Heci/Smm/HeciSmm.c | 24 - 34 files changed, 158 insertions(+), 141 deletions(-) -- 2.10.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 2Change StrCpy() to StrCpyS()
Fix klocwork issues: change StrCpy() to StrCpyS() Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang Reviewed-by: David Wei --- .../Common/Application/FirmwareUpdate/FirmwareUpdate.c| 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/Application/FirmwareUpdate/FirmwareUpdate.c b/Platform/BroxtonPlatformPkg/Common/Application/FirmwareUpdate/FirmwareUpdate.c index b374b98..3a80ed5 100644 --- a/Platform/BroxtonPlatformPkg/Common/Application/FirmwareUpdate/FirmwareUpdate.c +++ b/Platform/BroxtonPlatformPkg/Common/Application/FirmwareUpdate/FirmwareUpdate.c @@ -1,6 +1,6 @@ /** @file -Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved. +Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License that accompanies this distribution. @@ -287,7 +287,7 @@ ParseCommandLine ( PrintToken (STRING_TOKEN (STR_FWUPDATE_PATH_ERROR), HiiHandle, Argv[Index]); return EFI_INVALID_PARAMETER; } - StrCpy (mInputData.FileName, Argv[Index]); + StrCpyS (mInputData.FileName,sizeof (mInputData.FileName) / sizeof (CHAR16), Argv[Index]); mInputData.UpdateFromFile = TRUE; } } -- 2.10.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [Patch][edk2-platforms/devel-IntelAtomProcessorE3900 1Fix klocwork issues
Cc: David Wei
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang
---
.../Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 2 +-
.../Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c | 4 +--
.../PlatformPreMemPei/FvCallback.c | 4 +--
.../PlatformSetupDxe/SetupInfoRecords.c| 8 +++---
.../Common/PlatformSmm/Platform.c | 4 +--
.../IntelFsp2WrapperPkg/FspNotifyDxe/LoadBelow4G.c | 4 +--
.../BaseFspWrapperApiLib/FspWrapperApiLib.c| 10
.../SampleCode/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c | 6 ++---
.../Cpu/SmmAccess/Dxe/SmmAccessDriver.c| 4 +--
.../Cpu/SmmAccess/Pei/SmmAccessDriver.c| 6 ++---
.../BaseConfigBlockLib/BaseConfigBlockLib.c| 10
.../Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c | 4 +--
.../BroxtonSiPkg/Library/SideBandLib/SideBandLib.c | 4 +--
.../Universal/Variable/RuntimeDxe/Variable.c | 6 ++---
.../Library/BaseScSpiCommonLib/SpiCommon.c | 10
.../Private/PeiDxeUsbCommonLib/UsbCommonLib.c | 4 +--
.../Library/ScPlatformLib/ScPlatformLibrary.c | 4 +--
.../SouthCluster/Reset/RuntimeDxe/ScReset.c| 14 +-
.../BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c | 20 +++
.../BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScLpss.c | 14 +-
.../SouthCluster/ScSmiDispatcher/Smm/ScSmmSx.c | 14 +-
.../ScSmiDispatcher/Smm/ScxSmmHelpers.c| 30 +++---
.../BroxtonSoC/BroxtonSiPkg/Txe/Heci/Dxe/Hecidrv.c | 8 +++---
.../BroxtonSoC/BroxtonSiPkg/Txe/Heci/Smm/HeciSmm.c | 24 -
24 files changed, 109 insertions(+), 109 deletions(-)
diff --git
a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c
b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c
index 6a4d675..4cc1e1f 100644
--- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c
+++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c
@@ -381,7 +381,7 @@ PlatformUpdateTables (
#if defined (IDCC2_SUPPORTED) && IDCC2_SUPPORTED
EFI_ACPI_ASPT_TABLE *pSpttTable;
#endif
- UINT16 NumberOfHpets;
+ UINT32 NumberOfHpets;
UINT16 HpetCapIdValue;
UINT32 HpetBlockID;
UINTN LocalApicCounter;
diff --git
a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c
b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c
index cce4bbe..b399a5f 100644
---
a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c
+++
b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c
@@ -165,7 +165,7 @@ EfiValueToString (
//
// Reverse temp string into Buffer.
//
- if (Width > 0 && (UINTN) (TempStr - TempBuffer) > Width) {
+ if (Width > 0 && ((UINTN)TempStr - (UINTN)TempBuffer) > Width) {
TempStr = TempBuffer + Width;
}
Index = 0;
@@ -241,7 +241,7 @@ EfiValueToHexStr (
//
// Reverse temp string into Buffer.
//
- if (Width > 0 && (UINTN) (TempStr - TempBuffer) > Width) {
+ if (Width > 0 && ((UINTN)TempStr - (UINTN)TempBuffer) > Width) {
TempStr = TempBuffer + Width;
}
Index = 0;
diff --git
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/FvCallback.c
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/FvCallback.c
index 4a3a675..d5f514a 100644
---
a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/FvCallback.c
+++
b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei/FvCallback.c
@@ -1,7 +1,7 @@
/** @file
Locate and install Firmware Volume Hob's Once there is main memory.
- Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -158,7 +158,7 @@ CreateVariableHobs (
return EFI_INVALID_PARAMETER;
}
- VariableStoreBase = (EFI_PHYSICAL_ADDRESS) ((UINTN) NvStorageFvHeader +
NvStorageFvHeader->HeaderLength);
+ VariableStoreBase = (EFI_PHYSICAL_ADDRESS) ((UINTN) NvStorageFvHeader +
(UINTN)NvStorageFvHeader->HeaderLength);
VariableStoreHeader = (VARIABLE_STORE_HEADER *) (UINTN) VariableStoreBase;
DEBUG ((EFI_D_INFO, " VariableStoreHeader at 0x%x. VariableStoreSize =
%d\n", VariableStoreHeader, (UINTN) VariableStoreHeader->Size));
diff --git
[edk2] Coffee Lake FSP Released
Hi All, Intel is pleased to announce that Coffee Lake FSP is now available on https://github.com/IntelFsp/FSP. In addition, the previously discussed reorganization to move all FSP binaries in the master branch has been completed. With Best Regards, Nate ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
Add SMBIOS 3.2.0 definitions according to
www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
Processor Information (Type 4):
- SMBIOSCR00163: add socket LGA2066
- SMBIOSCR00173: add Intel Core i9
- SMBIOSCR00176: add new processor sockets
Port Connector Information (Type 8):
- SMBIOSCR00168: add USB Type-C
System Slots (Type 9):
- SMBIOSCR00164: add "unavailable" to current usage field
- SMBIOSCR00167: add support for PCIe bifurcation
Memory Device (Type 17):
- SMBIOSCR00162: add support for NVDIMMs
- SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory
type
- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory
Speed"
- SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D
XPoint)
IPMI Device Information (Type 38):
- SMBIOSCR00171: add SSIF
Management Controller Host Interface (Type 42)
- SMBIOSCR00175: fix structure data parsing issue
V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
Cc: Liming Gao
Cc: Dandan Bi
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/IndustryStandard/SmBios.h | 155 ---
1 file changed, 120 insertions(+), 35 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index 5d0442873dfc..61e2f9421f97 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,5 +1,5 @@
/** @file
- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
@@ -685,6 +685,7 @@ typedef enum {
ProcessorFamilyzArchitecture = 0xCC,
ProcessorFamilyIntelCoreI5= 0xCD,
ProcessorFamilyIntelCoreI3= 0xCE,
+ ProcessorFamilyIntelCoreI9= 0xCF,
ProcessorFamilyViaC7M = 0xD2,
ProcessorFamilyViaC7D = 0xD3,
ProcessorFamilyViaC7 = 0xD4,
@@ -806,7 +807,11 @@ typedef enum {
ProcessorUpgradeSocketBGA1515 = 0x35,
ProcessorUpgradeSocketLGA3647_1 = 0x36,
ProcessorUpgradeSocketSP3 = 0x37,
- ProcessorUpgradeSocketSP3r2 = 0x38
+ ProcessorUpgradeSocketSP3r2 = 0x38,
+ ProcessorUpgradeSocketLGA2066 = 0x39,
+ ProcessorUpgradeSocketBGA1392 = 0x3A,
+ ProcessorUpgradeSocketBGA1510 = 0x3B,
+ ProcessorUpgradeSocketBGA1528 = 0x3C
} PROCESSOR_UPGRADE;
///
@@ -1159,6 +1164,7 @@ typedef enum {
PortConnectorTypeBNC= 0x20,
PortConnectorType1394 = 0x21,
PortConnectorTypeSasSata= 0x22,
+ PortConnectorTypeUsbTypeC = 0x23,
PortConnectorTypePC98 = 0xA0,
PortConnectorTypePC98Hireso = 0xA1,
PortConnectorTypePCH98 = 0xA2,
@@ -1205,6 +1211,8 @@ typedef enum {
PortTypeNetworkPort = 0x1F,
PortTypeSata = 0x20,
PortTypeSas = 0x21,
+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
+ PortTypeThunderbolt = 0x23,
PortType8251Compatible= 0xA0,
PortType8251FifoCompatible= 0xA1,
PortTypeOther = 0xFF
@@ -1314,10 +1322,11 @@ typedef enum {
/// System Slots - Current Usage.
///
typedef enum {
- SlotUsageOther = 0x01,
- SlotUsageUnknown = 0x02,
- SlotUsageAvailable = 0x03,
- SlotUsageInUse = 0x04
+ SlotUsageOther= 0x01,
+ SlotUsageUnknown = 0x02,
+ SlotUsageAvailable= 0x03,
+ SlotUsageInUse= 0x04,
+ SlotUsageUnavailable = 0x05
} MISC_SLOT_USAGE;
///
@@ -1350,10 +1359,21 @@ typedef struct {
UINT8 PmeSignalSupported :1;
UINT8 HotPlugDevicesSupported :1;
UINT8 SmbusSignalSupported:1;
- UINT8 Reserved:5; ///< Set to 0.
+ UINT8 BifurcationSupported:1;
+ UINT8 Reserved:4; ///< Set to 0.
} MISC_SLOT_CHARACTERISTICS2;
///
+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups
+///
+typedef struct {
+ UINT16 SegmentGroupNum;
+ UINT8 BusNum;
+ UINT8 DevFuncNum;
+ UINT8 DataBusWidth;
+} MISC_SLOT_PEER_GROUP;
+
+///
/// System Slots (Type 9)
///
/// The information in this structure defines the attributes of a system slot.
@@ -1376,6 +1396,12 @@ typedef struct {
UINT16 SegmentGroupNum;
UINT8 BusNum;
UINT8 DevFuncNum;
+ //
+ // Add for smbios 3.2
+ //
+ UINT8 DataBusWidth;
+ UINT8 PeerGroupingCount;
+
[edk2] [PATCH V2 2/2] MdeModulePkg: Update SMBIOS PCDs to 3.2.0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Cc: Liming Gao Cc: Dandan Bi Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- MdeModulePkg/MdeModulePkg.dec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 6a6d9660edc2..261da61c18a2 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1763,11 +1763,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## SMBIOS version. # @Prompt SMBIOS version. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0301|UINT16|0x00010055 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302|UINT16|0x00010055 ## SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. # @Prompt SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure. - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x1|UINT8|0x0001006A + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0|UINT8|0x0001006A ## SMBIOS produce method. # BIT0 set indicates 32-bit entry point and table are produced. -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH V2 0/2] Add SMBIOS 3.2.0 definitions
https://bugzilla.tianocore.org/show_bug.cgi?id=1099 This patch series updates 1. MdePkg/Include/IndustryStandard/Smbios.h 2. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion and gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9 in PATCH V2 1/2. Star Zeng (2): MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions MdeModulePkg: Update SMBIOS PCDs to 3.2.0 MdeModulePkg/MdeModulePkg.dec| 4 +- MdePkg/Include/IndustryStandard/SmBios.h | 155 --- 2 files changed, 122 insertions(+), 37 deletions(-) -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH 0/2] MdeModulePkg/PciBus: Restrict one VGA per HostBridge not Segment
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1109 Today's restriction of VGA device is to have only one VGA device enabled per PCI segment. It's not correct because several segments may share one IO / MMIO address space. We should restrict to have one VGA per Host Bridge because each Host Bridge has its only IO / MMIO address space. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Star Zeng Ruiyu Ni (2): MdeModulePkg/PciBus: Refine ActiveVGADeviceOnTheRootBridge MdeModulePkg/PciBus: Restrict one VGA per HostBridge not Segment MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 55 +++ MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h | 20 - MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c| 4 +- 3 files changed, 38 insertions(+), 41 deletions(-) -- 2.16.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH 2/2] MdeModulePkg/PciBus: Restrict one VGA per HostBridge not Segment
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1109
Today's restriction of VGA device is to have only one VGA device
enabled per PCI segment. It's not correct because several segments
may share one IO / MMIO address space.
We should restrict to have one VGA per Host Bridge because each
Host Bridge has its only IO / MMIO address space.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Star Zeng
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 22 +++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h | 10 +-
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c| 4 ++--
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index fdec0bcd53..fbcc53e41a 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -979,33 +979,33 @@ PciDeviceExisted (
}
/**
- Get the active VGA device on the same segment.
+ Get the active VGA device on the specified Host Bridge.
- @param VgaDevicePCI IO instance for the VGA device.
+ @param HostBridgeHandleHost Bridge handle.
- @return The active VGA device on the same segment.
+ @return The active VGA device on the specified Host Bridge.
**/
PCI_IO_DEVICE *
-ActiveVGADeviceOnTheSameSegment (
- IN PCI_IO_DEVICE*VgaDevice
+LocateVgaDeviceOnHostBridge (
+ IN EFI_HANDLE HostBridgeHandle
)
{
LIST_ENTRY *CurrentLink;
- PCI_IO_DEVICE *Temp;
+ PCI_IO_DEVICE *PciIo;
CurrentLink = mPciDevicePool.ForwardLink;
while (CurrentLink != NULL && CurrentLink != ) {
-Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+PciIo = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
-if (Temp->PciRootBridgeIo->SegmentNumber ==
VgaDevice->PciRootBridgeIo->SegmentNumber) {
+if (PciIo->PciRootBridgeIo->ParentHandle== HostBridgeHandle) {
- Temp = LocateVgaDevice (Temp);
+ PciIo = LocateVgaDevice (PciIo);
- if (Temp != NULL) {
-return Temp;
+ if (PciIo != NULL) {
+return PciIo;
}
}
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
index 1ec2178a21..b45d2a5d77 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
@@ -230,16 +230,16 @@ PciDeviceExisted (
);
/**
- Get the active VGA device on the same segment.
+ Get the active VGA device on the specified Host Bridge.
- @param VgaDevicePCI IO instance for the VGA device.
+ @param HostBridgeHandleHost Bridge handle.
- @return The active VGA device on the same segment.
+ @return The active VGA device on the specified Host Bridge.
**/
PCI_IO_DEVICE *
-ActiveVGADeviceOnTheSameSegment (
- IN PCI_IO_DEVICE*VgaDevice
+LocateVgaDeviceOnHostBridge (
+ IN EFI_HANDLE HostBridgeHandle
);
/**
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
index 291578c63c..333b875ff0 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
@@ -1415,7 +1415,7 @@ SupportPaletteSnoopAttributes (
//
// Get the boot VGA on the same segement
//
- Temp = ActiveVGADeviceOnTheSameSegment (PciIoDevice);
+ Temp = LocateVgaDeviceOnHostBridge
(PciIoDevice->PciRootBridgeIo->ParentHandle);
if (Temp == NULL) {
//
@@ -1670,7 +1670,7 @@ PciIoAttributes (
//
// Check if there have been an active VGA device on the same segment
//
-Temp = ActiveVGADeviceOnTheSameSegment (PciIoDevice);
+Temp = LocateVgaDeviceOnHostBridge
(PciIoDevice->PciRootBridgeIo->ParentHandle);
if (Temp != NULL && Temp != PciIoDevice) {
//
// An active VGA has been detected, so can not enable another
--
2.16.1.windows.1
___
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edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [Patch V2] BaseTools: Update Makefile for ECC tool
V2: Add --target-name to specify the file name to create Because Ecc.py was renamed to EccMain.py Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu --- BaseTools/Source/Python/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/BaseTools/Source/Python/Makefile b/BaseTools/Source/Python/Makefile index d78b12d..ac99259 100644 --- a/BaseTools/Source/Python/Makefile +++ b/BaseTools/Source/Python/Makefile @@ -234,11 +234,11 @@ CMD_ECC=$(BASE_TOOLS_PATH)\Source\Python\Ecc\c.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragment.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragmentCollector.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Configuration.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CParser.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Database.py \ -$(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py \ +$(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccGlobalData.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccToolError.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Exception.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\FileProfile.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\MetaDataParser.py \ @@ -294,12 +294,12 @@ $(BIN_DIR)\TestSigningPrivateKey.pem: $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sh @copy /Y /B $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\TestSigningPrivateKey.pem $(BIN_DIR)\TestSigningPrivateKey.pem $(BIN_DIR)\Rsa2048Sha256GenerateKeys.exe: $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py -$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py $(CMD_ECC) $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml - @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Ecc\Ecc.py +$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py $(CMD_ECC) $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml + @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Ecc\EccMain.py --target-name=Ecc.exe $(BIN_DIR)\config.ini: $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini @copy /Y /B $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml: $(BASE_TOOLS_PATH)\Source\Python\Ecc\exception.xml -- 2.6.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v1 1/1] ArmPkg: Add support for GICv4
Hi Sami,
On Tue, Aug 21, 2018 at 11:14:43AM +0100, Sami Mujawar wrote:
> Updated Redistributor base calculation to allow for the fact that
> GICv4 has 2 additional 64KB frames (for VLPI and a reserved frame).
> The code now tests the VLPIS bit in the GICR_TYPER register
Can you expand the name for this register (GIC Redistributor Type
Register)?
> and calculates the Redistributor granularity accordingly.
>
> The code changes are:
> GICR_TYPER register fields, etc, added to the header.
> Loop updated to pay attention to GICR_TYPER.Last.
> Derive frame "stride" size from GICR_TYPER.VLPIS.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar
> ---
> The changes can be seen at:
> https://github.com/samimujawar/edk2/tree/329_gicv4_granularity_v1
>
> Notes:
> v1:
> - Added support for initializing GICv4 [SAMI]
>
> ArmPkg/Drivers/ArmGic/ArmGicLib.c | 37
> ArmPkg/Include/Library/ArmGicLib.h | 19 --
Can you add a sort order file in your working tree (git config
diff.orderFile) with the contents in Laszlo's unkempt guide?
> 2 files changed, 39 insertions(+), 17 deletions(-)
>
> diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
> b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
> index
> 0087399fb1dba0e697f7a6ccd6f7432a59311ac6..033d98b75c1fc0414e7b70be1ca53d5c91cb6f3c
> 100644
> --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
> +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
> @@ -1,6 +1,6 @@
> /** @file
> *
> -* Copyright (c) 2011-2017, ARM Limited. All rights reserved.
> +* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
> *
> * This program and the accompanying materials
> * are licensed and made available under the terms and conditions of the BSD
> License
> @@ -19,6 +19,16 @@
> #include
> #include
>
> +// In GICv3, there are 2 x 64KB frames:
> +// Redistributor control frame + SGI Control & Generation frame
> +#define GIC_V3_REDISTRIBUTOR_GRANULARITY (ARM_GICR_CTLR_FRAME_SIZE
> \
> + + ARM_GICR_SGI_PPI_FRAME_SIZE)
> +
> +// In GICv4, there are 2 additional 64KB frames:
> +// VLPI frame + Reserved page frame
> +#define GIC_V4_REDISTRIBUTOR_GRANULARITY (GIC_V3_REDISTRIBUTOR_GRANULARITY
> \
> + + ARM_GICR_SGI_VLPI_FRAME_SIZE
> \
> + +
> ARM_GICR_SGI_RESERVED_FRAME_SIZE)
>
> #define ISENABLER_ADDRESS(base,offset) ((base) + \
>ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * offset))
> @@ -54,12 +64,11 @@ GicGetCpuRedistributorBase (
>IN ARM_GIC_ARCH_REVISION Revision
>)
> {
> - UINTN Index;
>UINTN MpId;
>UINTN CpuAffinity;
>UINTN Affinity;
> - UINTN GicRedistributorGranularity;
>UINTN GicCpuRedistributorBase;
> + UINT64 GicRTyper;
I know this is the official name of the register, but this is a local
variable in a function specific to the redistributor, so could you
change it to be just TypeRegister?
>
>MpId = ArmReadMpidr ();
>// Define CPU affinity as:
> @@ -68,27 +77,27 @@ GicGetCpuRedistributorBase (
>CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) |
> ((MpId & ARM_CORE_AFF3) >> 8);
>
> - if (Revision == ARM_GIC_ARCH_REVISION_3) {
> -// 2 x 64KB frame:
> -// Redistributor control frame + SGI Control & Generation frame
> -GicRedistributorGranularity = ARM_GICR_CTLR_FRAME_SIZE
> - + ARM_GICR_SGI_PPI_FRAME_SIZE;
> - } else {
> + if (Revision < ARM_GIC_ARCH_REVISION_3) {
> ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
> return 0;
>}
>
>GicCpuRedistributorBase = GicRedistributorBase;
>
> - for (Index = 0; Index < PcdGet32 (PcdCoreCount); Index++) {
> -Affinity = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER) >> 32;
> + do {
> +GicRTyper = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER);
> +Affinity = GicRTyper >> 32;
Could you add a macro for that >> 32? ARM_GICR_TYPER_AFFINITY(...) ?
Hah, no, that's already used for the other way :)
_GET_AFFINITY?
> if (Affinity == CpuAffinity) {
>return GicCpuRedistributorBase;
> }
>
> -// Move to the next GIC Redistributor frame
> -GicCpuRedistributorBase += GicRedistributorGranularity;
> - }
> +// Move to the next GIC Redistributor frame.
> +// The GIC specification does not forbid a mixture of v3 and v4 frames,
> +// so we test VLPIS for each frame.
Could you expand VLPIS (Virtual LPIs Supported or somesuch)?
"v3 and v4" frames ... is that a correct architectural description?
/
Leif
> +GicCpuRedistributorBase += (((ARM_GICR_TYPER_VLPIS & GicRTyper) != 0)
> +? GIC_V4_REDISTRIBUTOR_GRANULARITY
> +: GIC_V3_REDISTRIBUTOR_GRANULARITY);
> + } while ((GicRTyper & ARM_GICR_TYPER_LAST) == 0);
>
>// The Redistributor has
Re: [edk2] [PATCH edk2-platforms v2 00/43] Upload for D06 platform
Hi Ming, I have finished reviewing v2/v3. Please go ahead and start putting together and sending out a v4 of both the edk2-platforms part and the edk2-non-osi part. Regards, Leif On Tue, Aug 14, 2018 at 04:08:20PM +0800, Ming Huang wrote: > The major features of this patchset include: > 1 D06 source code; > 2 Unify some D0x modules; > > This patch set is base on pcihostbridage-v2. > For compiling D06, add below hunk to edk2-platforms.config > [d06] > LONGNAME=HiSilicon D06 > DSC=Platform/Hisilicon/D06/D06.dsc > ARCH=AARCH64 > > Code can also be found in github: > https://github.com/hisilicon/OpenPlatformPkg.git > branch: d06-platform-v2 > > > Heyi Guo (3): > Hisilicon/D06: Add Debug Serial Port Init Driver > Hisilicon/Hi1620: Add ACPI PPTT table > Platform/Hisilicon/D06: Enable ACPI PPTT > > Luqi Jiang (1): > Hisilicon/D06: add apei driver > > Ming Huang (32): > Silicon/Hisilicon: Modify the MRC interface for other module > Silicon/Hisilicon: Separate PlatformArch.h > Silicon/Hisilicon/Acpi: Move some macro to PlatformArch.h > Hisilicon/D0x: Move CustomData.Fv to common path of Hisilicon > Hisilicon/D0x: Move IpmiCmdLib to common path of Hisilicon > Hisilicon/D0x: Unify FlashFvbDxe driver > Hisilicon/D0X: Rename the global variable gDS3231RtcDevice > Hisilicon/D06: Add several base file for D06 > Platform/Hisilicon/D06: Add M41T83RealTimeClockLib > Platform/Hisilicon/D06: Add edk2-non-osi components for D06 > Hisilicon/D06: Add OemMiscLibD06 > Silicon/Hisilicon/D06: Wait for all disk ready > Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe > Hisilicon/D06: Add ACPI Tables for D06 > Silicon/Hisilicon/D06: Stop watchdog > Hisilicon/I2C: Modify I2CLib.c for coding style > Silicon/Hisilicon/I2C: Refactor I2C library > Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 > Silicon/Hisilicon/D06: Add I2C delay for HNS auto config > Hisilicon/I2C: Fix a typo issue > Platform/Hisilicon/D06: Add OemNicLib > Platform/Hisilicon/D06: Add OemNicConfig2P Driver > Platform/Hisilicon/D06: Add EarlyConfigPeim peim > Platform/Hisilicon/D06: Add PciHostBridgeLib > Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h > Platform/Hisilicon/D06: Add capsule upgrade support > Silicon/Hisilicon/D06: Add I2C Bus Exception handle function > Silicon/Hisilicon/Setup: Support SPCR table switch > Silicon/Hisilicon/setup: Support SMMU switch > Hisilicon/D06: Add PciPlatformLib > Hisilicon/D06: Add edk2-non-osi Shell components > Platform/Hisilicon/D0x: Update version string to 18.08 > > Sun Yuanchen (3): > Silicon/Hisilicon/D0x: Move dimm size definition to PlatformArch.h > Silicon/Hisilicon/D0x: Move RAS macro to PlatformArch.h > Hisilicon/D0x: Update SMBIOS type9 info > > Yang XinYi (2): > Hisilicon/D06: Add Hi1620OemConfigUiLib > Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" > > ZhenYao (1): > Silicon/Hisilicon/D06: Modify for close slave core clock. > > shaochangliang (1): > Silicon/Hisilicon/D06: Optimize HNS config CDR post time > > Platform/Hisilicon/D06/D06.dec| 29 + > Silicon/Hisilicon/HisiPkg.dec |6 + > Platform/Hisilicon/D03/D03.dsc|4 +- > Platform/Hisilicon/D05/D05.dsc|4 +- > Platform/Hisilicon/D06/D06.dsc| 490 > Platform/Hisilicon/D03/D03.fdf|8 +- > Platform/Hisilicon/D05/D05.fdf|8 +- > Platform/Hisilicon/D06/D06.fdf| 444 > .../OemMiscLib2P/OemMiscLib2PHi1610.inf |1 + > .../Library/OemMiscLibD05/OemMiscLibD05.inf |1 + > .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + > .../SystemFirmwareDescriptor.inf | 50 + > .../EarlyConfigPeim/EarlyConfigPeimD06.inf| 50 + > .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + > .../D06/Library/OemNicLib/OemNicLib.inf | 35 + > .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + > .../Drivers/FlashFvbDxe/FlashFvbDxe.inf |7 +- > .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf |3 +- > .../ProcessorSubClassDxe.inf |2 + > .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf| 64 + > .../Pl011DebugSerialPortInitDxe.inf | 48 + > .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 68 + > .../Hi1620PciPlatformLib.inf | 30 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf| 48 + > .../M41T83RealTimeClockLib.inf| 46 + > .../PlatformBootManagerLib.inf|4 + > .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + > .../Hisilicon/D06/Include/Library/CpldD06.h | 39 + > .../Smbios/MemorySubClassDxe/MemorySubClass.h |2 - > .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 27 +- > .../Hisilicon/Hi1610/Include/PlatformArch.h | 71 + > .../Hi1616/D05AcpiTables/Hi1616Platform.h | 24
Re: [edk2] [PATCH edk2-platforms v2 42/43] Hisilicon/D06: Add edk2-non-osi Shell components
So, on the whole, I am really not happy for any of these commands to
go into 18.08. I understand they may be handy for development, but I
do not understand why they make sense to upstream.
On Tue, Aug 14, 2018 at 04:09:02PM +0800, Ming Huang wrote:
> Add Hisilicon Oem Shell libraries for some commands,such as
> biosupdate, getmac, setmac, provision, acpistartos, brdinfo,
> sfpinfo.
>
> biosupdate example:
> ifconfig -s eth2 static 192.168.2.68 255.255.255.0 192.168.2.1
> biosupdate serverIp -u user -p password -f D06.fd -m master
>
> acpistartos example:
> ifconfig -s eth2 static 192.168.2.69 255.255.255.0 192.168.2.1
> provision serverIp -u user -p password -f os\Image -a 0x8
> 2
> provision serverIp -u user -p password -f os\minifs.cpio.gz -a 0x0700
> 2
> acpistartos
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Silicon/Hisilicon/HisiPkg.dec | 4
> Platform/Hisilicon/D06/D06.dsc | 2 ++
> 2 files changed, 6 insertions(+)
>
> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
> index 858b840a57..010d501914 100644
> --- a/Silicon/Hisilicon/HisiPkg.dec
> +++ b/Silicon/Hisilicon/HisiPkg.dec
> @@ -39,6 +39,7 @@
>gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45,
> 0x7d, 0x13, 0x50, 0x96, 0x5d}}
>gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93,
> 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97,
> 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
> + gOemNicProtocolGuid = {0xb5903955, 0x31e9, 0x4aaf, {0xb2, 0x83, 0x7, 0x9f,
> 0x3c, 0xc4, 0x71, 0x66}}
>
> [Guids]
>gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87,
> 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
> @@ -49,6 +50,8 @@
>gHisiOemVariableGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 0xc5,
> 0x80, 0x32, 0x7d, 0x9b, 0x29}}
>gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4,
> 0xa4, 0x2f, 0x45, 0x06, 0xf8}}
>gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64,
> 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}}
> + HisiShellSampleHiiGuid = { 0x43859314, 0x82c1, 0x4592, { 0x8f, 0xf7,
> 0xc1, 0xbd, 0xf3, 0xb2, 0x0e, 0xd5 }}
> + HisiPlatformShellSampleHiiGuid = { 0x7924a5de, 0xc600, 0x40d5, { 0x91,
> 0x10, 0xf9, 0xc3, 0xe7, 0x25, 0x4d, 0x33 }}
Why do we need all these different GUIDs?
Also, why "Sample"?
/
Leif
>
> [LibraryClasses]
>PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
> @@ -101,6 +104,7 @@
>gHisiTokenSpaceGuid.PcdSlotPerChannelNum|0x0|UINT32|0x4004
>
>gHisiTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E,
> 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }|VOID*|0x30006554
> + gHisiTokenSpaceGuid.PcdStartOsParameter|L""|VOID*|0x500
>
>#FDT File Address
>gHisiTokenSpaceGuid.FdtFileAddress|0x0|UINT64|0x4005
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index 053ea894d5..544039e450 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -473,6 +473,8 @@
> !if $(INCLUDE_DP) == TRUE
>NULL|ShellPkg/Library/UefiDpLib/UefiDpLib.inf
> !endif #$(INCLUDE_DP)
> + NULL|Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf
> +
> NULL|Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf
>
>
>gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 36/43] Platform/Hisilicon/D06: Add capsule upgrade support
On Tue, Aug 14, 2018 at 04:08:56PM +0800, Ming Huang wrote:
> This module support updating the boot CPU firmware only.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
As I said on v1, I have no further comments on this.
Reviewed-by: Leif Lindholm
Ard may have something to add.
/
Leif
> ---
> Platform/Hisilicon/D06/D06.dsc
> | 14
> Platform/Hisilicon/D06/D06.fdf
> | 72 -
>
> Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> | 50
>
> Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
> | 70 +
>
> Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> | 46 +++
>
> Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
> | 81
> 6 files changed, 332 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index 9550e0d497..fad6fcc747 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -121,6 +121,11 @@
>gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
>gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
> +[PcdsDynamicExDefault.common.DEFAULT]
> +
> gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,
> 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5,
> 0x04, 0x89}
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf,
> 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5,
> 0x7b, 0x55}
> +
>
> [PcdsFixedAtBuild.common]
>gArmPlatformTokenSpaceGuid.PcdCoreCount|48
> @@ -266,6 +271,7 @@
>Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
>Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>
> +
> Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>
>
> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> @@ -386,6 +392,8 @@
>MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
>MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
>MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>#
># FAT filesystem + GPT/MBR partitioning
>#
> @@ -434,6 +442,12 @@
>MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
>MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +
> SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
> +
> +
> FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
> + }
> +
> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>
>#
># UEFI application (Shell Embedded Boot Loader)
> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
> index 90379b8558..8c3f4f9932 100644
> --- a/Platform/Hisilicon/D06/D06.fdf
> +++ b/Platform/Hisilicon/D06/D06.fdf
> @@ -308,7 +308,9 @@ READ_LOCK_STATUS = TRUE
>INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
>
>INF
> Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
> - INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
> + INF
> SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> +
>#
># Build Shell from latest source code instead of prebuilt binary
>#
> @@ -364,11 +366,79 @@ READ_LOCK_STATUS = TRUE
>
>INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> + INF RuleOverride = FMP_IMAGE_DESC
> Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED
> = TRUE {
>SECTION FV_IMAGE = FVMAIN
> }
>}
> +[FV.CapsuleDispatchFv]
> +FvAlignment= 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS= TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS= TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> +
Re: [edk2] [PATCH edk2-platforms v2 40/43] Silicon/Hisilicon/setup: Support SMMU switch
Please correct the subject as per my prevoious comments on this.
On the whole, I think the enable/disable SMMU is a likely enough
scenario that we should probably have some core functionality for it
like for SPCR. For now I'm OK with this.
On Tue, Aug 14, 2018 at 04:09:00PM +0800, Ming Huang wrote:
> Select without SMMU iort while SMMU item is disable,
> Select with SMMU iort while SMMU item is enable.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 88
>
> 1 file changed, 88 insertions(+)
>
> diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
> b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
> index 32878ca4f9..e0c29e0f57 100644
> --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
> +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
> @@ -24,6 +24,90 @@
>
> #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET)
>
> +#define FIELD_IORT_NODE_OFFSET 40
> +
> +typedef enum {
> + NodeTypeIts = 0,
> + NodeTypeNameComponent,
> + NodeTypePciRC,
> + NodeTypeSmmuV1,
> + NodeTypeSmmuV3,
> + NodeTypePMCG
> +} IORT_NODE_TYPE;
> +
> +#pragma pack(1)
> +typedef struct {
> + UINT8 Type;
> + UINT16 Length;
> + UINT8 Revision;
> + UINT32 Reserved;
> + UINT32 IdMapNumber;
> + UINT32 IdArrayOffset;
> +} IORT_NODE_HEAD;
> +#pragma pack()
> +
> +BOOLEAN
> +IsIortWithSmmu (
> + IN EFI_ACPI_DESCRIPTION_HEADER *TableHeader
> + )
> +{
> + UINT32 *NodeOffset;
> + UINT32 NextOffset;
> + IORT_NODE_HEAD *Node;
> +
> + NodeOffset = (UINT32 *)((UINT8 *)TableHeader + FIELD_IORT_NODE_OFFSET);
> + NextOffset = *NodeOffset;
> +
> + while (NextOffset < TableHeader->Length) {
> +Node = (IORT_NODE_HEAD *)((UINT8 *)TableHeader + NextOffset);
> +NextOffset += Node->Length;
> +
> +if ((Node->Type == NodeTypeSmmuV1) || (Node->Type == NodeTypeSmmuV3)) {
> + return TRUE;
> +}
> + }
> +
> + return FALSE;
> +}
> +
> +EFI_STATUS
> +SelectIort (
> + IN EFI_ACPI_DESCRIPTION_HEADER *TableHeader
> + )
> +{
> + EFI_STATUS Status;
> + UINTN Size;
> + OEM_CONFIG_DATA Configuration;
> +
> + Configuration.EnableSmmu = 0;
> + Size = sizeof (OEM_CONFIG_DATA);
> + Status = gRT->GetVariable (
> + OEM_CONFIG_NAME,
> + ,
> + NULL,
> + ,
> +
> + );
> + if (EFI_ERROR (Status)) {
> +DEBUG ((DEBUG_ERROR, "Get OemConfig variable (%r).\n", Status));
> + }
> +
> + Status = EFI_SUCCESS;
> + if (IsIortWithSmmu (TableHeader)) {
> +if (!Configuration.EnableSmmu) {
> + Status = EFI_ABORTED;
> +}
> + } else {
> +if (Configuration.EnableSmmu) {
> + Status = EFI_ABORTED;
> +}
> + }
> + DEBUG ((DEBUG_INFO, "SmmuEnable=%x, return %r for Iort table.\n",
> + Configuration.EnableSmmu, Status));
> +
> + return Status;
> +}
> +
> STATIC
> VOID
> RemoveUnusedMemoryNode (
> @@ -151,6 +235,10 @@ UpdateAcpiTable (
>case EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE:
> Status = UpdateSlit (TableHeader);
> break;
> +
Drop this blank line.
/
Leif
> + case EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE:
> +Status = SelectIort (TableHeader);
> +break;
>case EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE:
> Status = IsNeedSpcr (TableHeader);
> break;
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 23/43] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config
On Wed, Aug 22, 2018 at 11:16:26PM +0800, Ming wrote:
>
>
> On 8/22/2018 10:27 PM, Leif Lindholm wrote:
> > On Tue, Aug 14, 2018 at 04:08:43PM +0800, Ming Huang wrote:
> >> Because I2C Port5 salve device connect under I2C extender
> >> (9545 device), it will cost more time to access I2C slave
> >> device, so add delay time for HNS auto config.
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Ming Huang
> >> ---
> >> Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 3 +++
> >> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 21 +++-
> >> 2 files changed, 19 insertions(+), 5 deletions(-)
> >
> > Like previous patch, please change subject line - this affects d03,
> > d05, d06.
> >
> > Silicon/Hisilicon: Add I2CLib delay for HNS auto config
>
> Should this patch reorder before the first D06 patch ?
Yes please.
/
Leif
> >
> >> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> >> b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> >> index fa954c7937..d77aea509e 100644
> >> --- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> >> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> >> @@ -19,6 +19,9 @@
> >> #include
> >> #include
> >>
> >> +// The HNS I2C port 5 is under I2C extender
> >> +#define I2C_EXTENDER_PORT_HNS5
> >> +
> >> #define I2C_READ_TIMEOUT 500
> >> #define I2C_DRV_ONCE_WRITE_BYTES_NUM 8
> >> #define I2C_DRV_ONCE_READ_BYTES_NUM 8
> >> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> >> b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> >> index d67ddc7f9b..59633106ce 100644
> >> --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> >> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> >> @@ -258,8 +258,13 @@ CheckI2CTimeOut (
> >>if (Transfer == I2CTx) {
> >> Fifo = I2C_GetTxStatus (Socket, Port);
> >> while (Fifo != 0) {
> >> - // This is a empirical value for I2C delay. MemoryFance is no need
> >> here.
> >> - I2C_Delay (2);
> >> + if (Port == I2C_EXTENDER_PORT_HNS) {
> >> +// This is a empirical value for I2C delay. MemoryFance is no
> >> need here.
> >
> > MemoryFance ->
> > MemoryFence
> >
> > (You may want to search and replace that on the whole set.)
> >
> > With that:
> > Reviewed-by: Leif Lindholm
>
> Replace they in v4.
> Thanks.
>
> >
> > /
> > Leif
> >
> >> +I2C_Delay (1000);
> >> + } else {
> >> +// This is a empirical value for I2C delay. MemoryFance is no
> >> need here.
> >> +I2C_Delay (2);
> >> + }
> >>if (++Times > I2C_READ_TIMEOUT) {
> >> (VOID)I2C_Disable (Socket, Port);
> >> return EFI_TIMEOUT;
> >> @@ -269,8 +274,13 @@ CheckI2CTimeOut (
> >>} else {
> >> Fifo = I2C_GetRxStatus (Socket, Port);
> >> while (Fifo == 0) {
> >> - // This is a empirical value for I2C delay. MemoryFance is no need
> >> here.
> >> - I2C_Delay (2);
> >> + if (Port == I2C_EXTENDER_PORT_HNS) {
> >> +// This is a empirical value for I2C delay. MemoryFance is no
> >> need here.
> >> +I2C_Delay (1000);
> >> + } else {
> >> +// This is a empirical value for I2C delay. MemoryFance is no
> >> need here.
> >> +I2C_Delay (2);
> >> + }
> >>if (++Times > I2C_READ_TIMEOUT) {
> >> (VOID)I2C_Disable (Socket, Port);
> >> return EFI_TIMEOUT;
> >> @@ -369,7 +379,8 @@ I2CWrite(
> >> Times = 0;
> >> Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
> >> while (Fifo > I2C_TXRX_THRESHOLD) {
> >> - I2C_Delay (2);
> >> + // This is a empirical value for I2C delay. MemoryFance is no need
> >> here.
> >> + I2C_Delay (1000);
> >>if (++Times > I2C_READ_TIMEOUT) {
> >> (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
> >> return EFI_TIMEOUT;
> >> --
> >> 2.17.0
> >>
___
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Re: [edk2] [PATCH edk2-platforms v2 12/43] Platform/Hisilicon/D06: Add edk2-non-osi components for D06
On Wed, Aug 22, 2018 at 10:54:54PM +0800, Ming wrote: > > > On 8/22/2018 5:49 PM, Leif Lindholm wrote: > > On Tue, Aug 14, 2018 at 04:08:32PM +0800, Ming Huang wrote: > >> Add PcdCoreCount to fix build issue while add binary components. > > > > This commit message fails to describe what is being done, apart from a > > single thing that should be a separate patch. > > > > Pleas add a proper commit message describing which components are > > being imported. > > > >> Contributed-under: TianoCore Contribution Agreement 1.1 > >> Signed-off-by: Ming Huang > >> --- > >> Platform/Hisilicon/D06/D06.dsc > >> | 7 +++ > >> Platform/Hisilicon/D06/D06.fdf > >> | 17 + > >> > >> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > >> | 2 ++ > >> 3 files changed, 26 insertions(+) > >> > > > >> diff --git > >> a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > >> > >> b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > >> index 2275586ff3..a47806f391 100644 > >> --- > >> a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > >> +++ > >> b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > >> @@ -28,6 +28,7 @@ > >> > >> [Packages] > >>ArmPkg/ArmPkg.dec > >> + ArmPlatformPkg/ArmPlatformPkg.dec > >>MdePkg/MdePkg.dec > >>MdeModulePkg/MdeModulePkg.dec > >>IntelFrameworkPkg/IntelFrameworkPkg.dec > >> @@ -52,6 +53,7 @@ > >>gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED > >> > >> [Pcd] > >> + gArmPlatformTokenSpaceGuid.PcdCoreCount > >>gHisiTokenSpaceGuid.PcdCPUInfo > >>gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz > > > > And please submit this as a separate patch, explaining why the change > > is needed. If it is only needed by one of the binary modules imported > > as part of the current patch, place it immediately preceding this. > > > > If it resolves some other issue, please insert it as early in the set > > as possible. > > Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620 add a function > which use the PcdCoreCount and the function is used by ProcessorSubClassDxe. > Should I add gArmPlatformTokenSpaceGuid.PcdCoreCount to > Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf > ? > And delete the commit message in this patch ? Yes please - that sounds like the correct solution. / Leif ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS
On 08/22/18 18:34, Gao, Liming wrote:
> Reviewed-by: Liming Gao
Thanks!
> And, push at aa4e0df1f0c7ffdff07d7e382c9da89cbe207cdb
That's very kind of you! Thanks! :)
Laszlo
> Thanks
> Liming
>> -Original Message-
>> From: Laszlo Ersek [mailto:ler...@redhat.com]
>> Sent: Thursday, August 16, 2018 7:38 PM
>> To: edk2-devel-01
>> Cc: Gao, Liming ; Zhu, Yonghong
>>
>> Subject: [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS
>>
>> In commit 81502cee20ac ("BaseTools/Source/C: take EXTRA_LDFLAGS from the
>> caller", 2018-08-16), I missed that "VfrCompile/GNUmakefile" does not use
>> BUILD_LFLAGS in the APPLICATION linking rule, unlike "app.makefile" does.
>> Instead, "VfrCompile/GNUmakefile" uses the (undefined) LFLAGS macro.
>> Therefore commit 81502cee20ac did not cover the linking step of
>> VfrCompile.
>>
>> Thankfully, the structure of the linking rules is the same, between
>> "app.makefile" and "VfrCompile/GNUmakefile". Rename the undefined LFLAGS
>> macro in "VfrCompile/GNUmakefile" to VFR_LFLAGS (for consistency with
>> VFR_CXXFLAGS), and set it to EXTRA_LDFLAGS.
>>
>> As a result, we have:
>>
>> | compilation| linking
>> ---++--
>> VfrCompile | VFR_CXXFLAGS = | VFR_LFLAGS =
>> | BUILD_OPTFLAGS = | EXTRA_LDFLAGS
>> | '-O2' + EXTRA_OPTFLAGS |
>> ---++--
>> other apps | BUILD_CFLAGS/BUILD_CXXFLAGS = | BUILD_LFLAGS =
>> | [...] + BUILD_OPTFLAGS = | [...] + EXTRA_LDFLAGS
>> | [...] + '-O2' + EXTRA_OPTFLAGS |
>>
>> This table shows
>> - that the VfrCompile compilation and linking flags are always a subset of
>> the corresponding flags used by the other apps,
>> - and that the EXTRA flags are always at the end.
>>
>> Cc: Liming Gao
>> Cc: Yonghong Zhu
>> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1540244
>> Fixes: 81502cee20ac4046f08bb4aec754c7091c8808dc
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Laszlo Ersek
>> ---
>>
>> Notes:
>> Repo: https://github.com/lersek/edk2.git
>> Branch: extra_flags_rhbz1540244_round2
>>
>> BaseTools/Source/C/VfrCompile/GNUmakefile | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/BaseTools/Source/C/VfrCompile/GNUmakefile
>> b/BaseTools/Source/C/VfrCompile/GNUmakefile
>> index bbe562cbc54f..9273589ff805 100644
>> --- a/BaseTools/Source/C/VfrCompile/GNUmakefile
>> +++ b/BaseTools/Source/C/VfrCompile/GNUmakefile
>> @@ -28,6 +28,9 @@ VFR_CPPFLAGS = -DPCCTS_USE_NAMESPACE_STD $(BUILD_CPPFLAGS)
>> # keep BUILD_OPTFLAGS last
>> VFR_CXXFLAGS = $(BUILD_OPTFLAGS)
>>
>> +# keep EXTRA_LDFLAGS last
>> +VFR_LFLAGS = $(EXTRA_LDFLAGS)
>> +
>> LINKER = $(BUILD_CXX)
>>
>> EXTRA_CLEAN_OBJECTS = EfiVfrParser.cpp EfiVfrParser.h VfrParser.dlg
>> VfrTokens.h VfrLexer.cpp VfrLexer.h VfrSyntax.cpp tokens.h
>> @@ -42,7 +45,7 @@ APPLICATION = $(MAKEROOT)/bin/$(APPNAME)
>> all: $(MAKEROOT)/bin $(APPLICATION)
>>
>> $(APPLICATION): $(OBJECTS)
>> -$(LINKER) -o $(APPLICATION) $(LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
>> $(LIBS)
>> +$(LINKER) -o $(APPLICATION) $(VFR_LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
>> $(LIBS)
>>
>> VfrCompiler.o: ../Include/Common/BuildVersion.h
>>
>> --
>> 2.14.1.3.gb7cf6e02401b
>
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Re: [edk2] [PATCH edk2-platforms v3 00/36] Upload for D06 platform
On Sat, Aug 18, 2018 at 02:20:49PM +0800, Ming wrote: > > > 在 8/17/2018 8:23 PM, Leif Lindholm 写道: > > Hi Ming, > > > > Please do not send new revisions while I'm still reviewing the > > previous one. It is possible you inferred that I wanted this from some > > comment I made about changes I wanted to see _when_ the next revision > > was sent out, but this was not my meaning. > > If I want a new revision sent out before I have finished reviewing the > > current one, I will ask for it explicitly. > > > > Do however please include a summary of what has changed since the > > previous revision. And keep this summary when you send a subsequent > > patch, so you end up with: > > > > Changes since v3: > > - ... > > - ... > > > > Changes since v2: > > - ... > > - ... > > - ... > > > > Changes since v1: > > - ... > > > > In this instance, it seems like patches 1-7 went missing. > > I pushed 6-7, but 1-5 were still under review. > > Apology for v3. No need to apologise. But now you know how I prefer to handle sets. > I will Add 1-5 back in v4 when you ask for it. Any minute now :) > > And please remember the --stat and --stat-graph-width from > > https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23 > > I format patches using below commands. The diff.order file have configured. > Is it enouth? > git format-patch --stat=1000 --stat-graph-width=20 --cover-letter --no-binary > --subject-prefix="PATCH edk2-platforms" -36 -v 3 -o v3 > git format-patch --stat=1000 --stat-graph-width=20 --cover-letter --no-binary > --subject-prefix="PATCH edk2-non-osi" -2 -v 3 -o v3 Yes, that should be fine. > Changes since v2: > 1 Modify "Wait for all disk ready" patch as communication, update SAS driver > binary also; > 2 Modify OemNicLib, set Mac to 0xFF while eeprom don't contain valid Mac; > 3 Remove .h file from Apei.inf; Yes, I think I addressed all of those in my review. Please include that changeset in the v4 cover letter. Regards, Leif > Thanks. > > > > > I will continue reviewing v2. > > Please do not send a v4 until I ask for it. > > > > Regards, > > > > Leif > > > > On Thu, Aug 16, 2018 at 08:12:03PM +0800, Ming Huang wrote: > >> The major features of this patchset include: > >> 1 D06 source code; > >> 2 Unify some D0x modules; > >> > >> This patch set is base on pcihostbridage-v2. > >> For compiling D06, add below hunk to edk2-platforms.config > >> [d06] > >> LONGNAME=HiSilicon D06 > >> DSC=Platform/Hisilicon/D06/D06.dsc > >> ARCH=AARCH64 > >> > >> Code can also be found in github: > >> https://github.com/hisilicon/OpenPlatformPkg.git > >> branch: d06-platform-v3 > >> > >> > >> Heyi Guo (3): > >> Hisilicon/D06: Add Debug Serial Port Init Driver > >> Hisilicon/Hi1620: Add ACPI PPTT table > >> Platform/Hisilicon/D06: Enable ACPI PPTT > >> > >> Luqi Jiang (1): > >> Hisilicon/D06: add apei driver > >> > >> Ming Huang (27): > >> Hisilicon/D0x: Unify FlashFvbDxe driver > >> Hisilicon/D0X: Rename the global variable gDS3231RtcDevice > >> Hisilicon/D06: Add several base file for D06 > >> Platform/Hisilicon/D06: Add M41T83RealTimeClockLib > >> Platform/Hisilicon/D06: Add edk2-non-osi components for D06 > >> Hisilicon/D06: Add OemMiscLibD06 > >> Silicon/Hisilicon/D06: Wait for all disk ready > >> Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe > >> Hisilicon/D06: Add ACPI Tables for D06 > >> Silicon/Hisilicon/D06: Stop watchdog > >> Hisilicon/I2C: Modify I2CLib.c for coding style > >> Silicon/Hisilicon/I2C: Refactor I2C library > >> Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 > >> Silicon/Hisilicon/D06: Add I2C delay for HNS auto config > >> Hisilicon/I2C: Fix a typo issue > >> Platform/Hisilicon/D06: Add OemNicLib > >> Platform/Hisilicon/D06: Add OemNicConfig2P Driver > >> Platform/Hisilicon/D06: Add EarlyConfigPeim peim > >> Platform/Hisilicon/D06: Add PciHostBridgeLib > >> Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h > >> Platform/Hisilicon/D06: Add capsule upgrade support > >> Silicon/Hisilicon/D06: Add I2C Bus Exception handle function > >> Silicon/Hisilicon/Setup: Support SPCR table switch > >> Silicon/Hisilicon/setup: Support SMMU switch > >> Hisilicon/D06: Add PciPlatformLib > >> Hisilicon/D06: Add edk2-non-osi Shell components > >> Platform/Hisilicon/D0x: Update version string to 18.08 > >> > >> Sun Yuanchen (1): > >> Hisilicon/D0x: Update SMBIOS type9 info > >> > >> Yang XinYi (2): > >> Hisilicon/D06: Add Hi1620OemConfigUiLib > >> Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" > >> > >> ZhenYao (1): > >> Silicon/Hisilicon/D06: Modify for close slave core clock. > >> > >> shaochangliang (1): > >> Silicon/Hisilicon/D06: Optimize HNS config CDR post time > >> > >> Platform/Hisilicon/D06/D06.dec|29 + > >> Silicon/Hisilicon/HisiPkg.dec | 6 + > >> Platform/Hisilicon/D03/D03.dsc
Re: [edk2] [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS
Reviewed-by: Liming Gao
And, push at aa4e0df1f0c7ffdff07d7e382c9da89cbe207cdb
Thanks
Liming
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, August 16, 2018 7:38 PM
> To: edk2-devel-01
> Cc: Gao, Liming ; Zhu, Yonghong
> Subject: [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS
>
> In commit 81502cee20ac ("BaseTools/Source/C: take EXTRA_LDFLAGS from the
> caller", 2018-08-16), I missed that "VfrCompile/GNUmakefile" does not use
> BUILD_LFLAGS in the APPLICATION linking rule, unlike "app.makefile" does.
> Instead, "VfrCompile/GNUmakefile" uses the (undefined) LFLAGS macro.
> Therefore commit 81502cee20ac did not cover the linking step of
> VfrCompile.
>
> Thankfully, the structure of the linking rules is the same, between
> "app.makefile" and "VfrCompile/GNUmakefile". Rename the undefined LFLAGS
> macro in "VfrCompile/GNUmakefile" to VFR_LFLAGS (for consistency with
> VFR_CXXFLAGS), and set it to EXTRA_LDFLAGS.
>
> As a result, we have:
>
> | compilation| linking
> ---++--
> VfrCompile | VFR_CXXFLAGS = | VFR_LFLAGS =
> | BUILD_OPTFLAGS = | EXTRA_LDFLAGS
> | '-O2' + EXTRA_OPTFLAGS |
> ---++--
> other apps | BUILD_CFLAGS/BUILD_CXXFLAGS = | BUILD_LFLAGS =
> | [...] + BUILD_OPTFLAGS = | [...] + EXTRA_LDFLAGS
> | [...] + '-O2' + EXTRA_OPTFLAGS |
>
> This table shows
> - that the VfrCompile compilation and linking flags are always a subset of
> the corresponding flags used by the other apps,
> - and that the EXTRA flags are always at the end.
>
> Cc: Liming Gao
> Cc: Yonghong Zhu
> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1540244
> Fixes: 81502cee20ac4046f08bb4aec754c7091c8808dc
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Laszlo Ersek
> ---
>
> Notes:
> Repo: https://github.com/lersek/edk2.git
> Branch: extra_flags_rhbz1540244_round2
>
> BaseTools/Source/C/VfrCompile/GNUmakefile | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/BaseTools/Source/C/VfrCompile/GNUmakefile
> b/BaseTools/Source/C/VfrCompile/GNUmakefile
> index bbe562cbc54f..9273589ff805 100644
> --- a/BaseTools/Source/C/VfrCompile/GNUmakefile
> +++ b/BaseTools/Source/C/VfrCompile/GNUmakefile
> @@ -28,6 +28,9 @@ VFR_CPPFLAGS = -DPCCTS_USE_NAMESPACE_STD $(BUILD_CPPFLAGS)
> # keep BUILD_OPTFLAGS last
> VFR_CXXFLAGS = $(BUILD_OPTFLAGS)
>
> +# keep EXTRA_LDFLAGS last
> +VFR_LFLAGS = $(EXTRA_LDFLAGS)
> +
> LINKER = $(BUILD_CXX)
>
> EXTRA_CLEAN_OBJECTS = EfiVfrParser.cpp EfiVfrParser.h VfrParser.dlg
> VfrTokens.h VfrLexer.cpp VfrLexer.h VfrSyntax.cpp tokens.h
> @@ -42,7 +45,7 @@ APPLICATION = $(MAKEROOT)/bin/$(APPNAME)
> all: $(MAKEROOT)/bin $(APPLICATION)
>
> $(APPLICATION): $(OBJECTS)
> - $(LINKER) -o $(APPLICATION) $(LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
> $(LIBS)
> + $(LINKER) -o $(APPLICATION) $(VFR_LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
> $(LIBS)
>
> VfrCompiler.o: ../Include/Common/BuildVersion.h
>
> --
> 2.14.1.3.gb7cf6e02401b
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Re: [edk2] [Patch] BaseTools: Update Makefile for ECC tool
Reviewed-by: Liming Gao > -Original Message- > From: Zhu, Yonghong > Sent: Wednesday, August 22, 2018 1:41 AM > To: edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: [Patch] BaseTools: Update Makefile for ECC tool > > Because Ecc.py was renamed to EccMain.py > > Cc: Liming Gao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Yonghong Zhu > --- > BaseTools/Source/Python/Makefile | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/BaseTools/Source/Python/Makefile > b/BaseTools/Source/Python/Makefile > index d78b12d..36e8b20 100644 > --- a/BaseTools/Source/Python/Makefile > +++ b/BaseTools/Source/Python/Makefile > @@ -234,11 +234,11 @@ CMD_ECC=$(BASE_TOOLS_PATH)\Source\Python\Ecc\c.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragment.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragmentCollector.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\Configuration.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\CParser.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\Database.py \ > -$(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py \ > +$(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccGlobalData.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccToolError.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\Exception.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\FileProfile.py \ > $(BASE_TOOLS_PATH)\Source\Python\Ecc\MetaDataParser.py \ > @@ -294,12 +294,12 @@ $(BIN_DIR)\TestSigningPrivateKey.pem: > $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sh >@copy /Y /B > $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\TestSigningPrivateKey.pem > $(BIN_DIR)\TestSigningPrivateKey.pem > > $(BIN_DIR)\Rsa2048Sha256GenerateKeys.exe: > $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py >@$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) > Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py > > -$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py $(CMD_ECC) > $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml > - @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Ecc\Ecc.py > +$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py > $(CMD_ECC) $(BIN_DIR)\config.ini > $(BIN_DIR)\exception.xml > + @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) > Ecc\EccMain.py > > $(BIN_DIR)\config.ini: $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini >@copy /Y /B $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini > $(BIN_DIR)\config.ini > > $(BIN_DIR)\exception.xml: $(BASE_TOOLS_PATH)\Source\Python\Ecc\exception.xml > -- > 2.6.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 41/43] Hisilicon/D06: Add PciPlatformLib
On Tue, Aug 14, 2018 at 04:09:01PM +0800, Ming Huang wrote:
> Add a Null PciPlatformLib for build D06. The switch generic
> PciHostBridge patch set add two api for PciPlatform driver,
> so need to implement the two api for D06.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
Reviewed-by: Leif Lindholm
> ---
> Platform/Hisilicon/D06/D06.dsc
> | 1 +
>
> Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
> | 30 +
> Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
> | 67
> 3 files changed, 98 insertions(+)
>
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index fad6fcc747..053ea894d5 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -95,6 +95,7 @@
>FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> !endif
>PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
> +
> PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
>
> [LibraryClasses.common.SEC]
>
> ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
> diff --git
> a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
>
> b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
> new file mode 100644
> index 00..7648322522
> --- /dev/null
> +++
> b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
> @@ -0,0 +1,30 @@
> +## @file
> +# PCI Segment Library for Hisilicon Hi1610/Hi1616 SoC with multiple RCs
> +#
> +# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
> +# Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
> +# Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD
> License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php.
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +#
> +#
> +##
> +
> +[Defines]
> + INF_VERSION= 0x0001001A
> + BASE_NAME = Hi1620PciPlatformLib
> + FILE_GUID = 29ba30da-68bc-46a5-888f-c65dabb67fd8
> + MODULE_TYPE= BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PciPlatformLib
> +
> +[Sources]
> + Hi1620PciPlatformLib.c
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> diff --git
> a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
>
> b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
> new file mode 100644
> index 00..ff77974c0f
> --- /dev/null
> +++
> b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
> @@ -0,0 +1,67 @@
> +/** @file
> +*
> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#include
> +#include
> +
> +
> +/*++
> +
> +Routine Description:
> +
> + Perform Platform initialization first in PciPlatform.
> +
> +Arguments:
> +
> +Returns:
> +
> + VOID.
> +
> +--*/
> +VOID
> +EFIAPI
> +PciInitPlatform (
> + VOID
> + )
> +{
> + return;
> +}
> +
> +/*++
> +
> +Routine Description:
> +
> + Perform Platform initialization by the phase indicated.
> +
> +Arguments:
> +
> + HostBridge- The associated PCI host bridge handle.
> + Phase - The phase of the PCI controller enumeration.
> + ChipsetPhase - Defines the execution phase of the PCI chipset driver.
> +
> +Returns:
> +
> +--*/
> +VOID
> +EFIAPI
> +PhaseNotifyPlatform (
> + IN EFI_HANDLE HostBridge,
> + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
> + IN EFI_PCI_CHIPSET_EXECUTION_PHASEChipsetPhase
> + )
> +{
> + return;
> +}
> +
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 43/43] Platform/Hisilicon/D0x: Update version string to 18.08
On Tue, Aug 14, 2018 at 04:09:03PM +0800, Ming Huang wrote: > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm > --- > Platform/Hisilicon/D03/D03.dsc | 2 +- > Platform/Hisilicon/D05/D05.dsc | 2 +- > Platform/Hisilicon/D06/D06.dsc | 4 ++-- > 3 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc > index c12790ba59..add15b7f93 100644 > --- a/Platform/Hisilicon/D03/D03.dsc > +++ b/Platform/Hisilicon/D03/D03.dsc > @@ -174,7 +174,7 @@ >!ifdef $(FIRMWARE_VER) > > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" >!else > -gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development > build 18.02 for Hisilicon D03" > +gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development > build 18.08 for Hisilicon D03" >!endif > >gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index 94d386582e..76c0bd421e 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -192,7 +192,7 @@ >!ifdef $(FIRMWARE_VER) > > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" >!else > -gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development > build 18.02 for Hisilicon D05" > +gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development > build 18.08 for Hisilicon D05" >!endif > >gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index 544039e450..09197922ad 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -165,12 +165,12 @@ >!ifdef $(FIRMWARE_VER) > > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" >!else > -gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D06 > UEFI RC0 - B308 (V0.38)" > +gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development > build 18.08 for Hisilicon D06" >!endif > >gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" > > - gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.38" > + gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.42" > >gHisiTokenSpaceGuid.PcdSystemProductName|L"D06" >gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A" > -- > 2.17.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 38/43] Silicon/Hisilicon/D06: Add I2C Bus Exception handle function
On Tue, Aug 14, 2018 at 04:08:58PM +0800, Ming Huang wrote: > During the period of I2c accessing, if the board is reset > unexpectedly, and because the I2c client can not reset, > the SDA will be always pull down, then it cause I2C bus > Exception. > > Follow the Hi1620 I2C FS chapter 1.8.2 design, add I2C > Bus Exception handle function. It will Config SCL and SDA > to GPIO, and set the reversal frequency of SCL to 10KHz. > > The implementation of functions is in edk2-non-osi. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang This change is not in Silicon/Hisilicon/D06, please fix the subject line. / Leif > --- > Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > index 3ccfc6bee3..a232e52ed7 100644 > --- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > +++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > @@ -106,4 +106,7 @@ VOID DisableClusterClock(UINTN CpuClusterBase); > VOID EnableClusterClock(UINTN CpuClusterBase); > VOID DisableSocketClock (UINT8 Skt); > > +EFI_STATUS EFIAPI HandleI2CException (UINT32 Socket, UINT32 Port); > +EFI_STATUS EFIAPI HandleI2CExceptionBySocket (UINT32 Socket); > + > #endif > -- > 2.17.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 37/43] Silicon/Hisilicon/D06: Modify for close slave core clock.
On Tue, Aug 14, 2018 at 04:08:57PM +0800, Ming Huang wrote: > From: ZhenYao > > When BIOS booting, the power consumption is too high, so need close > some clusters clock that don't work to reduce power consumption. > > The implementation of functions is in edk2-non-osi. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: ZhenYao This patch is not in Silicon/Hisilicon/D06. Fix the subject please. > --- > Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > index ec2b9a36e7..3ccfc6bee3 100644 > --- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > +++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > @@ -102,5 +102,8 @@ VOID PlatformEventBroadcastConfig(VOID); > UINTN GetDjtagRegBase(UINT32 NodeId); > VOID LlcCleanInvalidateAsm(VOID); > VOID PlatformMdioInit(VOID); > +VOID DisableClusterClock(UINTN CpuClusterBase); > +VOID EnableClusterClock(UINTN CpuClusterBase); > +VOID DisableSocketClock (UINT8 Skt); > > #endif > -- > 2.17.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 34/43] Hisilicon/D06: add apei driver
On Tue, Aug 14, 2018 at 04:08:54PM +0800, Ming Huang wrote: > From: Luqi Jiang > > This driver provide a means for the platform to > convey error information to OSPM. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Luqi Jiang > --- > Platform/Hisilicon/D06/D06.dsc | 1 + > Platform/Hisilicon/D06/D06.fdf | 1 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 64 > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 41 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h| 43 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h| 146 > Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 110 ++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h| 146 > Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h| 59 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h| 43 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 108 ++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c| 92 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c| 349 > ++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 330 > + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c| 374 > > Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c| 119 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c| 337 > ++ > 17 files changed, 2363 insertions(+) OK, so I was a bit terse in my original comment. But all of these files need to be named approprietly - with an upper-case first letter. bert.h -> Bert.h einj.h -> Einj.h and so on. More comments inline. > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index c6de9f04ad..9550e0d497 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -340,6 +340,7 @@ >Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > + Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf ># ># Usb Support > diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf > index bd3ea47226..90379b8558 100644 > --- a/Platform/Hisilicon/D06/D06.fdf > +++ b/Platform/Hisilicon/D06/D06.fdf > @@ -251,6 +251,7 @@ READ_LOCK_STATUS = TRUE > >INF RuleOverride=ACPITABLE > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > + INF Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > >INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > new file mode 100644 > index 00..7a75968da1 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > @@ -0,0 +1,64 @@ > +/** @file > +* > +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2018, Linaro Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD > License > +* which accompanies this distribution. The full text of the license may be > found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > +* > +**/ > + > +[defines] > + INF_VERSION= 0x0001001A > + BASE_NAME = AcpiApei > + FILE_GUID = E9570C39-EF68-4fc6-B921-C1954A87CCD2 > + MODULE_TYPE= DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT= ApeiEntryPoint > + > +[sources.common] > + Apei.c > + Bert/bert.c > + Bert/bert.h > + Einj/einj.c > + Einj/einj.h > + Erst/erst.c > + Erst/erst.h > + Hest/hest.c > + Hest/hest.h > + ErrorSource/Ghes.c > + ErrorSource/Ghes.h > + OemApeiHi1620.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + MdePkg/MdePkg.dec > + Silicon/Hisilicon/HisiPkg.dec > + > +[LibraryClasses] > + ArmSmcLib > + BaseMemoryLib > + DebugLib > + HobLib > + TimerLib > + UefiDriverEntryPoint > + UefiRuntimeServicesTableLib > + > +[Guids] > + gOemConfigGuid > + > +[Protocols] > + gEfiAcpiSdtProtocolGuid > + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED > + > +[Pcd] > + gHisiTokenSpaceGuid.PcdCpldBaseAddress > + gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable > + > +[Depex] > + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > new file mode 100644 > index
Re: [edk2] [PATCH edk2-platforms v2 23/43] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config
On 8/22/2018 10:27 PM, Leif Lindholm wrote:
> On Tue, Aug 14, 2018 at 04:08:43PM +0800, Ming Huang wrote:
>> Because I2C Port5 salve device connect under I2C extender
>> (9545 device), it will cost more time to access I2C slave
>> device, so add delay time for HNS auto config.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang
>> ---
>> Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 3 +++
>> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 21 +++-
>> 2 files changed, 19 insertions(+), 5 deletions(-)
>
> Like previous patch, please change subject line - this affects d03,
> d05, d06.
>
> Silicon/Hisilicon: Add I2CLib delay for HNS auto config
Should this patch reorder before the first D06 patch ?
>
>> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
>> b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
>> index fa954c7937..d77aea509e 100644
>> --- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
>> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
>> @@ -19,6 +19,9 @@
>> #include
>> #include
>>
>> +// The HNS I2C port 5 is under I2C extender
>> +#define I2C_EXTENDER_PORT_HNS5
>> +
>> #define I2C_READ_TIMEOUT 500
>> #define I2C_DRV_ONCE_WRITE_BYTES_NUM 8
>> #define I2C_DRV_ONCE_READ_BYTES_NUM 8
>> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
>> b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
>> index d67ddc7f9b..59633106ce 100644
>> --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
>> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
>> @@ -258,8 +258,13 @@ CheckI2CTimeOut (
>>if (Transfer == I2CTx) {
>> Fifo = I2C_GetTxStatus (Socket, Port);
>> while (Fifo != 0) {
>> - // This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> - I2C_Delay (2);
>> + if (Port == I2C_EXTENDER_PORT_HNS) {
>> +// This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>
> MemoryFance ->
> MemoryFence
>
> (You may want to search and replace that on the whole set.)
>
> With that:
> Reviewed-by: Leif Lindholm
Replace they in v4.
Thanks.
>
> /
> Leif
>
>> +I2C_Delay (1000);
>> + } else {
>> +// This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> +I2C_Delay (2);
>> + }
>>if (++Times > I2C_READ_TIMEOUT) {
>> (VOID)I2C_Disable (Socket, Port);
>> return EFI_TIMEOUT;
>> @@ -269,8 +274,13 @@ CheckI2CTimeOut (
>>} else {
>> Fifo = I2C_GetRxStatus (Socket, Port);
>> while (Fifo == 0) {
>> - // This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> - I2C_Delay (2);
>> + if (Port == I2C_EXTENDER_PORT_HNS) {
>> +// This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> +I2C_Delay (1000);
>> + } else {
>> +// This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> +I2C_Delay (2);
>> + }
>>if (++Times > I2C_READ_TIMEOUT) {
>> (VOID)I2C_Disable (Socket, Port);
>> return EFI_TIMEOUT;
>> @@ -369,7 +379,8 @@ I2CWrite(
>> Times = 0;
>> Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
>> while (Fifo > I2C_TXRX_THRESHOLD) {
>> - I2C_Delay (2);
>> + // This is a empirical value for I2C delay. MemoryFance is no need
>> here.
>> + I2C_Delay (1000);
>>if (++Times > I2C_READ_TIMEOUT) {
>> (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
>> return EFI_TIMEOUT;
>> --
>> 2.17.0
>>
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Re: [edk2] [PATCH edk2-platforms v2 18/43] Hisilicon/D06: Add Hi1620OemConfigUiLib
On 8/22/2018 10:14 PM, Leif Lindholm wrote:
> On Tue, Aug 14, 2018 at 04:08:38PM +0800, Ming Huang wrote:
>> From: Yang XinYi
>>
>> This library is added for oem setup menu item.
>> Setup item include:
>> 1 DDR option item;
>> 2 BMC option item;
>> 3 Ras option item;
>> 4 Misc option item;
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Yang XinYi
>> ---
>> Silicon/Hisilicon/HisiPkg.dec |
>> 1 +
>> Platform/Hisilicon/D06/D06.dsc |
>> 5 +-
>> Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf |
>> 2 +-
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf|
>> 68
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h |
>> 142
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h |
>> 64
>> Silicon/Hisilicon/Include/Library/OemConfigData.h |
>> 84 +
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c |
>> 363
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr |
>> 154 +
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni |
>> 103 ++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr|
>> 41 +++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni|
>> 27 ++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni|
>> 24 ++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni |
>> 42 +++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr |
>> 89 +
>
> Ah, I didn't spot thie before - but can you please rename this one
> from
> .Vfr to
> .vfr
>
> to align with the others?
OK, do it in v4.
>
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr|
>> 219
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |
>> 111 ++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr|
>> 167 +
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr |
>> 172 ++
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni |
>> 85 +
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr|
>> 81 +
>> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni|
>> 34 ++
>> 22 files changed, 2076 insertions(+), 2 deletions(-)
>>
>> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
>> index b56a6a6af7..858b840a57 100644
>> --- a/Silicon/Hisilicon/HisiPkg.dec
>> +++ b/Silicon/Hisilicon/HisiPkg.dec
>> @@ -44,6 +44,7 @@
>>gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87,
>> 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>>
>>gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd,
>> 0x56, 0xda, 0x91, 0xc0, 0x7f}}
>> + gOemConfigGuid = {0x42927b59, 0x58fc, 0x41be, {0x8f, 0x59, 0xd1, 0x7c,
>> 0x02, 0x1a, 0x70, 0x13}}
>>gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe,
>> 0xe1, 0x42, 0x12, 0xbf}}
>>gHisiOemVariableGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 0xc5,
>> 0x80, 0x32, 0x7d, 0x9b, 0x29}}
>>gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4,
>> 0xa4, 0x2f, 0x45, 0x06, 0xf8}}
>> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
>> index 9d4a86a4f4..bec422670d 100644
>> --- a/Platform/Hisilicon/D06/D06.dsc
>> +++ b/Platform/Hisilicon/D06/D06.dsc
>> @@ -330,7 +330,10 @@
>>#ACPI
>>#
>>MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>> - Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> + Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf {
>> +
>> +NULL|Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
>> + }
>>
>>Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
>>Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> diff --git
>> a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> index e268a56bbd..281a4f2ebd 100644
>> --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> @@ -56,7 +56,7 @@
>>gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile## CONSUMES
>>
>> [Depex]
>> - gEfiAcpiTableProtocolGuid
>> + gEfiAcpiTableProtocolGuid AND gEfiVariableWriteArchProtocolGuid
>>
>> [UserExtensions.TianoCore."ExtraFiles"]
>>AcpiPlatformExtra.uni
>> diff --git
>> a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
>>
Re: [edk2] [PATCH edk2-platforms v2 33/43] Platform/Hisilicon/D06: Add PciHostBridgeLib
On Tue, Aug 14, 2018 at 04:08:53PM +0800, Ming Huang wrote: > PciHostBridgeLib which is need by PciHostBridgeDxe, provide > root bridges and deal with resource conflict. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang All of my comments from v1 have been addressed. Reviewed-by: Leif Lindholm / Leif > --- > Platform/Hisilicon/D06/D06.dsc | 2 +- > Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 36 ++ > Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c | 635 > > 3 files changed, 672 insertions(+), 1 deletion(-) ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 32/43] Platform/Hisilicon/D06: Add EarlyConfigPeim peim
On Tue, Aug 14, 2018 at 04:08:52PM +0800, Ming Huang wrote:
> This peim configuare SMMU,BSP,MN(Miscellaneous Node).
configuare still needs to change to
configures
With that change:
Reviewed-by: Leif Lindholm
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Platform/Hisilicon/D06/D06.dsc| 1 +
> Platform/Hisilicon/D06/D06.fdf| 1 +
> Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 +
> Silicon/Hisilicon/Include/Library/OemAddressMapLib.h | 2 +
> Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 107
>
> 5 files changed, 161 insertions(+)
>
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index 5571028f42..3de09ea870 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -263,6 +263,7 @@
>MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>
> + Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
>Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>
>MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
> index 184d5d4dcf..bd3ea47226 100644
> --- a/Platform/Hisilicon/D06/D06.fdf
> +++ b/Platform/Hisilicon/D06/D06.fdf
> @@ -359,6 +359,7 @@ READ_LOCK_STATUS = TRUE
>INF ArmPkg/Drivers/CpuPei/CpuPei.inf
>INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
>INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
> + INF Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
>
>INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
> b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
> new file mode 100644
> index 00..8296ee02de
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
> @@ -0,0 +1,50 @@
> +#/** @file
> +#
> +#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +#Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +#This program and the accompanying materials
> +#are licensed and made available under the terms and conditions of the
> BSD License
> +#which accompanies this distribution. The full text of the license may
> be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +#
> +#**/
> +
> +
> +[Defines]
> + INF_VERSION= 0x0001001A
> + BASE_NAME = EarlyConfigPeimD06
> + FILE_GUID = FB8C65EB-0199-40C3-A82B-029921A9E9B3
> + MODULE_TYPE= PEIM
> + VERSION_STRING = 1.0
> + ENTRY_POINT= EarlyConfigEntry
> +
> +[Sources.common]
> + EarlyConfigPeimD06.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + ArmLib
> + CacheMaintenanceLib
> + DebugLib
> + IoLib
> + PcdLib
> + PeimEntryPoint
> + PlatformSysCtrlLib
> +
> +[Pcd]
> + gHisiTokenSpaceGuid.PcdMailBoxAddress
> + gHisiTokenSpaceGuid.PcdPeriSubctrlAddress
> + gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable
> +
> +[Depex]
> +## As we will clean mailbox in this module, need to wait memory init complete
> + gEfiPeiMemoryDiscoveredPpiGuid
> diff --git a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
> b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
> index 332a79343f..b330be09ba 100644
> --- a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
> +++ b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
> @@ -16,6 +16,8 @@
> #ifndef _OEM_ADDRESS_MAP_LIB_H_
> #define _OEM_ADDRESS_MAP_LIB_H_
>
> +#include "PlatformArch.h"
> +
> typedef struct _DDRC_BASE_ID{
> UINTN Base;
> UINTN Id;
> diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
> b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
> new file mode 100644
> index 00..0790f7941a
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
> @@ -0,0 +1,107 @@
> +/** @file
> +*
> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS
Re: [edk2] [PATCH edk2-platforms v3 07/36] Silicon/Hisilicon/D06: Wait for all disk ready
On 8/22/2018 6:25 PM, Leif Lindholm wrote:
> (Commenting on the v3 patch since I know it supersedes the v2 patch.)
>
> On Thu, Aug 16, 2018 at 08:12:10PM +0800, Ming Huang wrote:
>> This patch is relative to D06 SasDxe driver. The SasDxe set a
>> variable to notice this libray. Here Wait for all disk ready
>> for 15S at most.
>>
>> D06:
>> For using straight-through hard disk backboard, some disk need
>> 15 seconds to ready. Actually, wait less 15 seconds here(minus
>> the time from end of SAS driver to here).
>> For using expander backboard, wait less 6 seconds here(minus
>> the time from end of SAS driver to here).
>>
>> D03/D05:
>> As Sas driver don't install PLATFORM_SAS_NOTIFY Protocol, D03/D05
>> will skip waiting here.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang
>> ---
>> Silicon/Hisilicon/HisiPkg.dec
>> | 1 +
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> | 3 ++
>> Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
>> | 27 ++
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> | 37
>> 4 files changed, 68 insertions(+)
>>
>> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
>> index 35bea970ec..0595790df8 100644
>> --- a/Silicon/Hisilicon/HisiPkg.dec
>> +++ b/Silicon/Hisilicon/HisiPkg.dec
>> @@ -39,6 +39,7 @@
>>gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93,
>> 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
>>gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93,
>> 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>>gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97,
>> 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
>> + gPlatformSasNotifyProtocolGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff,
>> 0x5c, 0xc5, 0x80, 0x32, 0x7d, 0x9b, 0x29}}
>
> Ideally, I would like to see a new package declaration file added in
> edk2-non-osi/Silicon/Hisilicon. Maybe HisiliconNonOsi.dec. And this
> guid added there.
>
>>
>> [Guids]
>>gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87,
>> 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>> diff --git
>> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>>
>> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> index 7a53befc44..96a46da8c5 100644
>> ---
>> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> +++
>> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> @@ -49,6 +49,7 @@
>>MemoryAllocationLib
>>PcdLib
>>PrintLib
>> + TimerLib
>>UefiBootManagerLib
>>UefiBootServicesTableLib
>>UefiLib
>> @@ -67,8 +68,10 @@
>> [Guids]
>>gEfiEndOfDxeEventGroupGuid
>>gEfiTtyTermGuid
>> + gOemConfigGuid
>>
>> [Protocols]
>>gEfiGenericMemTestProtocolGuid
>>gEfiLoadedImageProtocolGuid
>>gEsrtManagementProtocolGuid
>> + gPlatformSasNotifyProtocolGuid
>> diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
>> b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
>> new file mode 100644
>> index 00..54fd30fc68
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
>
> And similarly, this file added under
> edk2-non-osi/Silicon/Hisilicon/Include/Protocol.
>
> Other than that, I am happy with this patch.
>
> (Yes, I know we have not enforced this in the past, but it is way
> cleaner and makes API-updates a single patch in a single repository.)
OK, do it in v4.
Thanks.
>
> /
> Leif
>
>> @@ -0,0 +1,27 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the
>> BSD License
>> +* which accompanies this distribution. The full text of the license may
>> be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
>> IMPLIED.
>> +*
>> +**/
>> +
>> +#ifndef _PLATFORM_SAS_NOTIFY_H_
>> +#define _PLATFORM_SAS_NOTIFY_H_
>> +
>> +typedef struct _PLATFORM_SAS_NOTIFY PLATFORM_SAS_NOTIFY;
>> +
>> +struct _PLATFORM_SAS_NOTIFY {
>> + EFI_EVENT WaitDiskEvent;
>> +};
>> +
>> +extern EFI_GUID gPlatformSasNotifyProtocolGuid;
>> +
>> +#endif
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> index 7dd5ba615c..eaa6ce78d0 100644
>> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> @@
Re: [edk2] [PATCH edk2-platforms v2 31/43] Hisilicon/D0x: Update SMBIOS type9 info
On Tue, Aug 14, 2018 at 04:08:51PM +0800, Ming Huang wrote:
> From: Sun Yuanchen
>
> Move board level code to OemMiscLibD0x for unifying D0x.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sun Yuanchen
> ---
> Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 +
> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 1 +
> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf | 4 +
> Platform/Hisilicon/D06/Include/Library/CpldD06.h | 2 +
> Silicon/Hisilicon/Include/Library/OemMiscLib.h | 1 +
> Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 24
> ++
> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27
> +-
> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 90
>
> Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +--
> 9 files changed, 151 insertions(+), 13 deletions(-)
>
> diff --git
> a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
> b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
> index 310bbaea84..0fa7fdf80f 100644
> --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
> +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
> @@ -34,6 +34,7 @@
>Silicon/Hisilicon/HisiPkg.dec
>
> [LibraryClasses]
> + BaseMemoryLib
>PcdLib
>TimerLib
>
> diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
> b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
> index bf44ff7440..022c3e940a 100644
> --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
> +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
> @@ -33,6 +33,7 @@
>Silicon/Hisilicon/HisiPkg.dec
>
> [LibraryClasses]
> + BaseMemoryLib
>PcdLib
>TimerLib
>
> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
> b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
> index 8f68f7cec5..bd984a6fe3 100644
> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
> @@ -30,9 +30,13 @@
>ArmPkg/ArmPkg.dec
>MdeModulePkg/MdeModulePkg.dec
>MdePkg/MdePkg.dec
> + Platform/Hisilicon/D06/D06.dec
>Silicon/Hisilicon/HisiPkg.dec
>
> [LibraryClasses]
> + BaseMemoryLib
> + CpldIoLib
> + IoLib
>PcdLib
>SerdesLib
>TimerLib
> diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
> b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
> index be3548c8d1..ec9b49f4e7 100644
> --- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
> +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
> @@ -29,6 +29,8 @@
> #define CPLD_LOGIC_COMPILE_DAY (0x3)
>
> #define CPLD_RISER_PRSNT_FLAG 0x40
> +#define CPU1_RISER_PRESENTBIT6
> +#define CPU0_RISER_PRESENTBIT7
> #define CPLD_RISER2_BOARD_ID 0x44
>
> #define CPLD_X8_X8_X8_BOARD_ID0x92
> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
> b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
> index efecb9aa77..86ea6a1b3d 100644
> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
> @@ -34,6 +34,7 @@ typedef struct _REPORT_PCIEDIDVID2BMC{
> UINTN Slot;
> }REPORT_PCIEDIDVID2BMC;
> extern REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX];
> +extern VOID GetPciDidVid (REPORT_PCIEDIDVID2BMC *Report);
>
> BOOLEAN OemIsSocketPresent (UINTN Socket);
> VOID CoreSelectBoot(VOID);
> diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
> b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
> index fa1039bda1..c80500276f 100644
> --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
> +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
> @@ -15,6 +15,7 @@
>
> #include
>
> +#include
> #include
> #include
> #include
> @@ -31,6 +32,29 @@ REPORT_PCIEDIDVID2BMC
> PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
>{0x,0x,0x,0x}
> };
>
> +REPORT_PCIEDIDVID2BMC PcieDeviceToReport_2P[PCIEDEVICE_REPORT_MAX] = {
Should really drop that _ from the variable name.
> + {0x79,0,0,0},
> + {0xFF,0xFF,0xFF,1},
> + {0xC1,0,0,2},
> + {0xF9,0,0,3},
> + {0xFF,0xFF,0xFF,4},
> + {0x11,0,0,5},
> + {0x31,0,0,6},
> + {0x21,0,0,7}
> +};
> +
> +VOID
> +GetPciDidVid (
> + REPORT_PCIEDIDVID2BMC *Report
> + )
> +{
> + if (OemIsMpBoot ()) {
> +(VOID)CopyMem ((VOID *)Report, (VOID *)PcieDeviceToReport_2P, sizeof
> (PcieDeviceToReport_2P));
> + } else {
> +(VOID)CopyMem ((VOID *)Report, (VOID *)PcieDeviceToReport, sizeof
> (PcieDeviceToReport));
I think these lines got longer from v1?
Please wrap.
With
Re: [edk2] [PATCH edk2-platforms v2 30/43] Platform/Hisilicon/D06: Add OemNicConfig2P Driver
On Tue, Aug 14, 2018 at 04:08:50PM +0800, Ming Huang wrote:
> This Driver provide Get/Set Mac function.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
Reviewed-by: Leif Lindholm
> ---
> Platform/Hisilicon/D06/D06.dsc | 2
> +-
> Platform/Hisilicon/D06/D06.fdf | 2
> +-
> Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf | 43
>
> Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h | 25
> +++
> Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c | 71
>
> 5 files changed, 141 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index e18badf3b3..5571028f42 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -285,7 +285,7 @@
>#
>ArmPkg/Drivers/CpuDxe/CpuDxe.inf
>MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> -
> + Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
>
> !if $(SECURE_BOOT_ENABLE) == TRUE
>MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
> index 5bb779d2e4..184d5d4dcf 100644
> --- a/Platform/Hisilicon/D06/D06.fdf
> +++ b/Platform/Hisilicon/D06/D06.fdf
> @@ -174,7 +174,7 @@ READ_LOCK_STATUS = TRUE
>INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
>INF Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
>
> -
> + INF Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
>INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
>INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
>INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> diff --git
> a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
> b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
> new file mode 100644
> index 00..a91f2b6005
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
> @@ -0,0 +1,43 @@
> +#/** @file
> +#
> +#Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
> +#Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
> +#
> +#This program and the accompanying materials
> +#are licensed and made available under the terms and conditions of the
> BSD License
> +#which accompanies this distribution. The full text of the license may
> be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION= 0x0001001A
> + BASE_NAME = OemNicConfigPangea
> + FILE_GUID = edc95319-ebe9-4c38-96af-1d203fb85231
> + MODULE_TYPE= DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT= OemNicConfigEntry
> +
> +[Sources.common]
> + OemNicConfig2P.c
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[Protocols]
> + gHisiBoardNicProtocolGuid ##Produce
> +
> +[LibraryClasses]
> + DebugLib
> + IoLib
> + OemNicLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> +
> +[Depex]
> + TRUE
> diff --git
> a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h
> b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h
> new file mode 100644
> index 00..35228fdf1d
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h
> @@ -0,0 +1,25 @@
> +/** @file
> +*
> +* Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#ifndef __OEM_NIC_CONFIG_H__
> +#define __OEM_NIC_CONFIG_H__
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#endif
> diff --git
> a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c
> b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c
> new file mode 100644
> index 00..c01c49150a
> --- /dev/null
> +++
Re: [edk2] [PATCH edk2-platforms v3 22/36] Platform/Hisilicon/D06: Add OemNicLib
Responding to v3 since that contains some of the things still problematic
in v2.
On 16 August 2018 at 13:12, Ming Huang wrote:
>
> OemNicLib provide nic related api like GetMac,SetMac.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Platform/Hisilicon/D06/D06.dsc | 1 +
> Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf | 35 ++
> Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 570
> 3 files changed, 606 insertions(+)
>
> diff --git a/Platform/Hisilicon/D06/D06.dsc
b/Platform/Hisilicon/D06/D06.dsc
> index 06249d8a5b..e18badf3b3 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -90,6 +90,7 @@
>
>LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf
>
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> + OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
> !if $(SECURE_BOOT_ENABLE) == TRUE
>
FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> !endif
> diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
> new file mode 100644
> index 00..3b0bd2d60c
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
> @@ -0,0 +1,35 @@
> +#/** @file
> +#
> +#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +#Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +#This program and the accompanying materials
> +#are licensed and made available under the terms and conditions of
the BSD License
> +#which accompanies this distribution. The full text of the license
may be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS
OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION= 0x0001001A
> + BASE_NAME = OemNicLib
> + FILE_GUID = 520F872C-FFCF-4EF3-AC01-85BDB0816DCE
> + MODULE_TYPE= BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = OemNicLib
> +
> +[Sources.common]
> + OemNicLib.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + CpldIoLib
> + I2CLib
> diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
> new file mode 100644
> index 00..aa75617092
> --- /dev/null
> +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
> @@ -0,0 +1,570 @@
> +/** @file
> +*
> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the
BSD License
> +* which accompanies this distribution. The full text of the license
may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
> +*
> +**/
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define CPU2_SFP2_100G_CARD_OFFSET 0x25
> +#define CPU1_SFP1_LOCATE_OFFSET 0x16
> +#define CPU1_SFP0_LOCATE_OFFSET 0x12
> +#define CPU2_SFP1_LOCATE_OFFSET 0x21
> +#define CPU2_SFP0_LOCATE_OFFSET 0x19
> +#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
> +
> +#define SFP_10G_SPEED 10
> +#define SFP_25G_SPEED 25
> +#define SFP_100G_SPEED 100
> +#define SFP_GE_SPEED1
> +
> +#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
> +#define SFP_GE_SPEED_VAL0x0D
> +#define SFP_10G_SPEED_VAL 0x67
> +#define SFP_25G_SPEED_VAL 0xFF
> +
> +#define CARD_PRESENT_100G (BIT7)
> +#define CARD_PRESENT_10G(BIT0)
> +#define SELECT_SFP_BY_INDEX(index) (1 << (index - 1))
> +#define SPF_SPEED_OFFSET12
> +
> +#define SFP_DEVICE_ADDRESS 0x50
> +#define CPU1_9545_I2C_ADDR 0x70
> +#define CPU2_9545_I2C_ADDR 0x71
> +
> +#define FIBER_PRESENT 0
> +#define CARD_PRESENT 1
> +#define I2C_PORT_SFP 4
> +#define CPU2_I2C_PORT_SFP 5
> +
> +#define SOCKET_0 0
> +#define SOCKET_1 1
> +#define EEPROM_I2C_PORT 4
> +#define EEPROM_PAGE_SIZE 0x40
> +#define MAC_ADDR_LEN 6
> +#define I2C_OFFSET_EEPROM_ETH0 (0xc00)
> +#define I2C_SLAVEADDR_EEPROM (0x52)
> +
> +#pragma pack(1)
> +typedef struct {
> + UINT16 Crc16;
> + UINT16 MacLen;
> + UINT8 Mac[MAC_ADDR_LEN];
> +} NIC_MAC_ADDRESS;
> +#pragma pack()
Re: [edk2] [PATCH edk2-platforms v2 12/43] Platform/Hisilicon/D06: Add edk2-non-osi components for D06
On 8/22/2018 5:49 PM, Leif Lindholm wrote: > On Tue, Aug 14, 2018 at 04:08:32PM +0800, Ming Huang wrote: >> Add PcdCoreCount to fix build issue while add binary components. > > This commit message fails to describe what is being done, apart from a > single thing that should be a separate patch. > > Pleas add a proper commit message describing which components are > being imported. > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang >> --- >> Platform/Hisilicon/D06/D06.dsc >>| 7 +++ >> Platform/Hisilicon/D06/D06.fdf >>| 17 + >> >> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf >> | 2 ++ >> 3 files changed, 26 insertions(+) >> > >> diff --git >> a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf >> >> b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf >> index 2275586ff3..a47806f391 100644 >> --- >> a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf >> +++ >> b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf >> @@ -28,6 +28,7 @@ >> >> [Packages] >>ArmPkg/ArmPkg.dec >> + ArmPlatformPkg/ArmPlatformPkg.dec >>MdePkg/MdePkg.dec >>MdeModulePkg/MdeModulePkg.dec >>IntelFrameworkPkg/IntelFrameworkPkg.dec >> @@ -52,6 +53,7 @@ >>gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED >> >> [Pcd] >> + gArmPlatformTokenSpaceGuid.PcdCoreCount >>gHisiTokenSpaceGuid.PcdCPUInfo >>gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz > > And please submit this as a separate patch, explaining why the change > is needed. If it is only needed by one of the binary modules imported > as part of the current patch, place it immediately preceding this. > > If it resolves some other issue, please insert it as early in the set > as possible. Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620 add a function which use the PcdCoreCount and the function is used by ProcessorSubClassDxe. Should I add gArmPlatformTokenSpaceGuid.PcdCoreCount to Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf ? And delete the commit message in this patch ? > > / > Leif > >> >> -- >> 2.17.0 >> ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 28/43] Platform/Hisilicon/D06: Enable ACPI PPTT
On Tue, Aug 14, 2018 at 04:08:48PM +0800, Ming Huang wrote: > From: Heyi Guo > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo Replace Heyi's Signed-off-by with your own. Then Reviewed-by: Leif Lindholm > --- > Platform/Hisilicon/D06/D06.dsc | 1 + > Platform/Hisilicon/D06/D06.fdf | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index bec422670d..06249d8a5b 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -338,6 +338,7 @@ >Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > + Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf ># ># Usb Support ># > diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf > index 06203dc079..5bb779d2e4 100644 > --- a/Platform/Hisilicon/D06/D06.fdf > +++ b/Platform/Hisilicon/D06/D06.fdf > @@ -252,6 +252,8 @@ READ_LOCK_STATUS = TRUE >INF RuleOverride=ACPITABLE > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > + INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > + ># >#Network ># > -- > 2.17.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 27/43] Hisilicon/Hi1620: Add ACPI PPTT table
On Tue, Aug 14, 2018 at 04:08:47PM +0800, Ming Huang wrote: > From: Heyi Guo > > This driver fetches information from MADT, so it is adaptable for > partial good and 1P/2P, since MADT is updated for different > configurations by certain mechanism. > > Since L2 cache is also private resource of core, so we need to set the > next level of cache for L1I and L1D, which is important for OS to > parse cache hierarchy. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo No, Signed-off-by: Ming Huang You are signing off on these patches being correclty licensed and permitted to contribute under the Contribution agreement. The above is equivalent to "Heyi says it's fine". "Heyi wrote this code" is reflected through the From: tag above. Looking back, I notice this is true for many patches in the set. Please address throughout v4. I have no further comment on this patch, so with that change: Reviewed-by: Leif Lindholm > --- > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 ++ > Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 68 +++ > Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 > 3 files changed, 659 insertions(+) ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 26/43] Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP"
On Tue, Aug 14, 2018 at 04:08:46PM +0800, Ming Huang wrote:
> From: Yang XinYi
>
> Add Setup Item "EnableGOP" for D06, This Item only takes
> effect on VGA device SM750.
Feedback on v1 was:
What is SM750? Please add more detail to commit message.
Please address.
Rest of patch is fine.
/
Leif
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yang XinYi
> ---
> Silicon/Hisilicon/Include/Library/OemConfigData.h| 1 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c| 1 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr | 7 +++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni | 4 ++--
> 4 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h
> b/Silicon/Hisilicon/Include/Library/OemConfigData.h
> index 478821ae2c..e4d5917046 100644
> --- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
> +++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
> @@ -61,6 +61,7 @@ typedef struct {
>UINT8 EnableSmmu;
>UINT8 EnableFdtTable;
>UINT8 EnableSpcr;
> + UINT8 EnableGOP;
>/*RAS Config*/
>UINT8 EnRasSupport;
>UINT8 EnPoison;
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> index 1e3635307c..3ecae3759a 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
> @@ -295,6 +295,7 @@ OemConfigUiLibConstructor (
>Configuration.EnableSmmu = 1;
>Configuration.EnableFdtTable = 0;
>Configuration.EnableSpcr = 0;
> + Configuration.EnableGOP = 0;
>//
>//Set the default value of the Ras option
>//
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
> index 9e3ac73116..c0b6e294a6 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
> @@ -38,4 +38,11 @@ form formid = MISC_CONFIG_FORM_ID,
>option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = 0;
> endoneof;
>
> +oneof varid = OEM_CONFIG_DATA.EnableGOP,
> + prompt = STRING_TOKEN(STR_ENABLE_GOP_FRAME_BUFFER),
> + help= STRING_TOKEN(STR_ENABLE_GOP_FRAME_BUFFER_HELP),
> + option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT;
> + option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = 0;
> +endoneof;
> +
> endform;
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
> index 53eb1622c4..2fd92fedff 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
> @@ -23,5 +23,5 @@
> #string STR_FDT_CONFIG_HELP#language en-US "Enable or Disable
> Fdt Table."
> #string STR_ENABLE_SPCR_TABLE #language en-US "Support SPCR"
> #string STR_ENABLE_SPCR_HELP #language en-US "Enable or Disable
> SPCR Table."
> -#string STR_ENABLE_GOP_FRAME_BUFFER#language en-US "Support GOP FB"
> -#string STR_ENABLE_GOP_FRAME_BUFFER_HELP #language en-US "Enable or
> Disable GOP frame buffer."
> +#string STR_ENABLE_GOP_FRAME_BUFFER#language en-US "Support GOP FB for
> SM750"
> +#string STR_ENABLE_GOP_FRAME_BUFFER_HELP #language en-US "Enable or
> Disable GOP frame buffer for SM750."
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 25/43] Silicon/Hisilicon/D06: Optimize HNS config CDR post time
On Tue, Aug 14, 2018 at 04:08:45PM +0800, Ming Huang wrote:
> From: shaochangliang
>
> Use I2C 400KB speed for config CDR.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
The start of the subject line is supposed to reflect the code that is
being modified - not the platform you are doing it for. Drop D06,
mention I2CLib.
All of these patches should go in before the first D06 one.
With those changes:
Reviewed-by: Leif Lindholm
> ---
> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> index ed44ac204f..55c030a3af 100644
> --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> @@ -28,6 +28,9 @@
> #include "I2CLibInternal.h"
> #include "I2CHw.h"
>
> +#define I2C_100KB_SPEED 0x1
> +#define I2C_400KB_SPEED 0x2
> +
> VOID
> I2C_Delay (
>UINT32 Count
> @@ -158,7 +161,11 @@ I2CInit (
>
>I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
>I2cControlReg.bits.master = 1;
> - I2cControlReg.bits.Speed = 0x1;
> + if(SpeedMode == Normal) {
> +I2cControlReg.bits.Speed = I2C_100KB_SPEED;
> + } else {
> +I2cControlReg.bits.Speed = I2C_400KB_SPEED;
> + }
>I2cControlReg.bits.restart_en = 1;
>I2cControlReg.bits.slave_disable = 1;
>I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 23/43] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config
On Tue, Aug 14, 2018 at 04:08:43PM +0800, Ming Huang wrote:
> Because I2C Port5 salve device connect under I2C extender
> (9545 device), it will cost more time to access I2C slave
> device, so add delay time for HNS auto config.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 3 +++
> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 21 +++-
> 2 files changed, 19 insertions(+), 5 deletions(-)
Like previous patch, please change subject line - this affects d03,
d05, d06.
Silicon/Hisilicon: Add I2CLib delay for HNS auto config
> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> index fa954c7937..d77aea509e 100644
> --- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
> @@ -19,6 +19,9 @@
> #include
> #include
>
> +// The HNS I2C port 5 is under I2C extender
> +#define I2C_EXTENDER_PORT_HNS5
> +
> #define I2C_READ_TIMEOUT 500
> #define I2C_DRV_ONCE_WRITE_BYTES_NUM 8
> #define I2C_DRV_ONCE_READ_BYTES_NUM 8
> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> index d67ddc7f9b..59633106ce 100644
> --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> @@ -258,8 +258,13 @@ CheckI2CTimeOut (
>if (Transfer == I2CTx) {
> Fifo = I2C_GetTxStatus (Socket, Port);
> while (Fifo != 0) {
> - // This is a empirical value for I2C delay. MemoryFance is no need
> here.
> - I2C_Delay (2);
> + if (Port == I2C_EXTENDER_PORT_HNS) {
> +// This is a empirical value for I2C delay. MemoryFance is no need
> here.
MemoryFance ->
MemoryFence
(You may want to search and replace that on the whole set.)
With that:
Reviewed-by: Leif Lindholm
/
Leif
> +I2C_Delay (1000);
> + } else {
> +// This is a empirical value for I2C delay. MemoryFance is no need
> here.
> +I2C_Delay (2);
> + }
>if (++Times > I2C_READ_TIMEOUT) {
> (VOID)I2C_Disable (Socket, Port);
> return EFI_TIMEOUT;
> @@ -269,8 +274,13 @@ CheckI2CTimeOut (
>} else {
> Fifo = I2C_GetRxStatus (Socket, Port);
> while (Fifo == 0) {
> - // This is a empirical value for I2C delay. MemoryFance is no need
> here.
> - I2C_Delay (2);
> + if (Port == I2C_EXTENDER_PORT_HNS) {
> +// This is a empirical value for I2C delay. MemoryFance is no need
> here.
> +I2C_Delay (1000);
> + } else {
> +// This is a empirical value for I2C delay. MemoryFance is no need
> here.
> +I2C_Delay (2);
> + }
>if (++Times > I2C_READ_TIMEOUT) {
> (VOID)I2C_Disable (Socket, Port);
> return EFI_TIMEOUT;
> @@ -369,7 +379,8 @@ I2CWrite(
> Times = 0;
> Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
> while (Fifo > I2C_TXRX_THRESHOLD) {
> - I2C_Delay (2);
> + // This is a empirical value for I2C delay. MemoryFance is no need
> here.
> + I2C_Delay (1000);
>if (++Times > I2C_READ_TIMEOUT) {
> (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
> return EFI_TIMEOUT;
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 22/43] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06
On Tue, Aug 14, 2018 at 04:08:42PM +0800, Ming Huang wrote:
> I2C may enable failed in D06, so retry I2C enable while
> enable failed.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 18 --
> 1 file changed, 12 insertions(+), 6 deletions(-)
Please change subject line to:
Silicon/Hisilicon: Fix I2CLib enable fail issue
and reorder it before the first D06 patch.
With that:
Reviewed-by: Leif Lindholm
> diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> index 9174e50dd4..d67ddc7f9b 100644
> --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
> @@ -86,6 +86,7 @@ I2C_Enable (
> {
>I2C0_ENABLE_U I2cEnableReg;
>I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
> + UINT32 TimeCnt = I2C_READ_TIMEOUT;
>
>UINTN Base = GetI2cBase (Socket, Port);
>
> @@ -93,13 +94,18 @@ I2C_Enable (
>I2cEnableReg.bits.enable = 1;
>I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
>
> + do {
> +// This is a empirical value for I2C delay. MemoryFance is no need here.
> +I2C_Delay (1);
>
> - I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
> - if (I2cEnableStatusReg.bits.ic_en == 1) {
> -return EFI_SUCCESS;
> - } else {
> -return EFI_DEVICE_ERROR;
> - }
> +TimeCnt--;
> +I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
> +if (TimeCnt == 0) {
> + return EFI_DEVICE_ERROR;
> +}
> + } while (I2cEnableStatusReg.bits.ic_en == 0);
> +
> + return EFI_SUCCESS;
> }
>
> VOID
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 19/43] Silicon/Hisilicon/D06: Stop watchdog
On Tue, Aug 14, 2018 at 04:08:39PM +0800, Ming Huang wrote:
> according as watchdog design on D06, watchdog should be
> stopped before boot a option.
>
> This is an out of band watchdog timer in BMC; it is used
> to monitor the whole BIOS boot process and reset the system
> in case BIOS hangs somewhere, i.e. it is armed when system
> is power on, and disabled before handling system control to
> OS, while UEFI boot services watchdog is only armed before
> invoking a boot option. So they are two different watchdogs.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
Reviewed-by: Leif Lindholm
> ---
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> | 2 ++
> Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
> | 16 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> | 22
> 3 files changed, 40 insertions(+)
>
> diff --git
> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> index a093f13fb0..b9458b0ade 100644
> ---
> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> +++
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -46,6 +46,7 @@
>DebugLib
>DevicePathLib
>DxeServicesLib
> + IpmiCmdLib
>MemoryAllocationLib
>PcdLib
>PrintLib
> @@ -69,6 +70,7 @@
>gEfiEndOfDxeEventGroupGuid
>gEfiTtyTermGuid
>gHisiOemVariableGuid
> + gOemConfigGuid
>
> [Protocols]
>gEfiGenericMemTestProtocolGuid
> diff --git a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
> b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
> index 8868b76135..b956ee6d07 100644
> --- a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
> +++ b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
> @@ -19,6 +19,17 @@
> #define BOOT_OPTION_BOOT_FLAG_VALID 1
> #define BOOT_OPTION_BOOT_FLAG_INVALID 0
>
> +typedef enum {
> + EfiReserved,
> + EfiBiosFrb2,
> + EfiBiosPost,
> + EfiOsLoad,
> + EfiSmsOs,
> + EfiOem,
> + EfiFrbReserved1,
> + EfiFrbReserved2
> +} EFI_WDT_USER_TYPE;
> +
> typedef enum {
>NoOverride = 0x0,
>ForcePxe,
> @@ -91,4 +102,9 @@ IpmiCmdGetSysBootOptions (
>IN IPMI_GET_BOOT_OPTION *BootOption
>);
>
> +EFI_STATUS
> +IpmiCmdStopWatchdogTimer (
> + IN EFI_WDT_USER_TYPE UserType
> + );
> +
> #endif
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> index d5f6d78fa4..b63818cbe4 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -19,6 +19,8 @@
> #include
> #include
> #include
> +#include
> +#include
> #include
> #include
> #include
> @@ -615,6 +617,8 @@ PlatformBootManagerAfterConsole (
> {
>EFI_STATUS Status;
>ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL;
> + OEM_CONFIG_DATASetupData;
> + UINTN DataSize = sizeof (OEM_CONFIG_DATA);
>
>//
>// Show the splash screen.
> @@ -651,6 +655,24 @@ PlatformBootManagerAfterConsole (
> );
>
>HandleBmcBootType ();
> +
> + //Disable POST Watch Dog before attempting boot
> + Status = gRT->GetVariable (
> + OEM_CONFIG_NAME,
> + ,
> + NULL,
> + ,
> +
> + );
> +
> + if (!EFI_ERROR (Status)) {
> +if (SetupData.BmcWdtEnable) {
> + Status = IpmiCmdStopWatchdogTimer (EfiBiosPost);
> + if (EFI_ERROR (Status)) {
> +DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status));
> + }
> +}
> + }
> }
>
> /**
> --
> 2.17.0
>
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Re: [edk2] [PATCH edk2-platforms v2 18/43] Hisilicon/D06: Add Hi1620OemConfigUiLib
On Tue, Aug 14, 2018 at 04:08:38PM +0800, Ming Huang wrote:
> From: Yang XinYi
>
> This library is added for oem setup menu item.
> Setup item include:
> 1 DDR option item;
> 2 BMC option item;
> 3 Ras option item;
> 4 Misc option item;
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yang XinYi
> ---
> Silicon/Hisilicon/HisiPkg.dec |
> 1 +
> Platform/Hisilicon/D06/D06.dsc |
> 5 +-
> Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf |
> 2 +-
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf|
> 68
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h |
> 142
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h |
> 64
> Silicon/Hisilicon/Include/Library/OemConfigData.h |
> 84 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c |
> 363
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr |
> 154 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni |
> 103 ++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr|
> 41 +++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni|
> 27 ++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni|
> 24 ++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni |
> 42 +++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr |
> 89 +
Ah, I didn't spot thie before - but can you please rename this one
from
.Vfr to
.vfr
to align with the others?
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr|
> 219
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |
> 111 ++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr|
> 167 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr |
> 172 ++
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni |
> 85 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr|
> 81 +
> Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni|
> 34 ++
> 22 files changed, 2076 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
> index b56a6a6af7..858b840a57 100644
> --- a/Silicon/Hisilicon/HisiPkg.dec
> +++ b/Silicon/Hisilicon/HisiPkg.dec
> @@ -44,6 +44,7 @@
>gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87,
> 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>
>gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd,
> 0x56, 0xda, 0x91, 0xc0, 0x7f}}
> + gOemConfigGuid = {0x42927b59, 0x58fc, 0x41be, {0x8f, 0x59, 0xd1, 0x7c,
> 0x02, 0x1a, 0x70, 0x13}}
>gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe,
> 0xe1, 0x42, 0x12, 0xbf}}
>gHisiOemVariableGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 0xc5,
> 0x80, 0x32, 0x7d, 0x9b, 0x29}}
>gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4,
> 0xa4, 0x2f, 0x45, 0x06, 0xf8}}
> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
> index 9d4a86a4f4..bec422670d 100644
> --- a/Platform/Hisilicon/D06/D06.dsc
> +++ b/Platform/Hisilicon/D06/D06.dsc
> @@ -330,7 +330,10 @@
>#ACPI
>#
>MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> - Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> + Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf {
> +
> +NULL|Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
> + }
>
>Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
>Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
> diff --git
> a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> index e268a56bbd..281a4f2ebd 100644
> --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> @@ -56,7 +56,7 @@
>gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile## CONSUMES
>
> [Depex]
> - gEfiAcpiTableProtocolGuid
> + gEfiAcpiTableProtocolGuid AND gEfiVariableWriteArchProtocolGuid
>
> [UserExtensions.TianoCore."ExtraFiles"]
>AcpiPlatformExtra.uni
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
> new file mode 100644
> index 00..fba619e9ba
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
> @@ -0,0 +1,68 @@
> +## @file
> +#
Re: [edk2] [Patch v2] MdeModulePkg/PiSmmCore: Check valid memory range.
Hi Star,
Agree, will update to that name when check in the code.
Thanks,
Eric
> -Original Message-
> From: Zeng, Star
> Sent: Wednesday, August 22, 2018 7:11 PM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Zeng, Star
> Subject: RE: [Patch v2] MdeModulePkg/PiSmmCore: Check valid memory
> range.
>
> Suggest use "InMemMap" instead of "InSmmRange", Reviewed-by: Star Zeng
> with it.
>
>
> Thanks,
> Star
> -Original Message-
> From: Dong, Eric
> Sent: Tuesday, August 21, 2018 8:25 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star
> Subject: [Patch v2] MdeModulePkg/PiSmmCore: Check valid memory range.
>
> Call BS.AllocatePages in DXE driver and call SMM FreePages with the address
> of the buffer allocated in the DXE driver. SMM FreePages success and add a
> non-SMRAM range into SMM heap list. This is not an expected behavior.
> SMM FreePages should return error for this case and not free the pages.
>
> V2 changes:
> Adjust "Last" variable value from "Last = Memory + EFI_PAGES_TO_SIZE
> (NumberOfPages);" to "Last = Memory + EFI_PAGES_TO_SIZE
> (NumberOfPages) - 1;"
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1098
>
> Pass test:
> 1. Call SmmAllocatePages, to allocate pages, then call SmmFreePages to free
> same pages return success.
> 2. Call AllocatePages in Dxe then call SmmFreePages to free same pages,
> return failure.
>
> Cc: Star Zeng
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong
> ---
> MdeModulePkg/Core/PiSmmCore/Page.c | 39
> ++
> 1 file changed, 39 insertions(+)
>
> diff --git a/MdeModulePkg/Core/PiSmmCore/Page.c
> b/MdeModulePkg/Core/PiSmmCore/Page.c
> index 3699af7424..e9fcf01ecc 100644
> --- a/MdeModulePkg/Core/PiSmmCore/Page.c
> +++ b/MdeModulePkg/Core/PiSmmCore/Page.c
> @@ -983,6 +983,41 @@ SmmInternalFreePages (
>return SmmInternalFreePagesEx (Memory, NumberOfPages, FALSE); }
>
> +/**
> + Check whether the input range is in smram.
> +
> + @param Memory Base address of memory being inputed.
> + @param NumberOfPages The number of pages.
> +
> + @retval TRUE In the smram.
> + @retval FALSE Not in the smram.
> +
> +**/
> +BOOLEAN
> +InSmmRange (
> + IN EFI_PHYSICAL_ADDRESS Memory,
> + IN UINTN NumberOfPages
> + )
> +{
> + LIST_ENTRY *Link;
> + MEMORY_MAP *Entry;
> + EFI_PHYSICAL_ADDRESS Last;
> +
> + Last = Memory + EFI_PAGES_TO_SIZE (NumberOfPages) - 1;
> +
> + Link = gMemoryMap.ForwardLink;
> + while (Link != ) {
> +Entry = CR (Link, MEMORY_MAP, Link, MEMORY_MAP_SIGNATURE);
> +Link = Link->ForwardLink;
> +
> +if ((Entry->Start <= Memory) && (Entry->End >= Last)) {
> + return TRUE;
> +}
> + }
> +
> + return FALSE;
> +}
> +
> /**
>Frees previous allocated pages.
>
> @@ -1004,6 +1039,10 @@ SmmFreePages (
>EFI_STATUS Status;
>BOOLEAN IsGuarded;
>
> + if (!InSmmRange(Memory, NumberOfPages)) {
> +return EFI_NOT_FOUND;
> + }
> +
>IsGuarded = IsHeapGuardEnabled () && IsMemoryGuarded (Memory);
>Status = SmmInternalFreePages (Memory, NumberOfPages, IsGuarded);
>if (!EFI_ERROR (Status)) {
> --
> 2.15.0.windows.1
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Re: [edk2] [PATCH edk2-platforms v2 17/43] Hisilicon/D06: Add ACPI Tables for D06
On Tue, Aug 14, 2018 at 04:08:37PM +0800, Ming Huang wrote: > ACPI tables for D06 2P, especially,Hi1620Iort.asl is include smmu > and Hi1620IortNoSmmu.asl is without smmu. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang As per last feedback: Reviewed-by: Leif Lindholm (The only modification I asked for has been done.) > --- > Platform/Hisilicon/D06/D06.dsc | > 1 + > Platform/Hisilicon/D06/D06.fdf | > 1 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf | > 59 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h | > 27 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | > 409 > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | > 30 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | > 35 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | > 93 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl| > 58 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | > 1459 ++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | > 41 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl| > 1216 > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl | > 28 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl| > 47 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl| > 57 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl | > 249 +++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl | > 249 +++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | > 49 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | > 1658 > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | > 49 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc | > 67 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc | > 91 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | > 86 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | > 86 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl| > 1989 > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl | > 1736 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | > 64 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | > 64 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | > 81 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | > 166 ++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | > 375 > 31 files changed, 10620 insertions(+) ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms v2 16/43] Hisilicon/D06: Add Debug Serial Port Init Driver
On Tue, Aug 14, 2018 at 04:08:36PM +0800, Ming Huang wrote: > From: Heyi Guo > > Hi1620 have two physical PL011 serial ports on the board, > one for serial port console (described by ACPI SPCR) and > the other for standard debug port (described by ACPI DBG2). > This driver is to initialize the debug UART, not the serial > console. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo Reviewed-by: Leif Lindholm > --- > Platform/Hisilicon/D06/D06.dsc > | 1 + > Platform/Hisilicon/D06/D06.fdf > | 1 + > > Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > | 48 +++ > > Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c >| 64 > 4 files changed, 114 insertions(+) > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index 9ca7160dad..20d2d2a1b4 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -422,6 +422,7 @@ ># Memory test ># >MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf > + > Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf >MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf >MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf >MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf > index 07fe096f61..8cac126ccf 100644 > --- a/Platform/Hisilicon/D06/D06.fdf > +++ b/Platform/Hisilicon/D06/D06.fdf > @@ -303,6 +303,7 @@ READ_LOCK_STATUS = TRUE >INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf >INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > > + INF > Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf >INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf ># ># Build Shell from latest source code instead of prebuilt binary > diff --git > a/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > > b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > new file mode 100644 > index 00..8c91bdf0f4 > --- /dev/null > +++ > b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > @@ -0,0 +1,48 @@ > +#/** @file > +# > +#Copyright (c) 2016 - 2018, Hisilicon Limited. All rights reserved. > +#Copyright (c) 2016 - 2018, Linaro Limited. All rights reserved. > +# > +#This program and the accompanying materials > +#are licensed and made available under the terms and conditions of the > BSD License > +#which accompanies this distribution. The full text of the license may > be found at > +#http://opensource.org/licenses/bsd-license.php > +# > +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > +# > +#**/ > + > +[Defines] > + INF_VERSION= 0x0001001A > + BASE_NAME = Pl011DebugSerialPortInitDxe > + FILE_GUID = 16D53E86-7EA4-47bd-861F-511EA9B8ABE0 > + MODULE_TYPE= DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT= SerialPortEntry > + > +[Sources.common] > + Pl011DebugSerialPortInitDxe.c > + > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Hisilicon/HisiPkg.dec > + > +[LibraryClasses] > + BaseLib > + UefiDriverEntryPoint > + > +[Pcd] > + gArmPlatformTokenSpaceGuid.PL011UartClkInHz > + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits > + > +[Depex] > + TRUE > + > diff --git > a/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > > b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > new file mode 100644 > index 00..8f83737327 > --- /dev/null > +++ > b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > @@ -0,0 +1,64 @@ > +/** @file > + > +Copyright (c) 2016 - 2018, Hisilicon Limited. All rights reserved. > +Copyright (c) 2016 - 2018, Linaro Limited. All rights reserved. > + > +This program and the accompanying materials > +are licensed and made available under the terms and conditions of the > BSD License > +which accompanies this distribution. The full text of the license may be
Re: [edk2] [PATCH edk2-platforms v2 15/43] Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe
On Tue, Aug 14, 2018 at 04:08:35PM +0800, Ming Huang wrote:
> The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by
> UpdateAcpiTable.c and Srat aslc. The struct may be different
> according to chips, so move some macro to PlatformArch.h.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
I told you you could have
Reviewed-by: Leif Lindholm
on this one.
Please add that to all patches where I say that on next submission.
(But also fix the spelling of Acpi in the subject please, I missed
that :)
/
Leif
> ---
> Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 6
> Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 6
> Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31
> ++--
> Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 --
> 4 files changed, 34 insertions(+), 11 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
> b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
> index f39ae0748c..1ebddca4e5 100644
> --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
> +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
> @@ -30,6 +30,12 @@
> // Max NUMA node number for each node type
> #define MAX_NUM_PER_TYPE 8
>
> +// for acpi
> +#define NODE_IN_SOCKET 2
> +#define CORE_NUM_PER_SOCKET 32
> +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT10
> +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8
> +
> #define S1_BASE 0x400
>
> #define RASC_BASE(0x5000)
> diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
> b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
> index 9539cfdada..f3ad45f6c6 100644
> --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
> +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
> @@ -57,5 +57,11 @@
>EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
>}
>
> +// for acpi
> +#define NODE_IN_SOCKET 2
> +#define CORE_NUM_PER_SOCKET 48
> +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT16
> +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 1
> +
> #endif
>
> diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> index fd05a3b960..2abffb65fc 100644
> --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> @@ -19,6 +19,21 @@
> #ifndef __ACPI_NEXT_LIB_H__
> #define __ACPI_NEXT_LIB_H__
>
> +#include
> +
> +///
> +/// ITS Affinity Structure Definition
> +///
> +#pragma pack(1)
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT32 ProximityDomain;
> + UINT16 Reserved;
> + UINT32 ItsHwId;
> +} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE;
> +#pragma pack()
> +
> #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \
>{ \
> EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),
> EFI_ACPI_RESERVED_WORD, \
> @@ -42,8 +57,8 @@
> #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(
>\
> ProximityDomain, ItsId)
>\
>{
>\
> -4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain,
>\
> -{EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId
> \
> +4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain,
>\
> +EFI_ACPI_RESERVED_WORD, ItsId
>\
>}
>
> #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT(
> \
> @@ -75,15 +90,13 @@
> // Define the number of each table type.
> // This is where the table layout is modified.
> //
> -#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64
> -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT10
> -#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8
> +#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT
> (MAX_SOCKET*CORE_NUM_PER_SOCKET)
>
> typedef struct {
> - EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
> - EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE
> Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
> - EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE
> Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
> - EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE
> Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
> + EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER
Re: [edk2] [PATCH edk2-platforms v3 07/36] Silicon/Hisilicon/D06: Wait for all disk ready
(Commenting on the v3 patch since I know it supersedes the v2 patch.)
On Thu, Aug 16, 2018 at 08:12:10PM +0800, Ming Huang wrote:
> This patch is relative to D06 SasDxe driver. The SasDxe set a
> variable to notice this libray. Here Wait for all disk ready
> for 15S at most.
>
> D06:
> For using straight-through hard disk backboard, some disk need
> 15 seconds to ready. Actually, wait less 15 seconds here(minus
> the time from end of SAS driver to here).
> For using expander backboard, wait less 6 seconds here(minus
> the time from end of SAS driver to here).
>
> D03/D05:
> As Sas driver don't install PLATFORM_SAS_NOTIFY Protocol, D03/D05
> will skip waiting here.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang
> ---
> Silicon/Hisilicon/HisiPkg.dec
> | 1 +
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> | 3 ++
> Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
> | 27 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> | 37
> 4 files changed, 68 insertions(+)
>
> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
> index 35bea970ec..0595790df8 100644
> --- a/Silicon/Hisilicon/HisiPkg.dec
> +++ b/Silicon/Hisilicon/HisiPkg.dec
> @@ -39,6 +39,7 @@
>gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45,
> 0x7d, 0x13, 0x50, 0x96, 0x5d}}
>gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93,
> 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97,
> 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
> + gPlatformSasNotifyProtocolGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c,
> 0xc5, 0x80, 0x32, 0x7d, 0x9b, 0x29}}
Ideally, I would like to see a new package declaration file added in
edk2-non-osi/Silicon/Hisilicon. Maybe HisiliconNonOsi.dec. And this
guid added there.
>
> [Guids]
>gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87,
> 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
> diff --git
> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> index 7a53befc44..96a46da8c5 100644
> ---
> a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> +++
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -49,6 +49,7 @@
>MemoryAllocationLib
>PcdLib
>PrintLib
> + TimerLib
>UefiBootManagerLib
>UefiBootServicesTableLib
>UefiLib
> @@ -67,8 +68,10 @@
> [Guids]
>gEfiEndOfDxeEventGroupGuid
>gEfiTtyTermGuid
> + gOemConfigGuid
>
> [Protocols]
>gEfiGenericMemTestProtocolGuid
>gEfiLoadedImageProtocolGuid
>gEsrtManagementProtocolGuid
> + gPlatformSasNotifyProtocolGuid
> diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
> b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
> new file mode 100644
> index 00..54fd30fc68
> --- /dev/null
> +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
And similarly, this file added under
edk2-non-osi/Silicon/Hisilicon/Include/Protocol.
Other than that, I am happy with this patch.
(Yes, I know we have not enforced this in the past, but it is way
cleaner and makes API-updates a single patch in a single repository.)
/
Leif
> @@ -0,0 +1,27 @@
> +/** @file
> +*
> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2018, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#ifndef _PLATFORM_SAS_NOTIFY_H_
> +#define _PLATFORM_SAS_NOTIFY_H_
> +
> +typedef struct _PLATFORM_SAS_NOTIFY PLATFORM_SAS_NOTIFY;
> +
> +struct _PLATFORM_SAS_NOTIFY {
> + EFI_EVENT WaitDiskEvent;
> +};
> +
> +extern EFI_GUID gPlatformSasNotifyProtocolGuid;
> +
> +#endif
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> index 7dd5ba615c..eaa6ce78d0 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -20,6 +20,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -29,6 +30,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -554,6 +556,40 @@
Re: [edk2] [PATCH edk2-platforms v2 12/43] Platform/Hisilicon/D06: Add edk2-non-osi components for D06
On Tue, Aug 14, 2018 at 04:08:32PM +0800, Ming Huang wrote: > Add PcdCoreCount to fix build issue while add binary components. This commit message fails to describe what is being done, apart from a single thing that should be a separate patch. Pleas add a proper commit message describing which components are being imported. > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang > --- > Platform/Hisilicon/D06/D06.dsc > | 7 +++ > Platform/Hisilicon/D06/D06.fdf > | 17 + > > Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > | 2 ++ > 3 files changed, 26 insertions(+) > > diff --git > a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > > b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > index 2275586ff3..a47806f391 100644 > --- > a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > +++ > b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > @@ -28,6 +28,7 @@ > > [Packages] >ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec >MdePkg/MdePkg.dec >MdeModulePkg/MdeModulePkg.dec >IntelFrameworkPkg/IntelFrameworkPkg.dec > @@ -52,6 +53,7 @@ >gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED > > [Pcd] > + gArmPlatformTokenSpaceGuid.PcdCoreCount >gHisiTokenSpaceGuid.PcdCPUInfo >gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz And please submit this as a separate patch, explaining why the change is needed. If it is only needed by one of the binary modules imported as part of the current patch, place it immediately preceding this. If it resolves some other issue, please insert it as early in the set as possible. / Leif > > -- > 2.17.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [Patch] BaseTools: Update Makefile for ECC tool
Because Ecc.py was renamed to EccMain.py Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu --- BaseTools/Source/Python/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/BaseTools/Source/Python/Makefile b/BaseTools/Source/Python/Makefile index d78b12d..36e8b20 100644 --- a/BaseTools/Source/Python/Makefile +++ b/BaseTools/Source/Python/Makefile @@ -234,11 +234,11 @@ CMD_ECC=$(BASE_TOOLS_PATH)\Source\Python\Ecc\c.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragment.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CodeFragmentCollector.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Configuration.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\CParser.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Database.py \ -$(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py \ +$(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccGlobalData.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccToolError.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\Exception.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\FileProfile.py \ $(BASE_TOOLS_PATH)\Source\Python\Ecc\MetaDataParser.py \ @@ -294,12 +294,12 @@ $(BIN_DIR)\TestSigningPrivateKey.pem: $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sh @copy /Y /B $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\TestSigningPrivateKey.pem $(BIN_DIR)\TestSigningPrivateKey.pem $(BIN_DIR)\Rsa2048Sha256GenerateKeys.exe: $(BASE_TOOLS_PATH)\Source\Python\Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Rsa2048Sha256Sign\Rsa2048Sha256GenerateKeys.py -$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\Ecc.py $(CMD_ECC) $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml - @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Ecc\Ecc.py +$(BIN_DIR)\Ecc.exe: $(BASE_TOOLS_PATH)\Source\Python\Ecc\EccMain.py $(CMD_ECC) $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml + @$(FREEZE) --include-modules=$(MODULES) --install-dir=$(BIN_DIR) Ecc\EccMain.py $(BIN_DIR)\config.ini: $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini @copy /Y /B $(BASE_TOOLS_PATH)\Source\Python\Ecc\config.ini $(BIN_DIR)\config.ini $(BIN_DIR)\exception.xml: $(BASE_TOOLS_PATH)\Source\Python\Ecc\exception.xml -- 2.6.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS
Hi Liming,
On 08/17/18 04:38, Laszlo Ersek wrote:
> In commit 81502cee20ac ("BaseTools/Source/C: take EXTRA_LDFLAGS from the
> caller", 2018-08-16), I missed that "VfrCompile/GNUmakefile" does not use
> BUILD_LFLAGS in the APPLICATION linking rule, unlike "app.makefile" does.
> Instead, "VfrCompile/GNUmakefile" uses the (undefined) LFLAGS macro.
> Therefore commit 81502cee20ac did not cover the linking step of
> VfrCompile.
>
> Thankfully, the structure of the linking rules is the same, between
> "app.makefile" and "VfrCompile/GNUmakefile". Rename the undefined LFLAGS
> macro in "VfrCompile/GNUmakefile" to VFR_LFLAGS (for consistency with
> VFR_CXXFLAGS), and set it to EXTRA_LDFLAGS.
>
> As a result, we have:
>
> | compilation| linking
> ---++--
> VfrCompile | VFR_CXXFLAGS = | VFR_LFLAGS =
> | BUILD_OPTFLAGS = | EXTRA_LDFLAGS
> | '-O2' + EXTRA_OPTFLAGS |
> ---++--
> other apps | BUILD_CFLAGS/BUILD_CXXFLAGS = | BUILD_LFLAGS =
> | [...] + BUILD_OPTFLAGS = | [...] + EXTRA_LDFLAGS
> | [...] + '-O2' + EXTRA_OPTFLAGS |
>
> This table shows
> - that the VfrCompile compilation and linking flags are always a subset of
> the corresponding flags used by the other apps,
> - and that the EXTRA flags are always at the end.
>
> Cc: Liming Gao
> Cc: Yonghong Zhu
> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1540244
> Fixes: 81502cee20ac4046f08bb4aec754c7091c8808dc
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Laszlo Ersek
> ---
>
> Notes:
> Repo: https://github.com/lersek/edk2.git
> Branch: extra_flags_rhbz1540244_round2
>
> BaseTools/Source/C/VfrCompile/GNUmakefile | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
If your time allows, can you please check this patch?
I'm sorry I didn't catch this part in the original series. I really hope
I won't have to touch the BaseTools makefiles for the foreseeable future.
The commit message ended up a bit long, but the patch is quite simple.
Thanks!
Laszlo
> diff --git a/BaseTools/Source/C/VfrCompile/GNUmakefile
> b/BaseTools/Source/C/VfrCompile/GNUmakefile
> index bbe562cbc54f..9273589ff805 100644
> --- a/BaseTools/Source/C/VfrCompile/GNUmakefile
> +++ b/BaseTools/Source/C/VfrCompile/GNUmakefile
> @@ -28,6 +28,9 @@ VFR_CPPFLAGS = -DPCCTS_USE_NAMESPACE_STD $(BUILD_CPPFLAGS)
> # keep BUILD_OPTFLAGS last
> VFR_CXXFLAGS = $(BUILD_OPTFLAGS)
>
> +# keep EXTRA_LDFLAGS last
> +VFR_LFLAGS = $(EXTRA_LDFLAGS)
> +
> LINKER = $(BUILD_CXX)
>
> EXTRA_CLEAN_OBJECTS = EfiVfrParser.cpp EfiVfrParser.h VfrParser.dlg
> VfrTokens.h VfrLexer.cpp VfrLexer.h VfrSyntax.cpp tokens.h
> @@ -42,7 +45,7 @@ APPLICATION = $(MAKEROOT)/bin/$(APPNAME)
> all: $(MAKEROOT)/bin $(APPLICATION)
>
> $(APPLICATION): $(OBJECTS)
> - $(LINKER) -o $(APPLICATION) $(LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
> $(LIBS)
> + $(LINKER) -o $(APPLICATION) $(VFR_LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs
> $(LIBS)
>
> VfrCompiler.o: ../Include/Common/BuildVersion.h
>
>
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Re: [edk2] [PATCH v2 3/4] UefiCpuPkg/CpuDxe: implement non-stop mode for uefi
On 08/22/18 09:13, Wang, Jian J wrote:
> Hi Laszlo,
>
> Regards,
> Jian
>
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Tuesday, August 21, 2018 10:59 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Dong, Eric
> Subject: Re: [edk2] [PATCH v2 3/4] UefiCpuPkg/CpuDxe: implement non-stop mode
> for uefi
>> +/**
>> + Find and display image base address and return image base and its entry
>> point.
>> +
>> + @param CurrentIp Current instruction pointer.
>> +
>> +**/
>> +STATIC
>> +VOID
>> +DumpModuleImageInfo (
>> + IN UINTN CurrentIp
>> + )
>> +{
>> + EFI_STATUS Status;
>> + UINTNPe32Data;
>> + VOID *PdbPointer;
>> + VOID *EntryPoint;
>> +
>> + Pe32Data = PeCoffSearchImageBase (CurrentIp);
>> + if (Pe32Data == 0) {
>> +InternalPrintMessage (" Can't find image information. \n");
>> + } else {
>> +//
>> +// Find Image Base entry point
>> +//
>> +Status = PeCoffLoaderGetEntryPoint ((VOID *) Pe32Data, );
>> +if (EFI_ERROR (Status)) {
>> + EntryPoint = NULL;
>> +}
>> +InternalPrintMessage (" Find image based on IP(0x%x) ", CurrentIp);
>> +PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);
>> +if (PdbPointer != NULL) {
>> + InternalPrintMessage ("%a", PdbPointer);
>> +} else {
>> + InternalPrintMessage ("(No PDB) " );
>> +}
>> +InternalPrintMessage (
>> + " (ImageBase=%016lp, EntryPoint=%016p) \n",
>> + (VOID *) Pe32Data,
>> + EntryPoint
>> + );
>> + }
>> +}
>
> (4) Why is this function copied here? From a quick check, it looks
> identical to DumpModuleImageInfo() in
> "UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c".
>
> And, DumpModuleImageInfo() is an extern function in
> "UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h", and we
> are (likely) already linking against that library instance. As a result
> we'll have the same function twice in CpuDxe, once as STATIC, and
> another time as extern.
>
> If this is a useful utility function, then it should be elevated to a
> public library API, and used from there. (I don't know where to add it,
> I just find this code duplication regrettable.)
>
> [Jian] I reviewed the whole working model again. I think we don’t need to dump
> the image information here, because, if there’s an issue detected, the
> developers
> will disable the non-stop mode anyway in order to find the root cause. Then
> the
> image information can be dumped (normal mode). So we can just dump cpu
> information to tell the user that there’s an exception here. And dumping cpu
> information is already a public interface so we don’t need to duplicate any
> code
> here.
Oh cool. If we can eliminate the function altogether, that's best.
Thanks!
Laszlo
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[edk2] [Patch] BaseTools: Fix one expression bug to support ~ operate
current use (0x41>=~0x0&0x41|0x0) as Pcd value cause build failure because the ~ is not correctly recognized. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu --- BaseTools/Source/Python/Common/Expression.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Source/Python/Common/Expression.py b/BaseTools/Source/Python/Common/Expression.py index 0091e47..78c69fa 100644 --- a/BaseTools/Source/Python/Common/Expression.py +++ b/BaseTools/Source/Python/Common/Expression.py @@ -786,11 +786,11 @@ class ValueExpression(BaseExpression): return '' OpToken = '' for Ch in Expr: if Ch in self.NonLetterOpLst: -if '!' == Ch and OpToken: +if Ch in ['!', '~'] and OpToken: break self._Idx += 1 OpToken += Ch else: break -- 2.6.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v2 4/4] UefiCpuPkg/PiSmmCpuDxeSmm: implement non-stop mode for SMM
Hi Laszlo, Thanks. Regards, Jian From: Laszlo Ersek [mailto:ler...@redhat.com] Sent: Tuesday, August 21, 2018 11:45 PM To: Wang, Jian J ; edk2-devel@lists.01.org Cc: Ni, Ruiyu ; Dong, Eric Subject: Re: [edk2] [PATCH v2 4/4] UefiCpuPkg/PiSmmCpuDxeSmm: implement non-stop mode for SMM On 08/21/18 05:05, Jian J Wang wrote: >> v2 changes: >>fix GCC build error caused by an unused variable in GuardPagePFHandler() > > Since SMM profile feature has already implemented non-stop mode if #PF > occurred, this patch just makes use of the existing implementation to > accommodate heap guard and NULL pointer detection feature. > > Cc: Eric Dong mailto:eric.d...@intel.com>> > Cc: Laszlo Ersek mailto:ler...@redhat.com>> > Cc: Ruiyu Ni mailto:ruiyu...@intel.com>> > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > mailto:jian.j.w...@intel.com>> > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 43 -- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm | 3 +- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 58 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h | 15 ++ > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 6 +++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 43 -- > 6 files changed, 137 insertions(+), 31 deletions(-) It seems like the changes are no-ops for platforms that set all these PCDs to zero, so from my side Acked-by: Laszlo Ersek mailto:ler...@redhat.com>> Thanks Laszlo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v2 3/4] UefiCpuPkg/CpuDxe: implement non-stop mode for uefi
Hi Laszlo,
Regards,
Jian
From: Laszlo Ersek [mailto:ler...@redhat.com]
Sent: Tuesday, August 21, 2018 10:59 PM
To: Wang, Jian J ; edk2-devel@lists.01.org
Cc: Ni, Ruiyu ; Dong, Eric
Subject: Re: [edk2] [PATCH v2 3/4] UefiCpuPkg/CpuDxe: implement non-stop mode
for uefi
I only have some superficial comments here.
On 08/21/18 05:05, Jian J Wang wrote:
>> v2 changes:
>>n/a
>
> Same as SMM profile feature, a special #PF is used to set page attribute
> to 'present' and a special #DB handler to reset it back to 'not-present',
> right after the instruction causing #PF got executed.
>
> Since the new #PF handler won't enter into dead-loop, the instruction
> which caused the #PF will get chance to re-execute with accessible pages.
>
> The exception message will still be printed out on debug console so that
> the developer/QA can find that there's potential heap overflow or null
> pointer access occurred.
>
> Cc: Eric Dong mailto:eric.d...@intel.com>>
> Cc: Laszlo Ersek mailto:ler...@redhat.com>>
> Cc: Ruiyu Ni mailto:ruiyu...@intel.com>>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jian J Wang
> mailto:jian.j.w...@intel.com>>
> ---
> UefiCpuPkg/CpuDxe/CpuDxe.h | 39 ++
> UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 +
> UefiCpuPkg/CpuDxe/CpuMp.c| 34 -
> UefiCpuPkg/CpuDxe/CpuPageTable.c | 271
> +++
> 4 files changed, 341 insertions(+), 6 deletions(-)
>
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
> index 540f5f2dbf..7d65e39e90 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.h
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
> @@ -57,6 +57,12 @@
> EFI_MEMORY_RO\
> )
>
> +#define HEAP_GUARD_NONSTOP_MODE \
> +((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT1|BIT0)) > BIT6)
> +
> +#define NULL_DETECTION_NONSTOP_MODE \
> +((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) >
> BIT6)
> +
> /**
>Flush CPU data cache. If the instruction cache is fully coherent
>with all DMA operations then function can just return EFI_SUCCESS.
> @@ -273,7 +279,40 @@ RefreshGcdMemoryAttributesFromPaging (
>VOID
>);
>
> +/**
> + Special handler for #DB exception, which will restore the page attributes
> + (not-present). It should work with #PF handler which will set pages to
> + 'present'.
> +
> + @param ExceptionType Exception type.
> + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugExceptionHandler (
> + IN EFI_EXCEPTION_TYPE InterruptType,
> + IN EFI_SYSTEM_CONTEXT SystemContext
> + );
> +
> +/**
> + Special handler for #PF exception, which will set the pages which caused
> + #PF to be 'present'. The attribute of those pages should be restored in
> + the subsequent #DB handler.
> +
> + @param ExceptionType Exception type.
> + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
> +
> +**/
> +VOID
> +EFIAPI
> +PageFaultExceptionHandler (
> + IN EFI_EXCEPTION_TYPE InterruptType,
> + IN EFI_SYSTEM_CONTEXT SystemContext
> + );
> +
> extern BOOLEAN mIsAllocatingPageTable;
> +extern UINTN mNumberOfProcessors;
>
> #endif
>
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> index 6a199b72f7..97a381b046 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> @@ -46,6 +46,7 @@
>ReportStatusCodeLib
>MpInitLib
>TimerLib
> + PeCoffGetEntryPointLib
>
> [Sources]
>CpuDxe.c
> @@ -79,6 +80,8 @@
> [Pcd]
>gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ##
> CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ##
> CONSUMES
> + gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList ##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize##
> CONSUMES
>
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
> index 82145e7624..f8489eb1c3 100644
> --- a/UefiCpuPkg/CpuDxe/CpuMp.c
> +++ b/UefiCpuPkg/CpuDxe/CpuMp.c
> @@ -673,10 +673,6 @@ InitializeMpExceptionStackSwitchHandlers (
>UINT8 *GdtBuffer;
>UINT8 *StackTop;
>
> - if (!PcdGetBool (PcdCpuStackGuard)) {
> -return;
> - }
> -
>ExceptionNumber = FixedPcdGetSize (PcdCpuStackSwitchExceptionList);
>NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
>
> @@ -790,6 +786,32 @@ InitializeMpExceptionStackSwitchHandlers (
>}
> }
>
> +/**
> + Initializes MP exceptions handlers for special features, such as Heap Guard
> + and Stack Guard.
> +**/
> +VOID
> +InitializeMpExceptionHandlers (
> + VOID
> + )
> +{
> + //
> + // Enable non-stop mode
[edk2] [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] GCC Build Enabling.
Fixed the GCC build errors.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunshan Tu
Reviewed-by: David Wei
---
BuildBIOS.sh | 4 +++
.../Board/UP2/BoardInitDxe/BoardInitDxe.c | 8 +++---
Platform/BroxtonPlatformPkg/BuildBxtBios.sh | 17 ++--
Platform/BroxtonPlatformPkg/BuildIFWI.sh | 5
.../Eeprom/EepromDataLib/EEPROM/HobData.c | 4 +--
.../Eeprom/EepromDataLib/EEPROM/HobDataPei.c | 4 +--
.../Eeprom/EepromDataLib/EepromDataLib.c | 8 +++---
.../EepromDataLib/MemoryAllocationPei.c | 2 --
.../Features/Eeprom/EepromLib/EepromLib.c | 27 +++
.../Include/Library/{I2CLib.h => I2cLib.h}| 0
10 files changed, 32 insertions(+), 47 deletions(-)
mode change 100755 => 100644 BuildBIOS.sh
mode change 100755 => 100644 Platform/BroxtonPlatformPkg/BuildBxtBios.sh
mode change 100755 => 100644 Platform/BroxtonPlatformPkg/BuildIFWI.sh
rename Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/{I2CLib.h
=> I2cLib.h} (100%)
diff --git a/BuildBIOS.sh b/BuildBIOS.sh
old mode 100755
new mode 100644
index 9c482697b1..64eeac0687
--- a/BuildBIOS.sh
+++ b/BuildBIOS.sh
@@ -70,6 +70,10 @@ for (( i=1; i<=$#; ))
BoardId=MX
Build_Flags="$Build_Flags /MX"
shift
+elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/UP" ]; then
+ BoardId=UP
+ Build_Flags="$Build_Flags /UP"
+ shift
elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/LH" ]; then
BoardId=LH
Build_Flags="$Build_Flags /LH"
diff --git a/Platform/BroxtonPlatformPkg/Board/UP2/BoardInitDxe/BoardInitDxe.c
b/Platform/BroxtonPlatformPkg/Board/UP2/BoardInitDxe/BoardInitDxe.c
index 662d8f1991..32a066d8bd 100644
--- a/Platform/BroxtonPlatformPkg/Board/UP2/BoardInitDxe/BoardInitDxe.c
+++ b/Platform/BroxtonPlatformPkg/Board/UP2/BoardInitDxe/BoardInitDxe.c
@@ -17,7 +17,7 @@
#include "BoardInitDxe.h"
GET_BOARD_NAME mUp2GetBoardNamePtr = Up2GetBoardName;
-SYSTEM_CONFIGURATION mSystemConfiguration;
+SYSTEM_CONFIGURATION mSystemConfigurationUp;
CHAR16*
EFIAPI
@@ -58,18 +58,18 @@ UpdateSetupVariable (
,
,
,
-
+
);
ASSERT_EFI_ERROR (Status);
if (Status == EFI_SUCCESS) {
-mSystemConfiguration.PcieRootPortEn[3]= (UINT8) 0;
+mSystemConfigurationUp.PcieRootPortEn[3]= (UINT8) 0;
Status = gRT->SetVariable (
L"Setup",
,
VariableAttributes,
VarSize,
-
+
);
ASSERT_EFI_ERROR (Status);
}
diff --git a/Platform/BroxtonPlatformPkg/BuildBxtBios.sh
b/Platform/BroxtonPlatformPkg/BuildBxtBios.sh
old mode 100755
new mode 100644
index c2b5f17dd5..ac2c58abb1
--- a/Platform/BroxtonPlatformPkg/BuildBxtBios.sh
+++ b/Platform/BroxtonPlatformPkg/BuildBxtBios.sh
@@ -164,7 +164,6 @@ elif [ $BoardId == "BG" ]; then
elif [ $BoardId == "LH" ]; then
BOARD_ID=LEAF
echo BOARD_ID = LEAFHIL >> $WORKSPACE/Conf/BiosId.env
-else
elif [ $BoardId == "UP" ]; then
BOARD_ID=UPBO
echo BOARD_ID = UP2BORD >> $WORKSPACE/Conf/BiosId.env
@@ -411,15 +410,15 @@ fi
if [ $BoardId == "MX" ]; then
if [ $FabId == "B" ]; then
-cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/IFWI/FAB_B/SpiChunk1.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
-cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/IFWI/FAB_B/SpiChunk2.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
-cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/IFWI/FAB_B/SpiChunk3.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
-cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/IFWI/FAB_B/SpiChunk1SpiAccessControl.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
+cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/IFWI/FAB_B/SpiChunk1.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
+cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/IFWI/FAB_B/SpiChunk2.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
+cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/IFWI/FAB_B/SpiChunk3.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
+cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/IFWI/FAB_B/SpiChunk1SpiAccessControl.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
else
-cp -f
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/IFWI/FAB_A/SpiChunk1.bin
$PLATFORM_PATH/Platform/BroxtonPlatformPkg/Common/Tools/Stitch
-cp -f
Re: [edk2] [PATCH v2 0/4] Support non-stop mode in heap guard and null detection
Hi Laszlo, Regards, Jian From: Laszlo Ersek [mailto:ler...@redhat.com] Sent: Tuesday, August 21, 2018 10:28 PM To: Wang, Jian J ; edk2-devel@lists.01.org Subject: Re: [edk2] [PATCH v2 0/4] Support non-stop mode in heap guard and null detection On 08/21/18 05:05, Jian J Wang wrote: >> v2 changes: >>fix GCC build error > > Background: > Heap Guard and NULL Pointer Detection are very useful features to detect > code flaw in EDK II. If an issue is detected, #PF exception will be > triggered and the BIOS will enter into dead loop, which is the default > behavior of exception handling. From QA perspective, this default behavior > will block them to collect all tests result in reasonable time. > > Solution: > This patch series update CpuDxe, PiSmmCpuDxeSmm and CpuExceptionHandlerLib > to allow the code to continue execution after #PF. The mechanism behind it > is the same as SMM Profile feature, in which a special #PF handler is > registered to set the page causing #PF to be 'present' and setup single > steop trap, then return the control back to the instruction accessing that > page. Once the instruction is re-executed, a #DB is triggered and a special > handler for it will be called to reset the page back to 'not-present'. > > Usage: > The non-stop mode is enabled/disabled by BIT6 of following PCDs > > gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask > gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask > > The default setting is 'disable'. > > BZ Tracker: > https://bugzilla.tianocore.org/show_bug.cgi?id=1095 > > OS Boot Validation: > Platform: OVMF > OS (x64): Fedora 26, Ubuntu 18.04, Windows 10, Windows 7 > > Jian J Wang (4): > MdeModulePkg/MdeModulePkg.dec: add new settings for PCDs > UefiCpuPkg/CpuExceptionHandlerLib: Setup single step in #PF handler > UefiCpuPkg/CpuDxe: implement non-stop mode for uefi > UefiCpuPkg/PiSmmCpuDxeSmm: implement non-stop mode for SMM > > MdeModulePkg/MdeModulePkg.dec | 4 +- > UefiCpuPkg/CpuDxe/CpuDxe.h | 39 +++ > UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 + > UefiCpuPkg/CpuDxe/CpuMp.c | 34 ++- > UefiCpuPkg/CpuDxe/CpuPageTable.c | 271 > + > .../Ia32/ExceptionHandlerAsm.nasm | 7 + > .../Ia32/ExceptionTssEntryAsm.nasm | 4 +- > .../X64/ExceptionHandlerAsm.nasm | 4 + > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 43 ++-- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm | 3 +- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 58 - > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h | 15 ++ > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 6 + > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 43 ++-- > 14 files changed, 493 insertions(+), 41 deletions(-) > (1) This looks like a feature addition, so please include the BZ reference (1095) on the following wiki page: https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-Planning (under "Proposed Features") [Jian] Sure. I’ll add it. (2) The general description should be moved (or copied) from this email (v2 0/4) to patch #1 (v2 1/4). The cover letter is not captured in the commit log, and I think there isn't going to be any other documentation for the feature than the DEC file. (Note that I'm not suggesting that you add the documentation to the DEC file in patch #1 -- instead, the commit message on patch #1 should contain it. Then people can find the commit from the DEC file with "git blame", and read the description.) [Jian] You’re right. I forgot this point. I’ll copy it. Thanks. Thanks Laszlo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
