Re: [edk2] [PATCH] BaseTools/tools_def ARM: use softfloat target for CLANG3x
Ard: So, this change requires ARM users to install the additional tool chain? If yes, could you list the detail impact to user? Thanks Liming >-Original Message- >From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard >Biesheuvel >Sent: Wednesday, December 19, 2018 10:50 PM >To: edk2-devel@lists.01.org >Cc: Gao, Liming >Subject: [edk2] [PATCH] BaseTools/tools_def ARM: use softfloat target for >CLANG3x > >The target triplet we use for CLANG35 and CLANG38 specifies a >hardfloat target, and so the binaries that are emitted are >annotated as using VFP registers for passing floating point >arguments, even though no VFP is used anywhere in the code. > >This works fine as long as we don't try to link against code >that uses software floating point, since combining object files >with different floating point calling conventions is not permitted. > >So switch to the softfloat arm-linux-gnueabi triplet instead. >Unfortunately, this requires all CLANG3x/ARM users to install >another cross toolchain. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Ard Biesheuvel >--- > BaseTools/Conf/tools_def.template | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > >diff --git a/BaseTools/Conf/tools_def.template >b/BaseTools/Conf/tools_def.template >index 2ba833e1fb06..f82bc72327d8 100755 >--- a/BaseTools/Conf/tools_def.template >+++ b/BaseTools/Conf/tools_def.template >@@ -5231,7 +5231,7 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z >common-page-size=0x20 > *_CLANG35_*_DLINK_PATH = ENV(CLANG35_BIN)clang > *_CLANG35_*_ASLDLINK_PATH= ENV(CLANG35_BIN)clang > >-DEFINE CLANG35_ARM_TARGET= -target arm-linux-gnueabihf >+DEFINE CLANG35_ARM_TARGET= -target arm-linux-gnueabi > DEFINE CLANG35_AARCH64_TARGET= -target aarch64-linux-gnu > > DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality - >Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare >-Wno-empty-body -Wno-unknown-warning-option >@@ -5384,7 +5384,7 @@ NOOPT_CLANG38_X64_DLINK2_FLAGS = >DEF(GCC5_X64_DLINK2_FLAGS) -O0 > ## > # CLANG38 ARM definitions > ## >-DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabihf >+DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabi > DEFINE CLANG38_ARM_CC_FLAGS = DEF(GCC_ARM_CC_FLAGS) >DEF(CLANG38_ARM_TARGET) DEF(CLANG38_WARNING_OVERRIDES) -mno- >movt > DEFINE CLANG38_ARM_DLINK_FLAGS = DEF(CLANG38_ARM_TARGET) >DEF(GCC_ARM_DLINK_FLAGS) > >-- >2.19.2 > >___ >edk2-devel mailing list >edk2-devel@lists.01.org >https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v2 1/6] MdePkg/Base: introduce MAX_ALLOC_ADDRESS
Reviewed-by: Liming Gao >-Original Message- >From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard >Biesheuvel >Sent: Thursday, December 20, 2018 4:57 AM >To: edk2-devel@lists.01.org >Cc: Andrew Jones ; Wu, Hao A ; >Gao, Liming ; Kinney, Michael D >; Laszlo Ersek >Subject: [edk2] [PATCH v2 1/6] MdePkg/Base: introduce >MAX_ALLOC_ADDRESS > >On some architectures, the maximum representable address deviates from >the virtual address range that is accessible by the firmware at boot >time. For instance, on AArch64, UEFI mandates a 4 KB page size, which >limits the address space to 48 bits, while more than that may be >populated on a particular platform, for use by the OS. > >So introduce a new macro MAX_ALLOC_ADDRESS, which represent the >maximum >address the firmware should take into account when allocating memory >ranges that need to be accessible by the CPU at boot time. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Ard Biesheuvel >--- > MdePkg/Include/AArch64/ProcessorBind.h | 5 + > MdePkg/Include/Arm/ProcessorBind.h | 5 + > MdePkg/Include/Ebc/ProcessorBind.h | 5 + > MdePkg/Include/Ia32/ProcessorBind.h| 5 + > MdePkg/Include/X64/ProcessorBind.h | 5 + > 5 files changed, 25 insertions(+) > >diff --git a/MdePkg/Include/AArch64/ProcessorBind.h >b/MdePkg/Include/AArch64/ProcessorBind.h >index 968c18f915ae..f4a544b34d78 100644 >--- a/MdePkg/Include/AArch64/ProcessorBind.h >+++ b/MdePkg/Include/AArch64/ProcessorBind.h >@@ -142,6 +142,11 @@ typedef INT64 INTN; > /// > #define MAX_ADDRESS 0xULL > >+/// >+/// Maximum usable address at boot time (48 bits using 4 KB pages) >+/// >+#define MAX_ALLOC_ADDRESS 0xULL >+ > /// > /// Maximum legal AArch64 INTN and UINTN values. > /// >diff --git a/MdePkg/Include/Arm/ProcessorBind.h >b/MdePkg/Include/Arm/ProcessorBind.h >index 8cca0f3bb050..16a61fc7a325 100644 >--- a/MdePkg/Include/Arm/ProcessorBind.h >+++ b/MdePkg/Include/Arm/ProcessorBind.h >@@ -148,6 +148,11 @@ typedef INT32 INTN; > /// > #define MAX_ADDRESS 0x > >+/// >+/// Maximum usable address at boot time >+/// >+#define MAX_ALLOC_ADDRESS MAX_ADDRESS >+ > /// > /// Maximum legal ARM INTN and UINTN values. > /// >diff --git a/MdePkg/Include/Ebc/ProcessorBind.h >b/MdePkg/Include/Ebc/ProcessorBind.h >index 5217cfd97eac..45beb7572817 100644 >--- a/MdePkg/Include/Ebc/ProcessorBind.h >+++ b/MdePkg/Include/Ebc/ProcessorBind.h >@@ -103,6 +103,11 @@ typedef unsigned long UINTN; > /// > #define MAX_ADDRESS ((UINTN)(~0ULL >> (64 - sizeof (INTN) * 8))) > >+/// >+/// Maximum usable address at boot time (48 bits using 4 KB pages) >+/// >+#define MAX_ALLOC_ADDRESS MAX_ADDRESS >+ > /// > /// Maximum legal EBC INTN and UINTN values. > /// >diff --git a/MdePkg/Include/Ia32/ProcessorBind.h >b/MdePkg/Include/Ia32/ProcessorBind.h >index 8e4de7029cfc..71d53e2543bb 100644 >--- a/MdePkg/Include/Ia32/ProcessorBind.h >+++ b/MdePkg/Include/Ia32/ProcessorBind.h >@@ -246,6 +246,11 @@ typedef INT32 INTN; > /// > #define MAX_ADDRESS 0x > >+/// >+/// Maximum usable address at boot time >+/// >+#define MAX_ALLOC_ADDRESS MAX_ADDRESS >+ > /// > /// Maximum legal IA-32 INTN and UINTN values. > /// >diff --git a/MdePkg/Include/X64/ProcessorBind.h >b/MdePkg/Include/X64/ProcessorBind.h >index e4254285877b..1c04090c7d03 100644 >--- a/MdePkg/Include/X64/ProcessorBind.h >+++ b/MdePkg/Include/X64/ProcessorBind.h >@@ -260,6 +260,11 @@ typedef INT64 INTN; > /// > #define MAX_ADDRESS 0xULL > >+/// >+/// Maximum usable address at boot time >+/// >+#define MAX_ALLOC_ADDRESS MAX_ADDRESS >+ > /// > /// Maximum legal x64 INTN and UINTN values. > /// >-- >2.19.2 > >___ >edk2-devel mailing list >edk2-devel@lists.01.org >https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] Drop CSM support in OvmfPkg?
On Mon, Dec 17, 2018 at 10:54:25AM +0100, Laszlo Ersek wrote: > (Adding Kevin, Gerd, David) > > On 12/17/18 03:23, Ni, Ruiyu wrote: > > Hi OvmfPkg maintainers and reviewers, > > I am working on removing IntelFrameworkModulePkg and IntelFrameworkPkg. The > > biggest dependency now I see is the CSM components that OVMF depends on. > > So I'd like to know your opinion about how to handle this. I see two > > options here: > > > > 1. Drop CSM support in OvmfPkg. > > 2. Create a OvmfPkg/Csm folder to duplicate all CSM components there. > > > > What's your opinion about this? > > (1) Personally I never use CSM builds of OVMF. The OVMF builds in RHEL > and Fedora also don't enable the CSM (mainly because I had found > debugging & supporting the CSM *extremely* difficult). For > virtualization, we generally recommend "use SeaBIOS directly if you need > a traditional BIOS guest". On a virtual machine it is very simple to switch the firmware (unlike on physical machines), which I think is the main reason ovmf+csm never really took off. > (3) However, David and Kevin had put a *lot* of work into enabling > SeaBIOS to function as a CSM in combination with OVMF. Today, the CSM > target is a dedicated / separate "build mode" of SeaBIOS. IIRC there are still some corner cases which are not working and nobody wants put any effort into fixing them. S3 suspend comes to mind. I'm not even sure it still works. It builds, yes, my jenkins instance does that. But there is no testing beyond that, and I doubt that someone else does regular ovmf+csm regression testing. So the chances that any runtime breakage goes unnoticed are pretty high ... > (4) I also think an open source CSM implementation should exist, just so > people can study it and experiment with it. It'll not be deleted from git, so it'll be there even when removed from master branch. > In short, I think the community would benefit if someone continued to > maintain the CSM infrastructure in edk2, But what is the point in keeping the infrastructure if even physical hardware starts to drop csm support? So, I'd go with option (1). cheers, Gerd ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH edk2-platforms v2 3/3] Platform/ARM/SgiPkg: Enable MmCommunication module on the platform
The ArmMmCommunication module is used for communication between non-secure and secure world using Arm's Management Mode Specification. Enable this module on Sgi platforms. This would be used subsequently by the RAS and SecureBoot features, support for which is to be added on the platform. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu --- Platform/ARM/SgiPkg/SgiPlatform.dsc | 18 ++ Platform/ARM/SgiPkg/SgiPlatform.fdf | 5 + 2 files changed, 23 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc index 7995c7d132d6..948b75631a00 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc @@ -197,6 +197,20 @@ [PcdsFixedAtBuild.common] gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x1 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|204 +!if $(ARM_STANDALONE_MM_ENABLE) == TRUE + # + # Set the base address and size of the buffer used + # for communication between the Normal world edk2 + # with StandaloneMm image at S-EL0 through MM_COMMUNICATE. + # This buffer gets allocated in ATF and since we do not have + # a mechanism currently to communicate the base address and + # size of this buffer from ATF, hard-code it here + # + ## MM Communicate + gArmTokenSpaceGuid.PcdMmBufferBase|0xFF60 + gArmTokenSpaceGuid.PcdMmBufferSize|0x1 +!endif + # # Components Section - list of all EDK II Modules needed by this Platform @@ -331,3 +345,7 @@ [Components.common] # SATA Controller # MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf + +!if $(ARM_STANDALONE_MM_ENABLE) == TRUE + ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf +!endif diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf index 80c3412fd4ad..01799de8a0c8 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -169,6 +169,11 @@ [FV.FvMain] # INF ShellPkg/Application/Shell/Shell.inf +!if $(ARM_STANDALONE_MM_ENABLE) == TRUE + # MM Communicate + INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf +!endif + # # Platform driver # -- 2.7.4 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH edk2-platforms v2 2/3] Platform/ARM/SgiPkg: Setup memory buffers for MmCommunicate
Add memory regions for MmCommuncate buffers into the virtual memory table. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu --- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 4 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 8 +++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 260be58fb38c..c0fcc8198201 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -25,6 +25,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Platform/ARM/SgiPkg/SgiPlatform.dec + StandaloneMmPkg/StandaloneMmPkg.dec [LibraryClasses] ArmLib @@ -62,6 +63,9 @@ [FixedPcd] gArmTokenSpaceGuid.PcdPciMmio64Base gArmTokenSpaceGuid.PcdPciMmio64Size + gArmTokenSpaceGuid.PcdMmBufferBase + gArmTokenSpaceGuid.PcdMmBufferSize + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress [Guids] diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 6ec2e8a7096d..60729e3c7158 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -22,7 +22,7 @@ #include // Total number of descriptors, including the final "end-of-table" descriptor. -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 12 +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 13 /** Returns the Virtual Memory Map of the platform. @@ -136,6 +136,12 @@ ArmPlatformGetVirtualMemoryMap ( SIZE_1MB; VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + // MM Memory Space + VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdMmBufferBase); + VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdMmBufferBase); + VirtualMemoryTable[Index].Length = PcdGet64 (PcdMmBufferSize); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; + // End of Table VirtualMemoryTable[++Index].PhysicalBase = 0; VirtualMemoryTable[Index].VirtualBase = 0; -- 2.7.4 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH edk2-platforms v2 1/3] Platform/ARM/SgiPkg: Build infrastructure for StandaloneMm image
Add the build infrastructure for compilation of StandaloneMm image files and FD file. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sughosh Ganu --- Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc | 130 +++ Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 100 + 2 files changed, 230 insertions(+) create mode 100644 Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc create mode 100644 Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc new file mode 100644 index ..4615c383c46a --- /dev/null +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc @@ -0,0 +1,130 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + + +# +# Defines Section - statements that will be processed to create a Makefile. +# + +[Defines] + PLATFORM_NAME = sgi_mm_standalone + PLATFORM_GUID = 34B78C8F-CFD5-49D5-8360-E91143F6106D + PLATFORM_VERSION = 1.0 + DSC_SPECIFICATION = 0x00010011 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES= AARCH64|ARM + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf + DEFINE DEBUG_MESSAGE = TRUE + + # LzmaF86 + DEFINE COMPRESSION_TOOL_GUID = D42AE6BD-1352-4bfb-909A-CA72A6EAE889 + + +# +# Library Class section - list of all Library Classes needed by this Platform. +# + +[LibraryClasses] + # + # Basic + # + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + FvLib|StandaloneMmPkg/Library/FvLib/FvLib.inf + HobLib|StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + MemLib|StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf + MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmCoreMemoryAllocationLib/StandaloneMmCoreMemoryAllocationLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + + # + # Entry point + # + StandaloneMmDriverEntryPoint|StandaloneMmPkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf + +[LibraryClasses.AARCH64] + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf + ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf + PeCoffExtraActionLib|StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeCoffExtraActionLib.inf + + # ARM PL011 UART Driver + PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + + StandaloneMmCoreEntryPoint|StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf + + +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# + +[PcdsFeatureFlag] + gStandaloneMmPkgTokenSpaceGuid.PcdStandaloneMmEnable|TRUE + +[PcdsFixedAtBuild] + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80CF + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xff + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x0f + +[PcdsFixedAtBuild.AARCH64] + ## PL011 - Serial Terminal + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF7 +
[edk2] [PATCH edk2-platforms v2 0/3] Platform/ARM/SgiPkg: Enable StandaloneMm on Sgi platforms
Changes since v1: Rebased on top of latest edk2-platforms master The following patches enable building of StandaloneMm image on Sgi platforms. The first patch adds build infra for StandaloneMm image. The second patch of the series adds memory buffer required for communication between the non-secure world with StandaloneMm image using MM Communicate. The third patch of the series enables MmCommunication module on the platform for it subsequent use by features like Secure-Boot and Error Injection and Handling for RAS. Sughosh Ganu (3): Platform/ARM/SgiPkg: Build infrastructure for StandaloneMm image Platform/ARM/SgiPkg: Setup memory buffers for MmCommunicate Platform/ARM/SgiPkg: Enable MmCommunication module on the platform Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc | 130 + Platform/ARM/SgiPkg/SgiPlatform.dsc| 18 +++ Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 100 Platform/ARM/SgiPkg/SgiPlatform.fdf| 5 + .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 4 + .../SgiPkg/Library/PlatformLib/PlatformLibMem.c| 8 +- 6 files changed, 264 insertions(+), 1 deletion(-) create mode 100644 Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc create mode 100644 Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf -- 2.7.4 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-non-osi 1/1] Platform/Socionext: update ARM-TF binary to include OP-TEE
On Wed, 19 Dec 2018 at 20:37, Ard Biesheuvel wrote: > > On Tue, 18 Dec 2018 at 14:05, Ard Biesheuvel > wrote: > > > > On Tue, 18 Dec 2018 at 14:04, Sumit Garg wrote: > > > > > > On Tue, 18 Dec 2018 at 18:30, Ard Biesheuvel > > > wrote: > > > > > > > > On Tue, 18 Dec 2018 at 13:58, Sumit Garg wrote: > > > > > > > > > > On Tue, 18 Dec 2018 at 18:16, Ard Biesheuvel > > > > > wrote: > > > > > > > > > > > > On Tue, 18 Dec 2018 at 13:09, Sumit Garg > > > > > > wrote: > > > > > > > > > > > > > > Include a prebuilt binary of OP-TEE OS built from commit > > > > > > > a5d528c7e54fd7726230483bd4cd5c4786d7703f. > > > > > > > (https://github.com/OP-TEE/optee_os.git master) > > > > > > > > > > > > > > Also update ARM-TF RELEASE build to commit 47577cbaaf4b. > > > > > > > > > > > > > > Cc: Ard Biesheuvel > > > > > > > Cc: Leif Lindholm > > > > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > > > > > > Signed-off-by: Sumit Garg > > > > > > > --- > > > > > > > Platform/Socionext/DeveloperBox/fip_all_arm_tf.bin | Bin 46824 > > > > > > > -> 415251 bytes > > > > > > > > > > > > Thanks Sumit! > > > > > > > > > > > > In the future, please use --no-binary when sending patches like > > > > > > this one. > > > > > > > > > > > > > > > > Sure will take care of this in future. > > > > > > > > > > > However, do you have any explanation why the size increases 10x? > > > > > > This > > > > > > patch adds the pseudo-TA, but OP-TEE was already included in the > > > > > > previous build, so this is a bit unexpected. > > > > > > > > > > > > > > > > Actually I think ARM-TF was not updated earlier to include OP-TEE in > > > > > upstream (tee.bin size: 316392 bytes). > > > > > > > > > > > > > Ah, right. So we added the OP-TEE aware ATF build but not OP-TEE > > > > itself? That would indeed explain it. > > > > > > We didn't updated ATF build at all in upstream. I think you have > > > updated ATF build in local repo [1] only. > > > > > > [1] git://git.linaro.org/leg/noupstream/edk2-non-osi.git > > > > > > > Indeed. > > I cannot apply this patch. Could you please rebase it to latest > upstream edk2-non-osi and send me a link to the repo? Here is the link [1] to upstream repo with this patch applied. [1] ssh://g...@git.linaro.org/people/sumit.garg/edk2-non-osi.git -Sumit ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v2 3/6] MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into account
Reviewed-by: Jian J Wang
> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Thursday, December 20, 2018 4:57 AM
> To: edk2-devel@lists.01.org
> Cc: Ard Biesheuvel ; Kinney, Michael D
> ; Gao, Liming ; Wang,
> Jian J ; Wu, Hao A ; Leif
> Lindholm ; Laszlo Ersek ; Eric
> Auger ; Andrew Jones ;
> Philippe Mathieu-Daude
> Subject: [PATCH v2 3/6] MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS
> into account
>
> Take MAX_ALLOC_ADDRESS into account in the implementation of the
> page allocation routines, so that they will only return memory
> that is addressable by the CPU at boot time, even if more memory
> is available in the GCD memory map.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
> ---
> MdeModulePkg/Core/Dxe/Mem/Page.c | 52 ++--
> 1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c
> b/MdeModulePkg/Core/Dxe/Mem/Page.c
> index 961c5b833546..5ad8e1171ef7 100644
> --- a/MdeModulePkg/Core/Dxe/Mem/Page.c
> +++ b/MdeModulePkg/Core/Dxe/Mem/Page.c
> @@ -52,26 +52,26 @@ LIST_ENTRY mFreeMemoryMapEntryList =
> INITIALIZE_LIST_HEAD_VARIABLE (mFreeMemor
> BOOLEAN mMemoryTypeInformationInitialized = FALSE;
>
> EFI_MEMORY_TYPE_STATISTICS mMemoryTypeStatistics[EfiMaxMemoryType +
> 1] = {
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiReservedMemoryType
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiLoaderCode
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiLoaderData
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiBootServicesCode
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiBootServicesData
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
> EfiRuntimeServicesCode
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
> EfiRuntimeServicesData
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiConventionalMemory
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiUnusableMemory
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiACPIReclaimMemory
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiACPIMemoryNVS
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiMemoryMappedIO
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiMemoryMappedIOPortSpace
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, // EfiPalCode
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiPersistentMemory
> - { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE } //
> EfiMaxMemoryType
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiReservedMemoryType
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiLoaderCode
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiLoaderData
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiBootServicesCode
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiBootServicesData
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
> EfiRuntimeServicesCode
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
> EfiRuntimeServicesData
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiConventionalMemory
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiUnusableMemory
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiACPIReclaimMemory
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
> EfiACPIMemoryNVS
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiMemoryMappedIO
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiMemoryMappedIOPortSpace
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
> EfiPalCode
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
> EfiPersistentMemory
> + { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE } //
> EfiMaxMemoryType
> };
>
> -EFI_PHYSICAL_ADDRESS mDefaultMaximumAddress = MAX_ADDRESS;
> -EFI_PHYSICAL_ADDRESS mDefaultBaseAddress = MAX_ADDRESS;
> +EFI_PHYSICAL_ADDRESS mDefaultMaximumAddress = MAX_ALLOC_ADDRESS;
> +EFI_PHYSICAL_ADDRESS mDefaultBaseAddress = MAX_ALLOC_ADDRESS;
>
> EFI_MEMORY_TYPE_INFORMATION
> gMemoryTypeInformation[EfiMaxMemoryType + 1] = {
>{ EfiReservedMemoryType, 0 },
> @@ -419,7 +419,7 @@ PromoteMemoryResource (
> Entry = CR (Link, EFI_GCD_MAP_ENTRY, Link, EFI_GCD_MAP_SIGNATURE);
>
> if (Entry->GcdMemoryType == EfiGcdMemoryTypeReserved &&
> -Entry->EndAddress < MAX_ADDRESS &&
> +Entry->EndAddress < MAX_ALLOC_ADDRESS &&
> (Entry->Capabilities &
Re: [edk2] [PATCH 1/1] UefiCpuPkg/CpuExceptionHandlerLib: Fix spelling issue
Hi Mike,
I searched the code base, found you missed one in PeiCpuException.c file. Can
you change it also and send the new patch again?
Thanks,
Eric
> -Original Message-
> From: Mike Maslenkin [mailto:mike.maslen...@gmail.com]
> Sent: Wednesday, December 19, 2018 7:55 AM
> To: edk2-devel@lists.01.org
> Cc: Mike Maslenkin ; Dong, Eric
> ; Laszlo Ersek
> Subject: [PATCH 1/1] UefiCpuPkg/CpuExceptionHandlerLib: Fix spelling issue
>
> *Excpetion* should be *Exception*
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Mike Maslenkin
> CC: Eric Dong
> CC: Laszlo Ersek
> ---
> UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h | 2
> +-
> UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c| 2 +-
> .../Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 2 +-
> .../Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> index e10d9379d596..cefa779b7e8a 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
> @@ -310,7 +310,7 @@ CommonExceptionHandlerWorker (
>@retval EFI_INVALID_PARAMETER StackSwitchData contains invalid
> content.
> **/
> EFI_STATUS
> -ArchSetupExcpetionStack (
> +ArchSetupExceptionStack (
>IN CPU_EXCEPTION_INIT_DATA*StackSwitchData
>);
>
> diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
> index 2a090782fc22..70ee7dd8bfb3 100644
> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
> +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
> @@ -285,7 +285,7 @@ InitializeCpuExceptionHandlersEx (
>
> InitData =
>}
> - Status = ArchSetupExcpetionStack (InitData);
> + Status = ArchSetupExceptionStack (InitData);
> }
>}
>
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.
> c
> index 04f2ab593c3e..8d1326c4ba71 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.
> c
> @@ -119,7 +119,7 @@ ArchRestoreExceptionContext (
>
> **/
> EFI_STATUS
> -ArchSetupExcpetionStack (
> +ArchSetupExceptionStack (
>IN CPU_EXCEPTION_INIT_DATA *StackSwitchData
>)
> {
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> index 56180f4c17e4..02dfa50fc7d0 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> @@ -124,7 +124,7 @@ ArchRestoreExceptionContext (
>
> **/
> EFI_STATUS
> -ArchSetupExcpetionStack (
> +ArchSetupExceptionStack (
>IN CPU_EXCEPTION_INIT_DATA *StackSwitchData
>)
> {
> --
> 2.19.2
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Re: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
Yes, I agree, if we don't have any real case.
> -Original Message-
> From: Ni, Ruiyu
> Sent: Thursday, December 20, 2018 10:07 AM
> To: Dong, Eric ; Yao, Jiewen
> ; edk2-devel@lists.01.org
> Cc: Laszlo Ersek
> Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> AP calls PeiService.
>
> Can you just change the AcquireSpinLock() behavior to remove the Timeout
> PCD consumption?
>
> I haven't seen a real case that the timed acquisition of spin lock is needed.
>
>
> Thanks/Ray
>
> > -Original Message-
> > From: Dong, Eric
> > Sent: Thursday, December 20, 2018 9:23 AM
> > To: Yao, Jiewen ; edk2-devel@lists.01.org
> > Cc: Ni, Ruiyu ; Laszlo Ersek
> > Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> > AP calls PeiService.
> >
> >
> > Agreed, Maybe it's time to add a new API like
> > AcquireSpinLockWithoutTimeOut?
> >
> > Thanks,
> > Eric
> > > -Original Message-
> > > From: Yao, Jiewen
> > > Sent: Thursday, December 20, 2018 9:19 AM
> > > To: Dong, Eric ; edk2-devel@lists.01.org
> > > Cc: Ni, Ruiyu ; Laszlo Ersek
> > > Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib:
> > > Avoid AP calls PeiService.
> > >
> > > Hi
> > > If we think below code is generic, can we have an API for that?
> > >
> > > + //
> > > + // Wait for the AP to release the MSR spin lock.
> > > + //
> > > + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> > > +CpuPause ();
> > > + }
> > >
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
> > > > Of Eric Dong
> > > > Sent: Thursday, December 20, 2018 9:16 AM
> > > > To: edk2-devel@lists.01.org
> > > > Cc: Ni, Ruiyu ; Laszlo Ersek
> > > > Subject: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> > > > AP calls PeiService.
> > > >
> > > > In AcquireSpinLock function, it calls GetPerformanceCounter which
> > > > final calls PeiService service. This patch avoid to call
> > > > AcquireSpinLock function.
> > > >
> > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
> > > >
> > > > Cc: Ruiyu Ni
> > > > Cc: Laszlo Ersek
> > > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > > Signed-off-by: Eric Dong
> > > > ---
> > > > UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c |
> > > > 7
> > > > ++-
> > > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git
> > > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > > index 624ddee055..a64326239f 100644
> > > > ---
> > > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > > +++
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.
> > > > +++ c
> > > > @@ -832,7 +832,12 @@ ProgramProcessorRegister (
> > > > RegisterTableEntry = [Index];
> > > >
> > > > DEBUG_CODE_BEGIN ();
> > > > - AcquireSpinLock (>ConsoleLogLock);
> > > > + //
> > > > + // Wait for the AP to release the MSR spin lock.
> > > > + //
> > > > + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> > > > +CpuPause ();
> > > > + }
> > > >ThreadIndex = ApLocation->Package *
> CpuStatus->MaxCoreCount *
> > > > CpuStatus->MaxThreadCount +
> > > >ApLocation->Core * CpuStatus->MaxThreadCount +
> > > >ApLocation->Thread;
> > > > --
> > > > 2.15.0.windows.1
> > > >
> > > > ___
> > > > edk2-devel mailing list
> > > > edk2-devel@lists.01.org
> > > > https://lists.01.org/mailman/listinfo/edk2-devel
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Re: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
Can you just change the AcquireSpinLock() behavior to remove the Timeout PCD
consumption?
I haven't seen a real case that the timed acquisition of spin lock is needed.
Thanks/Ray
> -Original Message-
> From: Dong, Eric
> Sent: Thursday, December 20, 2018 9:23 AM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Laszlo Ersek
> Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> AP calls PeiService.
>
>
> Agreed, Maybe it's time to add a new API like
> AcquireSpinLockWithoutTimeOut?
>
> Thanks,
> Eric
> > -Original Message-
> > From: Yao, Jiewen
> > Sent: Thursday, December 20, 2018 9:19 AM
> > To: Dong, Eric ; edk2-devel@lists.01.org
> > Cc: Ni, Ruiyu ; Laszlo Ersek
> > Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib:
> > Avoid AP calls PeiService.
> >
> > Hi
> > If we think below code is generic, can we have an API for that?
> >
> > + //
> > + // Wait for the AP to release the MSR spin lock.
> > + //
> > + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> > +CpuPause ();
> > + }
> >
> >
> >
> >
> > > -Original Message-
> > > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
> > > Of Eric Dong
> > > Sent: Thursday, December 20, 2018 9:16 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: Ni, Ruiyu ; Laszlo Ersek
> > > Subject: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> > > AP calls PeiService.
> > >
> > > In AcquireSpinLock function, it calls GetPerformanceCounter which
> > > final calls PeiService service. This patch avoid to call
> > > AcquireSpinLock function.
> > >
> > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
> > >
> > > Cc: Ruiyu Ni
> > > Cc: Laszlo Ersek
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Eric Dong
> > > ---
> > > UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c |
> > > 7
> > > ++-
> > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git
> > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > index 624ddee055..a64326239f 100644
> > > ---
> > > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.
> > > +++ c
> > > @@ -832,7 +832,12 @@ ProgramProcessorRegister (
> > > RegisterTableEntry = [Index];
> > >
> > > DEBUG_CODE_BEGIN ();
> > > - AcquireSpinLock (>ConsoleLogLock);
> > > + //
> > > + // Wait for the AP to release the MSR spin lock.
> > > + //
> > > + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> > > +CpuPause ();
> > > + }
> > >ThreadIndex = ApLocation->Package * CpuStatus->MaxCoreCount *
> > > CpuStatus->MaxThreadCount +
> > >ApLocation->Core * CpuStatus->MaxThreadCount +
> > >ApLocation->Thread;
> > > --
> > > 2.15.0.windows.1
> > >
> > > ___
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
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Re: [edk2] [Patch 3/3] UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless function.
Nice cleanup.
Reviewed-by: Ruiyu Ni
Thanks/Ray
> -Original Message-
> From: Dong, Eric
> Sent: Thursday, December 20, 2018 9:16 AM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Laszlo Ersek
> Subject: [Patch 3/3] UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless
> function.
>
> Directly call the API instead of create function for it.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
>
> Cc: Ruiyu Ni
> Cc: Laszlo Ersek
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong
> ---
> .../PeiRegisterCpuFeaturesLib.c| 35
> +-
> 1 file changed, 8 insertions(+), 27 deletions(-)
>
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
> index 0bbcb50181..fdd0791c89 100644
> ---
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
> +++
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
> @@ -67,32 +67,6 @@ GetCpuFeaturesData (
>return CpuInitData;
> }
>
> -/**
> - Worker function to get MP PPI service pointer.
> -
> - @return PEI PPI service pointer.
> -**/
> -EFI_PEI_MP_SERVICES_PPI *
> -GetMpPpi (
> - VOID
> - )
> -{
> - EFI_STATUS Status;
> - EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
> -
> - //
> - // Get MP Services Protocol
> - //
> - Status = PeiServicesLocatePpi (
> - ,
> - 0,
> - NULL,
> - (VOID **)
> - );
> - ASSERT_EFI_ERROR (Status);
> - return CpuMpPpi;
> -}
> -
> /**
>Worker function to return processor index.
>
> @@ -139,7 +113,14 @@ GetProcessorInformation (
>EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
>EFI_STATUS Status;
>
> - CpuMpPpi = GetMpPpi ();
> + Status = PeiServicesLocatePpi (
> + ,
> + 0,
> + NULL,
> + (VOID **)
> + );
> + ASSERT_EFI_ERROR (Status);
> +
>Status = CpuMpPpi->GetProcessorInfo (
> GetPeiServicesTablePointer(),
> CpuMpPpi,
> --
> 2.15.0.windows.1
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[edk2] [PATCH v2 0/6] Delete TCP, PXE, iSCSI driver in MdeModulePkg
Delete TCP, PXE, iSCSI driver in MdeModulePkg This patch series is to delete the Tcp4Dxe, UefiPxeBcDxe and IScsi4Dxe drivers in MdeModulePkg. These drivers will not be maintained and can't co-work with the dual-stack drivers in NetworkPkg. In future, people should use below NetworkPkg drivers instead: NetworkPkg/IScsiDxe/IScsiDxe.inf NetworkPkg/TcpDxe/TcpDxe.inf NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf These drivers are actively maintained with more bug fixes and new feature support. All edk2 platforms DSC/FDF have already been updated to use the NetworkPkg drivers in privious patch. Bugzilla link: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 v2: Break original patch to separate commits per module. Cc: Jian J Wang Cc: Hao Wu Cc: Ruiyu Ni Cc: Star Zeng Cc: Jiaxin Wu Siyuan Fu (6): MdeModulePkg: Delete Tcp4Dxe in MdeModulePkg. NetworkPkg: Remove some clarification from TcpDxe.inf MdeModulePkg: Delete IScsiDxe in MdeModulePkg. NetworkPkg: Remove some clarification from IScsiDxe.inf MdeModulePkg: Delete UefiPxeBcDxe in MdeModulePkg. NetworkPkg: Remove some clarification from UefiPxeBcDxe.inf .../Network/IScsiDxe/ComponentName.c | 283 -- .../Universal/Network/IScsiDxe/IScsiCHAP.c| 430 --- .../Universal/Network/IScsiDxe/IScsiConfig.c | 1264 --- .../Universal/Network/IScsiDxe/IScsiDhcp.c| 472 --- .../Universal/Network/IScsiDxe/IScsiDriver.c | 676 .../Network/IScsiDxe/IScsiExtScsiPassThru.c | 412 --- .../Universal/Network/IScsiDxe/IScsiIbft.c| 539 --- .../Network/IScsiDxe/IScsiInitiatorName.c | 116 - .../Universal/Network/IScsiDxe/IScsiMisc.c| 948 -- .../Universal/Network/IScsiDxe/IScsiProto.c | 2799 --- .../Universal/Network/IScsiDxe/IScsiTcp4Io.c | 487 --- MdeModulePkg/Universal/Network/IScsiDxe/Md5.c | 350 -- .../Universal/Network/Tcp4Dxe/ComponentName.c | 433 --- .../Universal/Network/Tcp4Dxe/SockImpl.c | 1201 --- .../Universal/Network/Tcp4Dxe/SockInterface.c | 990 -- .../Network/Tcp4Dxe/Tcp4Dispatcher.c | 717 .../Universal/Network/Tcp4Dxe/Tcp4Driver.c| 782 - .../Universal/Network/Tcp4Dxe/Tcp4Input.c | 1497 - .../Universal/Network/Tcp4Dxe/Tcp4Io.c| 112 - .../Universal/Network/Tcp4Dxe/Tcp4Main.c | 674 .../Universal/Network/Tcp4Dxe/Tcp4Misc.c | 940 -- .../Universal/Network/Tcp4Dxe/Tcp4Option.c| 352 -- .../Universal/Network/Tcp4Dxe/Tcp4Output.c| 1238 --- .../Universal/Network/Tcp4Dxe/Tcp4Timer.c | 584 .../Network/UefiPxeBcDxe/ComponentName.c | 365 -- .../Network/UefiPxeBcDxe/PxeBcDhcp.c | 1999 --- .../Network/UefiPxeBcDxe/PxeBcDriver.c| 665 .../Network/UefiPxeBcDxe/PxeBcImpl.c | 2989 - .../Network/UefiPxeBcDxe/PxeBcMtftp.c | 454 --- .../Network/UefiPxeBcDxe/PxeBcSupport.c | 221 -- MdeModulePkg/MdeModulePkg.dsc |3 - .../Network/IScsiDxe/ComponentName.h | 165 - .../Universal/Network/IScsiDxe/IScsi4Dxe.uni | 25 - .../Network/IScsiDxe/IScsi4DxeExtra.uni | 20 - .../Universal/Network/IScsiDxe/IScsiCHAP.h| 106 - .../Universal/Network/IScsiDxe/IScsiCommon.h | 22 - .../Universal/Network/IScsiDxe/IScsiConfig.h | 166 - .../Network/IScsiDxe/IScsiConfigDxe.vfr | 219 -- .../IScsiDxe/IScsiConfigDxeStrings.uni| 62 - .../Network/IScsiDxe/IScsiConfigNVDataStruc.h | 109 - .../Universal/Network/IScsiDxe/IScsiDhcp.h| 55 - .../Universal/Network/IScsiDxe/IScsiDriver.h | 140 - .../Universal/Network/IScsiDxe/IScsiDxe.inf | 134 - .../Network/IScsiDxe/IScsiExtScsiPassThru.h | 22 - .../Universal/Network/IScsiDxe/IScsiIbft.h| 38 - .../Universal/Network/IScsiDxe/IScsiImpl.h| 168 - .../Network/IScsiDxe/IScsiInitiatorName.h | 74 - .../Universal/Network/IScsiDxe/IScsiMisc.h| 317 -- .../Universal/Network/IScsiDxe/IScsiProto.h | 1005 -- .../Universal/Network/IScsiDxe/IScsiTcp4Io.h | 142 - MdeModulePkg/Universal/Network/IScsiDxe/Md5.h | 80 - .../Universal/Network/Tcp4Dxe/SockImpl.h | 131 - .../Universal/Network/Tcp4Dxe/Socket.h| 954 -- .../Universal/Network/Tcp4Dxe/Tcp4Driver.h| 342 -- .../Universal/Network/Tcp4Dxe/Tcp4Dxe.inf | 94 - .../Universal/Network/Tcp4Dxe/Tcp4Dxe.uni | 23 - .../Network/Tcp4Dxe/Tcp4DxeExtra.uni | 20 - .../Universal/Network/Tcp4Dxe/Tcp4Func.h | 781 - .../Universal/Network/Tcp4Dxe/Tcp4Main.h | 494 --- .../Universal/Network/Tcp4Dxe/Tcp4Option.h| 130 - .../Universal/Network/Tcp4Dxe/Tcp4Proto.h | 357 -- .../Network/UefiPxeBcDxe/PxeBcDhcp.h | 502 --- .../Network/UefiPxeBcDxe/PxeBcDriver.h| 102 - .../Network/UefiPxeBcDxe/PxeBcImpl.h | 189 -- .../Network/UefiPxeBcDxe/PxeBcMtftp.h | 137 - .../Network/UefiPxeBcDxe/PxeBcSupport.h | 134 -
[edk2] [PATCH v2 6/6] NetworkPkg: Remove some clarification from UefiPxeBcDxe.inf
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu --- Notes: v2: Break original patch to separate commits per module. NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf | 6 -- 1 file changed, 6 deletions(-) diff --git a/NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf b/NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf index 130a5456e2c1..63430711e71b 100644 --- a/NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf +++ b/NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf @@ -5,12 +5,6 @@ # PXE-compatible device for network access or booting. This driver supports # both IPv4 and IPv6 network stack. # -# Notes: -# 1) This driver can't co-work with the UefiPxeBcDxe driver in MdeModulePkg. -# 2) This driver includes more bug fixes and supports more features (e.g. IPv6, -# MTFTP windowsize) than the UefiPxeBcDxe driver in MdeModulePkg. So, we -# recommend using this driver even though both of them can be used. -# # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. # # This program and the accompanying materials -- 2.19.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 4/6] NetworkPkg: Remove some clarification from IScsiDxe.inf
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu --- Notes: v2: Break original patch to separate commits per module. NetworkPkg/IScsiDxe/IScsiDxe.inf | 10 -- 1 file changed, 10 deletions(-) diff --git a/NetworkPkg/IScsiDxe/IScsiDxe.inf b/NetworkPkg/IScsiDxe/IScsiDxe.inf index 195dc191250f..bdf1313aa957 100644 --- a/NetworkPkg/IScsiDxe/IScsiDxe.inf +++ b/NetworkPkg/IScsiDxe/IScsiDxe.inf @@ -4,16 +4,6 @@ # The iSCSI driver provides iSCSI service in the preboot environment and supports # booting over iSCSI. This driver supports both IPv4 and IPv6 network stack. # -# Notes: -# 1) This driver can't co-work with the IScsiDxe driver in MdeModulePkg. -# 2) This driver includes more bug fixes and supports more features (e.g. IPv6, Dns -# support for target URL configuration, iSCSI keyword support) than the IscsiDxe -# driver in MdeModulePkg. So, we recommend using this driver even though both of -# them can be used. -# 3) This driver depends on OpenSSL. To use this driver, please follow the -# instructions found in the file "OpenSSL-HOWTO.txt" located in -# CryptoPkg\Library\OpensslLib to enable the OpenSSL building first. -# # Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved. # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License -- 2.19.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 0/6] Delete TCP, PXE, iSCSI driver in MdeModulePkg
Delete TCP, PXE, iSCSI driver in MdeModulePkg This patch series is to delete the Tcp4Dxe, UefiPxeBcDxe and IScsi4Dxe drivers in MdeModulePkg. These drivers will not be maintained and can't co-work with the dual-stack drivers in NetworkPkg. In future, people should use below NetworkPkg drivers instead: NetworkPkg/IScsiDxe/IScsiDxe.inf NetworkPkg/TcpDxe/TcpDxe.inf NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf These drivers are actively maintained with more bug fixes and new feature support. All edk2 platforms DSC/FDF have already been updated to use the NetworkPkg drivers in privious patch. Bugzilla link: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 v2: Break original patch to separate commits per module. Siyuan Fu (6): MdeModulePkg: Delete Tcp4Dxe in MdeModulePkg. NetworkPkg: Remove some clarification from TcpDxe.inf MdeModulePkg: Delete IScsiDxe in MdeModulePkg. NetworkPkg: Remove some clarification from IScsiDxe.inf MdeModulePkg: Delete UefiPxeBcDxe in MdeModulePkg. NetworkPkg: Remove some clarification from UefiPxeBcDxe.inf .../Network/IScsiDxe/ComponentName.c | 283 -- .../Universal/Network/IScsiDxe/IScsiCHAP.c| 430 --- .../Universal/Network/IScsiDxe/IScsiConfig.c | 1264 --- .../Universal/Network/IScsiDxe/IScsiDhcp.c| 472 --- .../Universal/Network/IScsiDxe/IScsiDriver.c | 676 .../Network/IScsiDxe/IScsiExtScsiPassThru.c | 412 --- .../Universal/Network/IScsiDxe/IScsiIbft.c| 539 --- .../Network/IScsiDxe/IScsiInitiatorName.c | 116 - .../Universal/Network/IScsiDxe/IScsiMisc.c| 948 -- .../Universal/Network/IScsiDxe/IScsiProto.c | 2799 --- .../Universal/Network/IScsiDxe/IScsiTcp4Io.c | 487 --- MdeModulePkg/Universal/Network/IScsiDxe/Md5.c | 350 -- .../Universal/Network/Tcp4Dxe/ComponentName.c | 433 --- .../Universal/Network/Tcp4Dxe/SockImpl.c | 1201 --- .../Universal/Network/Tcp4Dxe/SockInterface.c | 990 -- .../Network/Tcp4Dxe/Tcp4Dispatcher.c | 717 .../Universal/Network/Tcp4Dxe/Tcp4Driver.c| 782 - .../Universal/Network/Tcp4Dxe/Tcp4Input.c | 1497 - .../Universal/Network/Tcp4Dxe/Tcp4Io.c| 112 - .../Universal/Network/Tcp4Dxe/Tcp4Main.c | 674 .../Universal/Network/Tcp4Dxe/Tcp4Misc.c | 940 -- .../Universal/Network/Tcp4Dxe/Tcp4Option.c| 352 -- .../Universal/Network/Tcp4Dxe/Tcp4Output.c| 1238 --- .../Universal/Network/Tcp4Dxe/Tcp4Timer.c | 584 .../Network/UefiPxeBcDxe/ComponentName.c | 365 -- .../Network/UefiPxeBcDxe/PxeBcDhcp.c | 1999 --- .../Network/UefiPxeBcDxe/PxeBcDriver.c| 665 .../Network/UefiPxeBcDxe/PxeBcImpl.c | 2989 - .../Network/UefiPxeBcDxe/PxeBcMtftp.c | 454 --- .../Network/UefiPxeBcDxe/PxeBcSupport.c | 221 -- MdeModulePkg/MdeModulePkg.dsc |3 - .../Network/IScsiDxe/ComponentName.h | 165 - .../Universal/Network/IScsiDxe/IScsi4Dxe.uni | 25 - .../Network/IScsiDxe/IScsi4DxeExtra.uni | 20 - .../Universal/Network/IScsiDxe/IScsiCHAP.h| 106 - .../Universal/Network/IScsiDxe/IScsiCommon.h | 22 - .../Universal/Network/IScsiDxe/IScsiConfig.h | 166 - .../Network/IScsiDxe/IScsiConfigDxe.vfr | 219 -- .../IScsiDxe/IScsiConfigDxeStrings.uni| 62 - .../Network/IScsiDxe/IScsiConfigNVDataStruc.h | 109 - .../Universal/Network/IScsiDxe/IScsiDhcp.h| 55 - .../Universal/Network/IScsiDxe/IScsiDriver.h | 140 - .../Universal/Network/IScsiDxe/IScsiDxe.inf | 134 - .../Network/IScsiDxe/IScsiExtScsiPassThru.h | 22 - .../Universal/Network/IScsiDxe/IScsiIbft.h| 38 - .../Universal/Network/IScsiDxe/IScsiImpl.h| 168 - .../Network/IScsiDxe/IScsiInitiatorName.h | 74 - .../Universal/Network/IScsiDxe/IScsiMisc.h| 317 -- .../Universal/Network/IScsiDxe/IScsiProto.h | 1005 -- .../Universal/Network/IScsiDxe/IScsiTcp4Io.h | 142 - MdeModulePkg/Universal/Network/IScsiDxe/Md5.h | 80 - .../Universal/Network/Tcp4Dxe/SockImpl.h | 131 - .../Universal/Network/Tcp4Dxe/Socket.h| 954 -- .../Universal/Network/Tcp4Dxe/Tcp4Driver.h| 342 -- .../Universal/Network/Tcp4Dxe/Tcp4Dxe.inf | 94 - .../Universal/Network/Tcp4Dxe/Tcp4Dxe.uni | 23 - .../Network/Tcp4Dxe/Tcp4DxeExtra.uni | 20 - .../Universal/Network/Tcp4Dxe/Tcp4Func.h | 781 - .../Universal/Network/Tcp4Dxe/Tcp4Main.h | 494 --- .../Universal/Network/Tcp4Dxe/Tcp4Option.h| 130 - .../Universal/Network/Tcp4Dxe/Tcp4Proto.h | 357 -- .../Network/UefiPxeBcDxe/PxeBcDhcp.h | 502 --- .../Network/UefiPxeBcDxe/PxeBcDriver.h| 102 - .../Network/UefiPxeBcDxe/PxeBcImpl.h | 189 -- .../Network/UefiPxeBcDxe/PxeBcMtftp.h | 137 - .../Network/UefiPxeBcDxe/PxeBcSupport.h | 134 - .../Network/UefiPxeBcDxe/UefiPxe4BcDxe.uni| 25 -
[edk2] [PATCH v2 2/6] NetworkPkg: Remove some clarification from TcpDxe.inf
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu --- Notes: v2: Break original patch to separate commits per module. NetworkPkg/TcpDxe/TcpDxe.inf | 6 -- 1 file changed, 6 deletions(-) diff --git a/NetworkPkg/TcpDxe/TcpDxe.inf b/NetworkPkg/TcpDxe/TcpDxe.inf index 9433fb875cba..c4e3de7ec5ce 100644 --- a/NetworkPkg/TcpDxe/TcpDxe.inf +++ b/NetworkPkg/TcpDxe/TcpDxe.inf @@ -5,12 +5,6 @@ # It might provide TCPv4 Protocol or TCPv6 Protocol or both of them that depends on which network # stack has been loaded in system. This driver supports both IPv4 and IPv6 network stack. # -# Notes: -# 1) This driver can't co-work with the Tcp4Dxe driver in MdeModulePkg. -# 2) This driver includes more bug fixes and supports more features (e.g. IPv6, TCP Cancel -# function) than the Tcp4Dxe driver in MdeModulePkg. So, we recommend using this driver -# even though both of them can be used. -# # Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved. # # This program and the accompanying materials -- 2.19.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
Agreed, Maybe it's time to add a new API like AcquireSpinLockWithoutTimeOut?
Thanks,
Eric
> -Original Message-
> From: Yao, Jiewen
> Sent: Thursday, December 20, 2018 9:19 AM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Laszlo Ersek
> Subject: RE: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> AP calls PeiService.
>
> Hi
> If we think below code is generic, can we have an API for that?
>
> + //
> + // Wait for the AP to release the MSR spin lock.
> + //
> + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> +CpuPause ();
> + }
>
>
>
>
> > -Original Message-
> > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> > Eric Dong
> > Sent: Thursday, December 20, 2018 9:16 AM
> > To: edk2-devel@lists.01.org
> > Cc: Ni, Ruiyu ; Laszlo Ersek
> > Subject: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid
> > AP calls PeiService.
> >
> > In AcquireSpinLock function, it calls GetPerformanceCounter which
> > final calls PeiService service. This patch avoid to call
> > AcquireSpinLock function.
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
> >
> > Cc: Ruiyu Ni
> > Cc: Laszlo Ersek
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Eric Dong
> > ---
> > UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 7
> > ++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > index 624ddee055..a64326239f 100644
> > ---
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.
> > +++ c
> > @@ -832,7 +832,12 @@ ProgramProcessorRegister (
> > RegisterTableEntry = [Index];
> >
> > DEBUG_CODE_BEGIN ();
> > - AcquireSpinLock (>ConsoleLogLock);
> > + //
> > + // Wait for the AP to release the MSR spin lock.
> > + //
> > + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> > +CpuPause ();
> > + }
> >ThreadIndex = ApLocation->Package * CpuStatus->MaxCoreCount *
> > CpuStatus->MaxThreadCount +
> >ApLocation->Core * CpuStatus->MaxThreadCount +
> >ApLocation->Thread;
> > --
> > 2.15.0.windows.1
> >
> > ___
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
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Re: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
Hi
If we think below code is generic, can we have an API for that?
+ //
+ // Wait for the AP to release the MSR spin lock.
+ //
+ while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
+CpuPause ();
+ }
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Eric Dong
> Sent: Thursday, December 20, 2018 9:16 AM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Laszlo Ersek
> Subject: [edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP
> calls PeiService.
>
> In AcquireSpinLock function, it calls GetPerformanceCounter which
> final calls PeiService service. This patch avoid to call
> AcquireSpinLock function.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
>
> Cc: Ruiyu Ni
> Cc: Laszlo Ersek
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong
> ---
> UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 7
> ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> index 624ddee055..a64326239f 100644
> --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> @@ -832,7 +832,12 @@ ProgramProcessorRegister (
> RegisterTableEntry = [Index];
>
> DEBUG_CODE_BEGIN ();
> - AcquireSpinLock (>ConsoleLogLock);
> + //
> + // Wait for the AP to release the MSR spin lock.
> + //
> + while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
> +CpuPause ();
> + }
>ThreadIndex = ApLocation->Package * CpuStatus->MaxCoreCount *
> CpuStatus->MaxThreadCount +
>ApLocation->Core * CpuStatus->MaxThreadCount +
>ApLocation->Thread;
> --
> 2.15.0.windows.1
>
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[edk2] [Patch 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
GetProcessorIndex function calls GetMpPpi to get the MP Ppi.
Ap will calls GetProcessorIndex function which final let AP
calls PeiService.
This patch avoid GetProcessorIndex call PeiService.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
Cc: Ruiyu Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
.../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 2 +-
.../DxeRegisterCpuFeaturesLib.c | 6 --
.../PeiRegisterCpuFeaturesLib.c | 21 -
.../RegisterCpuFeaturesLib/RegisterCpuFeatures.h| 6 +-
4 files changed, 26 insertions(+), 9 deletions(-)
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index a64326239f..81f4652a03 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -409,7 +409,7 @@ CollectProcessorData (
CPU_FEATURES_DATA*CpuFeaturesData;
CpuFeaturesData = (CPU_FEATURES_DATA *)Buffer;
- ProcessorNumber = GetProcessorIndex ();
+ ProcessorNumber = GetProcessorIndex (CpuFeaturesData);
CpuInfo = >InitOrder[ProcessorNumber].CpuInfo;
//
// collect processor information
diff --git
a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
index 926698dc95..6f3e5bd2a8 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
@@ -66,11 +66,13 @@ GetMpProtocol (
/**
Worker function to return processor index.
+ @param CpuFeaturesDataCpu Feature Data structure.
+
@return The processor index.
**/
UINTN
GetProcessorIndex (
- VOID
+ IN CPU_FEATURES_DATA*CpuFeaturesData
)
{
EFI_STATUS Status;
@@ -225,7 +227,7 @@ CpuFeaturesInitialize (
CpuFeaturesData = GetCpuFeaturesData ();
- OldBspNumber = GetProcessorIndex();
+ OldBspNumber = GetProcessorIndex(CpuFeaturesData);
CpuFeaturesData->BspNumber = OldBspNumber;
Status = gBS->CreateEvent (
diff --git
a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
index 0bb3dee8b6..0bbcb50181 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
@@ -96,20 +96,26 @@ GetMpPpi (
/**
Worker function to return processor index.
+ @param CpuFeaturesDataCpu Feature Data structure.
+
@return The processor index.
**/
UINTN
GetProcessorIndex (
- VOID
+ IN CPU_FEATURES_DATA*CpuFeaturesData
)
{
EFI_STATUS Status;
- EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
UINTN ProcessorIndex;
+ EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
- CpuMpPpi = GetMpPpi ();
+ ASSERT (CpuFeaturesData->CpuMpPpi != NULL);
+ if (CpuFeaturesData->CpuMpPpi == NULL) {
+return (UINTN) (-1);
+ }
+ CpuMpPpi = (EFI_PEI_MP_SERVICES_PPI *)CpuFeaturesData->CpuMpPpi;
- Status = CpuMpPpi->WhoAmI(GetPeiServicesTablePointer (), CpuMpPpi,
);
+ Status = CpuMpPpi->WhoAmI(NULL, CpuMpPpi, );
ASSERT_EFI_ERROR (Status);
return ProcessorIndex;
}
@@ -286,6 +292,9 @@ GetNumberOfProcessor (
{
EFI_STATUS Status;
EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
+ CPU_FEATURES_DATA *CpuFeaturesData;
+
+ CpuFeaturesData = GetCpuFeaturesData();
//
// Get MP Services Protocol
@@ -298,6 +307,8 @@ GetNumberOfProcessor (
);
ASSERT_EFI_ERROR (Status);
+ CpuFeaturesData->CpuMpPpi = CpuMpPpi;
+
//
// Get the number of CPUs
//
@@ -329,7 +340,7 @@ CpuFeaturesInitialize (
CpuFeaturesData = GetCpuFeaturesData ();
- OldBspNumber = GetProcessorIndex();
+ OldBspNumber = GetProcessorIndex (CpuFeaturesData);
CpuFeaturesData->BspNumber = OldBspNumber;
//
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
index cf3da84837..19c3420511 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
@@ -85,6 +85,8 @@ typedef struct {
UINTNBspNumber;
PROGRAM_CPU_REGISTER_FLAGS CpuFlags;
+
+ VOID *CpuMpPpi;
} CPU_FEATURES_DATA;
#define CPU_FEATURE_ENTRY_FROM_LINK(a) \
@@ -108,11 +110,13 @@ GetCpuFeaturesData (
/**
Worker function to return processor index.
+ @param CpuFeaturesDataCpu Feature Data structure.
+
@return The processor index.
**/
UINTN
GetProcessorIndex (
- VOID
+ IN CPU_FEATURES_DATA*CpuFeaturesData
);
/**
--
[edk2] [Patch 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService.
In AcquireSpinLock function, it calls GetPerformanceCounter which
final calls PeiService service. This patch avoid to call
AcquireSpinLock function.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
Cc: Ruiyu Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index 624ddee055..a64326239f 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -832,7 +832,12 @@ ProgramProcessorRegister (
RegisterTableEntry = [Index];
DEBUG_CODE_BEGIN ();
- AcquireSpinLock (>ConsoleLogLock);
+ //
+ // Wait for the AP to release the MSR spin lock.
+ //
+ while (!AcquireSpinLockOrFail (>ConsoleLogLock)) {
+CpuPause ();
+ }
ThreadIndex = ApLocation->Package * CpuStatus->MaxCoreCount *
CpuStatus->MaxThreadCount +
ApLocation->Core * CpuStatus->MaxThreadCount +
ApLocation->Thread;
--
2.15.0.windows.1
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[edk2] [Patch 0/3] Avoid AP calls PeiService
AP should not use PeiServices. This patches fixed two issues which both caused by AP try to call PeiServices. Eric Dong (3): UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService. UefiCpuPkg/RegisterCpuFeaturesLib: Avoid AP calls PeiService. UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless function. .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 9 +++- .../DxeRegisterCpuFeaturesLib.c| 6 ++- .../PeiRegisterCpuFeaturesLib.c| 56 ++ .../RegisterCpuFeaturesLib/RegisterCpuFeatures.h | 6 ++- 4 files changed, 40 insertions(+), 37 deletions(-) -- 2.15.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [Patch 3/3] UefiCpuPkg/RegisterCpuFeaturesLib: Remove useless function.
Directly call the API instead of create function for it.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1411
Cc: Ruiyu Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
.../PeiRegisterCpuFeaturesLib.c| 35 +-
1 file changed, 8 insertions(+), 27 deletions(-)
diff --git
a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
index 0bbcb50181..fdd0791c89 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
@@ -67,32 +67,6 @@ GetCpuFeaturesData (
return CpuInitData;
}
-/**
- Worker function to get MP PPI service pointer.
-
- @return PEI PPI service pointer.
-**/
-EFI_PEI_MP_SERVICES_PPI *
-GetMpPpi (
- VOID
- )
-{
- EFI_STATUS Status;
- EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
-
- //
- // Get MP Services Protocol
- //
- Status = PeiServicesLocatePpi (
- ,
- 0,
- NULL,
- (VOID **)
- );
- ASSERT_EFI_ERROR (Status);
- return CpuMpPpi;
-}
-
/**
Worker function to return processor index.
@@ -139,7 +113,14 @@ GetProcessorInformation (
EFI_PEI_MP_SERVICES_PPI*CpuMpPpi;
EFI_STATUS Status;
- CpuMpPpi = GetMpPpi ();
+ Status = PeiServicesLocatePpi (
+ ,
+ 0,
+ NULL,
+ (VOID **)
+ );
+ ASSERT_EFI_ERROR (Status);
+
Status = CpuMpPpi->GetProcessorInfo (
GetPeiServicesTablePointer(),
CpuMpPpi,
--
2.15.0.windows.1
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Re: [edk2] [PATCH edk2-platforms 23/41] Platform/NXP: Add Platform driver for LS1046 RDB board
Add a commit message please.
Like - what is going on with the handling of multiple I2c masters?
On Wed, Nov 28, 2018 at 08:31:37PM +0530, Meenakshi Aggarwal wrote:
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> .../Drivers/PlatformDxe/PlatformDxe.c | 119
> +
> .../Drivers/PlatformDxe/PlatformDxe.inf| 58 ++
> 2 files changed, 177 insertions(+)
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
>
> diff --git a/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c
> b/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c
> new file mode 100644
> index 000..b74818e
> --- /dev/null
> +++ b/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -0,0 +1,119 @@
> +/** @file
> + LS1046 RDB board DXE platform driver.
> +
> + Copyright 2018 NXP
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +**/
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +typedef struct {
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR StartDesc;
> + UINT8 EndDesc;
> +} ADDRESS_SPACE_DESCRIPTOR;
> +
> +STATIC ADDRESS_SPACE_DESCRIPTOR mI2cDesc[FixedPcdGet64
> (PcdNumI2cController)];
> +
> +STATIC
> +EFI_STATUS
> +RegisterDevice (
> + IN EFI_GUID*TypeGuid,
> + IN ADDRESS_SPACE_DESCRIPTOR*Desc,
> + OUT EFI_HANDLE *Handle
> + )
> +{
> + NON_DISCOVERABLE_DEVICE *Device;
> + EFI_STATUS Status;
> +
> + Device = (NON_DISCOVERABLE_DEVICE *)AllocateZeroPool (sizeof (*Device));
> + if (Device == NULL) {
> +return EFI_OUT_OF_RESOURCES;
> + }
> +
> + Device->Type = TypeGuid;
> + Device->DmaType = NonDiscoverableDeviceDmaTypeNonCoherent;
> + Device->Resources = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Desc;
> +
> + Status = gBS->InstallMultipleProtocolInterfaces (Handle,
> + , Device,
> + NULL);
> + if (EFI_ERROR (Status)) {
> +goto FreeDevice;
> + }
> + return EFI_SUCCESS;
> +
> +FreeDevice:
> + FreePool (Device);
> +
> + return Status;
> +}
> +
> +VOID
> +PopulateI2cInformation (
> + IN VOID
> + )
> +{
> + UINT32 Index;
> +
> + for (Index = 0; Index < FixedPcdGet32 (PcdNumI2cController); Index++) {
> +mI2cDesc[Index].StartDesc.Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> +mI2cDesc[Index].StartDesc.Len = sizeof
> (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3;
> +mI2cDesc[Index].StartDesc.ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> +mI2cDesc[Index].StartDesc.GenFlag = 0;
> +mI2cDesc[Index].StartDesc.SpecificFlag = 0;
> +mI2cDesc[Index].StartDesc.AddrSpaceGranularity = 32;
> +mI2cDesc[Index].StartDesc.AddrRangeMin = FixedPcdGet64 (PcdI2c0BaseAddr)
> +
> + (Index * FixedPcdGet32
> (PcdI2cSize));
> +mI2cDesc[Index].StartDesc.AddrRangeMax =
> mI2cDesc[Index].StartDesc.AddrRangeMin +
> + FixedPcdGet32 (PcdI2cSize) - 1;
> +mI2cDesc[Index].StartDesc.AddrTranslationOffset = 0;
> +mI2cDesc[Index].StartDesc.AddrLen = FixedPcdGet32 (PcdI2cSize);
> +
> +mI2cDesc[Index].EndDesc = ACPI_END_TAG_DESCRIPTOR;
This confuses me. Does this not add an end descriptor for every entry
- ensuring that only one controller would ever be properly registered?
> + }
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +PlatformDxeEntryPoint (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE Handle;
> +
> + Handle = NULL;
> +
> + PopulateI2cInformation ();
> +
> + Status = RegisterDevice (,
> + [3], );
> + ASSERT_EFI_ERROR (Status);
> +
> + //
> + // Install the DS1307 I2C Master protocol on this handle so the RTC driver
> + // can identify it as the I2C master it can invoke directly.
> + //
> + Status = gBS->InstallProtocolInterface (,
> + ,
> + EFI_NATIVE_INTERFACE, NULL);
> + ASSERT_EFI_ERROR (Status);
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> b/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> new file mode 100644
> index 000..2556af2
> --- /dev/null
> +++ b/Platform/NXP/LS1046aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -0,0 +1,58 @@
>
Re: [edk2] [PATCH v2 5/6] ArmPlatformPkg/MemoryInitPeim: take MAX_ALLOC_ADDRESS into account
On Wed, Dec 19, 2018 at 09:56:39PM +0100, Ard Biesheuvel wrote:
> Limit the PEI memory region so it will not extend beyond what we can
> address architecturally when running with 4 KB pages.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
> b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
> index 389a2e6f1abd..010f93add76b 100644
> --- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
> +++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
> @@ -105,12 +105,12 @@ InitializeMemory (
>
>// Ensure PcdSystemMemorySize has been set
>ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
> - ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ADDRESS);
> + ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ALLOC_ADDRESS);
>
>SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
>SystemMemoryTop = SystemMemoryBase + PcdGet64 (PcdSystemMemorySize);
> - if (SystemMemoryTop - 1 > MAX_ADDRESS) {
> -SystemMemoryTop = (UINT64)MAX_ADDRESS + 1;
> + if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
> +SystemMemoryTop = (UINT64)MAX_ALLOC_ADDRESS + 1;
>}
>FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
>FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);
> --
> 2.19.2
>
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Re: [edk2] [PATCH v2 4/6] ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS into account
On Wed, Dec 19, 2018 at 09:56:38PM +0100, Ard Biesheuvel wrote: > When creating the page tables for the 1:1 mapping, ensure that we don't > attempt to map more than what is architecturally permitted when running > with 4 KB pages, which is 48 bits of VA. This will be reflected in the > value of MAX_ALLOC_ADDRESS once we override it for AArch64, so use that > macro instead of MAX_ADDRESS. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > Reviewed-by: Laszlo Ersek Reviewed-by: Leif Lindholm > --- > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > index 5403b8d4070e..e41044142ef4 100644 > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > @@ -612,7 +612,7 @@ ArmConfigureMmu ( >// use of 4 KB pages. >// >MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1, > -MAX_ADDRESS); > +MAX_ALLOC_ADDRESS); > >// Lookup the Table Level to get the information >LookupAddresstoRootTable (MaxAddress, , ); > -- > 2.19.2 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 5/6] ArmPlatformPkg/MemoryInitPeim: take MAX_ALLOC_ADDRESS into account
Limit the PEI memory region so it will not extend beyond what we can
address architecturally when running with 4 KB pages.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
index 389a2e6f1abd..010f93add76b 100644
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
@@ -105,12 +105,12 @@ InitializeMemory (
// Ensure PcdSystemMemorySize has been set
ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
- ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ADDRESS);
+ ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ALLOC_ADDRESS);
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
SystemMemoryTop = SystemMemoryBase + PcdGet64 (PcdSystemMemorySize);
- if (SystemMemoryTop - 1 > MAX_ADDRESS) {
-SystemMemoryTop = (UINT64)MAX_ADDRESS + 1;
+ if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
+SystemMemoryTop = (UINT64)MAX_ALLOC_ADDRESS + 1;
}
FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);
--
2.19.2
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[edk2] [PATCH v2 2/6] MdeModulePkg/Dxe/Gcd: disregard memory above MAX_ALLOC_ADDRESS
Update the GCD memory map initialization code so it disregards
memory that is not addressable by the CPU at boot time. This
only affects the first memory descriptor that is added, other
memory descriptors are permitted that describe memory ranges
that may be accessible to the CPU itself only when executing
under the OS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Jian J Wang
---
MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
index a76d2db73c46..504e14a74e1d 100644
--- a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
+++ b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
@@ -2284,7 +2284,7 @@ CoreInitializeMemoryServices (
// region that is big enough to initialize the DXE core. Always skip the
PHIT Resource HOB.
// The max address must be within the physically addressible range for the
processor.
//
-HighAddress = MAX_ADDRESS;
+HighAddress = MAX_ALLOC_ADDRESS;
for (Hob.Raw = *HobStart; !END_OF_HOB_LIST(Hob); Hob.Raw =
GET_NEXT_HOB(Hob)) {
//
// Skip the Resource Descriptor HOB that contains the PHIT
@@ -2300,7 +2300,7 @@ CoreInitializeMemoryServices (
}
//
- // Skip Resource Descriptor HOBs that do not describe tested system
memory below MAX_ADDRESS
+ // Skip Resource Descriptor HOBs that do not describe tested system
memory below MAX_ALLOC_ADDRESS
//
ResourceHob = Hob.ResourceDescriptor;
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
@@ -2309,14 +2309,14 @@ CoreInitializeMemoryServices (
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) !=
TESTED_MEMORY_ATTRIBUTES) {
continue;
}
- if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) >
(EFI_PHYSICAL_ADDRESS)MAX_ADDRESS) {
+ if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) >
(EFI_PHYSICAL_ADDRESS)MAX_ALLOC_ADDRESS) {
continue;
}
//
// Skip Resource Descriptor HOBs that are below a previously found
Resource Descriptor HOB
//
- if (HighAddress != (EFI_PHYSICAL_ADDRESS)MAX_ADDRESS &&
ResourceHob->PhysicalStart <= HighAddress) {
+ if (HighAddress != (EFI_PHYSICAL_ADDRESS)MAX_ALLOC_ADDRESS &&
ResourceHob->PhysicalStart <= HighAddress) {
continue;
}
--
2.19.2
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[edk2] [PATCH v2 3/6] MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into account
Take MAX_ALLOC_ADDRESS into account in the implementation of the
page allocation routines, so that they will only return memory
that is addressable by the CPU at boot time, even if more memory
is available in the GCD memory map.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Core/Dxe/Mem/Page.c | 52 ++--
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c b/MdeModulePkg/Core/Dxe/Mem/Page.c
index 961c5b833546..5ad8e1171ef7 100644
--- a/MdeModulePkg/Core/Dxe/Mem/Page.c
+++ b/MdeModulePkg/Core/Dxe/Mem/Page.c
@@ -52,26 +52,26 @@ LIST_ENTRY mFreeMemoryMapEntryList =
INITIALIZE_LIST_HEAD_VARIABLE (mFreeMemor
BOOLEAN mMemoryTypeInformationInitialized = FALSE;
EFI_MEMORY_TYPE_STATISTICS mMemoryTypeStatistics[EfiMaxMemoryType + 1] = {
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiReservedMemoryType
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, // EfiLoaderCode
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, // EfiLoaderData
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiBootServicesCode
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiBootServicesData
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
EfiRuntimeServicesCode
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
EfiRuntimeServicesData
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiConventionalMemory
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiUnusableMemory
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiACPIReclaimMemory
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiACPIMemoryNVS
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiMemoryMappedIO
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiMemoryMappedIOPortSpace
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, // EfiPalCode
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiPersistentMemory
- { 0, MAX_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE } //
EfiMaxMemoryType
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiReservedMemoryType
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiLoaderCode
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiLoaderData
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiBootServicesCode
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiBootServicesData
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
EfiRuntimeServicesCode
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
EfiRuntimeServicesData
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiConventionalMemory
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiUnusableMemory
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiACPIReclaimMemory
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, FALSE }, //
EfiACPIMemoryNVS
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiMemoryMappedIO
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiMemoryMappedIOPortSpace
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, TRUE, TRUE }, //
EfiPalCode
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE }, //
EfiPersistentMemory
+ { 0, MAX_ALLOC_ADDRESS, 0, 0, EfiMaxMemoryType, FALSE, FALSE } //
EfiMaxMemoryType
};
-EFI_PHYSICAL_ADDRESS mDefaultMaximumAddress = MAX_ADDRESS;
-EFI_PHYSICAL_ADDRESS mDefaultBaseAddress = MAX_ADDRESS;
+EFI_PHYSICAL_ADDRESS mDefaultMaximumAddress = MAX_ALLOC_ADDRESS;
+EFI_PHYSICAL_ADDRESS mDefaultBaseAddress = MAX_ALLOC_ADDRESS;
EFI_MEMORY_TYPE_INFORMATION gMemoryTypeInformation[EfiMaxMemoryType + 1] = {
{ EfiReservedMemoryType, 0 },
@@ -419,7 +419,7 @@ PromoteMemoryResource (
Entry = CR (Link, EFI_GCD_MAP_ENTRY, Link, EFI_GCD_MAP_SIGNATURE);
if (Entry->GcdMemoryType == EfiGcdMemoryTypeReserved &&
-Entry->EndAddress < MAX_ADDRESS &&
+Entry->EndAddress < MAX_ALLOC_ADDRESS &&
(Entry->Capabilities & (EFI_MEMORY_PRESENT | EFI_MEMORY_INITIALIZED |
EFI_MEMORY_TESTED)) ==
(EFI_MEMORY_PRESENT | EFI_MEMORY_INITIALIZED)) {
//
@@ -640,7 +640,7 @@ CoreAddMemoryDescriptor (
gMemoryTypeInformation[FreeIndex].NumberOfPages
);
mMemoryTypeStatistics[Type].BaseAddress= 0;
-mMemoryTypeStatistics[Type].MaximumAddress = MAX_ADDRESS;
+mMemoryTypeStatistics[Type].MaximumAddress = MAX_ALLOC_ADDRESS;
}
}
return;
@@ -697,7 +697,7 @@ CoreAddMemoryDescriptor (
}
}
mMemoryTypeStatistics[Type].CurrentNumberOfPages =
[edk2] [PATCH v2 4/6] ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS into account
When creating the page tables for the 1:1 mapping, ensure that we don't attempt to map more than what is architecturally permitted when running with 4 KB pages, which is 48 bits of VA. This will be reflected in the value of MAX_ALLOC_ADDRESS once we override it for AArch64, so use that macro instead of MAX_ADDRESS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Laszlo Ersek --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 5403b8d4070e..e41044142ef4 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -612,7 +612,7 @@ ArmConfigureMmu ( // use of 4 KB pages. // MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1, -MAX_ADDRESS); +MAX_ALLOC_ADDRESS); // Lookup the Table Level to get the information LookupAddresstoRootTable (MaxAddress, , ); -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 6/6] ArmVirtPkg/MemoryInitPeiLib: split memory HOB based on MAX_ALLOC_ADDRESS
The current ArmVirtMemoryInitPeiLib code splits the memory region passed
via PcdSystemMemoryBase/PcdSystemMemorySize in two if the region extends
beyond the MAX_ADDRESS limit. This was introduced for 32-bit ARM, which
may support more than 4 GB of physical address space, but cannot address
all of it via a 1:1 mapping, and a single region that is not mappable
in its entirety is unusable by the PEI core.
AArch64 is in a similar situation now: platforms may support more than
256 TB of physical address space, but only 256 TB is addressable by the
CPU, and so a memory region that extends from below this limit to above
it should be split.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Laszlo Ersek
---
ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
index 05afd1282422..66925fc05ebd 100644
--- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
+++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
@@ -75,18 +75,18 @@ MemoryPeim (
SystemMemoryTop = PcdGet64 (PcdSystemMemoryBase) +
PcdGet64 (PcdSystemMemorySize);
- if (SystemMemoryTop - 1 > MAX_ADDRESS) {
+ if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
PcdGet64 (PcdSystemMemoryBase),
-(UINT64)MAX_ADDRESS - PcdGet64 (PcdSystemMemoryBase) + 1
+(UINT64)MAX_ALLOC_ADDRESS - PcdGet64 (PcdSystemMemoryBase) + 1
);
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
-(UINT64)MAX_ADDRESS + 1,
-SystemMemoryTop - MAX_ADDRESS - 1
+(UINT64)MAX_ALLOC_ADDRESS + 1,
+SystemMemoryTop - MAX_ALLOC_ADDRESS - 1
);
} else {
BuildResourceDescriptorHob (
--
2.19.2
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 1/6] MdePkg/Base: introduce MAX_ALLOC_ADDRESS
On some architectures, the maximum representable address deviates from the virtual address range that is accessible by the firmware at boot time. For instance, on AArch64, UEFI mandates a 4 KB page size, which limits the address space to 48 bits, while more than that may be populated on a particular platform, for use by the OS. So introduce a new macro MAX_ALLOC_ADDRESS, which represent the maximum address the firmware should take into account when allocating memory ranges that need to be accessible by the CPU at boot time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdePkg/Include/AArch64/ProcessorBind.h | 5 + MdePkg/Include/Arm/ProcessorBind.h | 5 + MdePkg/Include/Ebc/ProcessorBind.h | 5 + MdePkg/Include/Ia32/ProcessorBind.h| 5 + MdePkg/Include/X64/ProcessorBind.h | 5 + 5 files changed, 25 insertions(+) diff --git a/MdePkg/Include/AArch64/ProcessorBind.h b/MdePkg/Include/AArch64/ProcessorBind.h index 968c18f915ae..f4a544b34d78 100644 --- a/MdePkg/Include/AArch64/ProcessorBind.h +++ b/MdePkg/Include/AArch64/ProcessorBind.h @@ -142,6 +142,11 @@ typedef INT64 INTN; /// #define MAX_ADDRESS 0xULL +/// +/// Maximum usable address at boot time (48 bits using 4 KB pages) +/// +#define MAX_ALLOC_ADDRESS 0xULL + /// /// Maximum legal AArch64 INTN and UINTN values. /// diff --git a/MdePkg/Include/Arm/ProcessorBind.h b/MdePkg/Include/Arm/ProcessorBind.h index 8cca0f3bb050..16a61fc7a325 100644 --- a/MdePkg/Include/Arm/ProcessorBind.h +++ b/MdePkg/Include/Arm/ProcessorBind.h @@ -148,6 +148,11 @@ typedef INT32 INTN; /// #define MAX_ADDRESS 0x +/// +/// Maximum usable address at boot time +/// +#define MAX_ALLOC_ADDRESS MAX_ADDRESS + /// /// Maximum legal ARM INTN and UINTN values. /// diff --git a/MdePkg/Include/Ebc/ProcessorBind.h b/MdePkg/Include/Ebc/ProcessorBind.h index 5217cfd97eac..45beb7572817 100644 --- a/MdePkg/Include/Ebc/ProcessorBind.h +++ b/MdePkg/Include/Ebc/ProcessorBind.h @@ -103,6 +103,11 @@ typedef unsigned long UINTN; /// #define MAX_ADDRESS ((UINTN)(~0ULL >> (64 - sizeof (INTN) * 8))) +/// +/// Maximum usable address at boot time (48 bits using 4 KB pages) +/// +#define MAX_ALLOC_ADDRESS MAX_ADDRESS + /// /// Maximum legal EBC INTN and UINTN values. /// diff --git a/MdePkg/Include/Ia32/ProcessorBind.h b/MdePkg/Include/Ia32/ProcessorBind.h index 8e4de7029cfc..71d53e2543bb 100644 --- a/MdePkg/Include/Ia32/ProcessorBind.h +++ b/MdePkg/Include/Ia32/ProcessorBind.h @@ -246,6 +246,11 @@ typedef INT32 INTN; /// #define MAX_ADDRESS 0x +/// +/// Maximum usable address at boot time +/// +#define MAX_ALLOC_ADDRESS MAX_ADDRESS + /// /// Maximum legal IA-32 INTN and UINTN values. /// diff --git a/MdePkg/Include/X64/ProcessorBind.h b/MdePkg/Include/X64/ProcessorBind.h index e4254285877b..1c04090c7d03 100644 --- a/MdePkg/Include/X64/ProcessorBind.h +++ b/MdePkg/Include/X64/ProcessorBind.h @@ -260,6 +260,11 @@ typedef INT64 INTN; /// #define MAX_ADDRESS 0xULL +/// +/// Maximum usable address at boot time +/// +#define MAX_ALLOC_ADDRESS MAX_ADDRESS + /// /// Maximum legal x64 INTN and UINTN values. /// -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 0/6] introduce MAX_ALLOC_ADDRESS to limit boot time allocations
Since modifying MAX_ADDRESS to limit the memory used at boot time has turned out to be intractible, this series proposes another approach to do the same, by introducing MAX_ALLOC_ADDRESS for firmware internal use. I tested these patches with ArmVirtQemu in the following way: - limit MAX_ALLOC_ADDRESS to 0x (4 GB) - build QEMU_EFI.fd - run it under mach-virt with 4 GB of DRAM and highmem=off This runs as expected, and produces a memory map ending in the following lines BS_DataD000- 0003 0008 Available 0001-00013FFF 0004 0008 which proves that the memory above the limit is recorded and reported by the OS, but left untouched by the firmware memory allocation routines. Cc: Michael D Kinney Cc: Liming Gao Cc: Jian J Wang Cc: Hao Wu Cc: Leif Lindholm Cc: Laszlo Ersek Cc: Eric Auger Cc: Andrew Jones Cc: Philippe Mathieu-Daude Ard Biesheuvel (6): MdePkg/Base: introduce MAX_ALLOC_ADDRESS MdeModulePkg/Dxe/Gcd: disregard memory above MAX_ALLOC_ADDRESS MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into account ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS into account ArmPlatformPkg/MemoryInitPeim: take MAX_ALLOC_ADDRESS into account ArmVirtPkg/MemoryInitPeiLib: split memory HOB based on MAX_ALLOC_ADDRESS MdePkg/Include/AArch64/ProcessorBind.h| 5 ++ MdePkg/Include/Arm/ProcessorBind.h| 5 ++ MdePkg/Include/Ebc/ProcessorBind.h| 5 ++ MdePkg/Include/Ia32/ProcessorBind.h | 5 ++ MdePkg/Include/X64/ProcessorBind.h| 5 ++ .../Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 2 +- ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c | 6 +-- .../ArmVirtMemoryInitPeiLib.c | 8 +-- MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 8 +-- MdeModulePkg/Core/Dxe/Mem/Page.c | 52 +-- 10 files changed, 63 insertions(+), 38 deletions(-) -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 2/4] ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt mode
The SP805 watchdog driver doesn't implement the PI watchdog protocol
fully, but always simply resets the system if the watchdog time runs
out.
However, the hardware does support the intended usage model, as long
as the SP805 is wired up correctly. So let's implement interrupt based
mode involving a handler that is registered by the DXE core and invoked
when the watchdog runs out. In the interrupt handler, we invoke the
notify function if one was registered, or call the ResetSystem()
runtime service otherwise (as per the UEFI spec)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPlatformPkg/ArmPlatformPkg.dec| 1 +
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf | 6 +-
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c | 100
+++-
3 files changed, 80 insertions(+), 27 deletions(-)
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 5f67e7415469..44c00bd0c133 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -70,6 +70,7 @@ [PcdsFixedAtBuild.common]
## SP805 Watchdog
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x0023
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x0021
+ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x002E
## PL011 UART
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|2400|UINT32|0x001F
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
index c3971fb035d3..0e744deeca8d 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
@@ -27,6 +27,7 @@ [Sources.common]
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
@@ -35,13 +36,16 @@ [LibraryClasses]
IoLib
UefiBootServicesTableLib
UefiDriverEntryPoint
+ UefiRuntimeServicesTableLib
[Pcd]
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
+ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt
[Protocols]
+ gHardwareInterruptProtocolGuid ## ALWAYS_CONSUMES
gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
[Depex]
- TRUE
+ gHardwareInterruptProtocolGuid
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
index 12c2f0a1fe49..5bbb12af6019 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
@@ -21,12 +21,17 @@
#include
#include
#include
+#include
+#include
#include
#include "SP805Watchdog.h"
-STATIC EFI_EVENT mEfiExitBootServicesEvent;
+STATIC EFI_EVENTmEfiExitBootServicesEvent;
+STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt;
+STATIC EFI_WATCHDOG_TIMER_NOTIFYmWatchdogNotify;
+STATIC UINT32 mTimerPeriod;
/**
Make sure the SP805 registers are unlocked for writing.
@@ -65,6 +70,33 @@ SP805Lock (
}
}
+STATIC
+VOID
+EFIAPI
+SP805InterruptHandler (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ SP805Unlock ();
+ MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq
+ SP805Lock ();
+
+ mInterrupt->EndOfInterrupt (mInterrupt, Source);
+
+ //
+ // The notify function should be called with the elapsed number of ticks
+ // since the watchdog was armed, which should exceed the timer period.
+ // We don't actually know the elapsed number of ticks, so let's return
+ // the timer period plus 1.
+ //
+ if (mWatchdogNotify != NULL) {
+mWatchdogNotify (mTimerPeriod + 1);
+ }
+
+ gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, 0, NULL);
+}
+
/**
Stop the SP805 watchdog timer from counting down by disabling interrupts.
**/
@@ -149,9 +181,16 @@ SP805RegisterHandler (
IN EFI_WATCHDOG_TIMER_NOTIFYNotifyFunction
)
{
- // ERROR: This function is not supported.
- // The hardware watchdog will reset the board
- return EFI_INVALID_PARAMETER;
+ if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
+return EFI_ALREADY_STARTED;
+ }
+
+ mWatchdogNotify = NotifyFunction;
+ return EFI_SUCCESS;
}
/**
@@ -202,19 +241,16 @@ SP805SetTimerPeriod (
SP805Stop ();
} else {
// Calculate the Watchdog ticks required for a delay of (TimerTicks * 100)
nanoseconds
-// The SP805 will count down to ZERO once, generate an interrupt and
-// then it will again reload the initial value and start again.
-// On the second time when it
[edk2] [PATCH v2 3/4] ArmPkg/GenericWatchdogDxe: clean up the code
Clean up the code, by adding missing STATIC modifiers, drop
redundant casts, and get rid of the 'success handling' anti
pattern in the entry point code.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
---
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf | 9 +-
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 109
+++-
2 files changed, 62 insertions(+), 56 deletions(-)
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
index ba0403d7fdc3..171bf5b9e183 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
@@ -16,17 +16,16 @@ [Defines]
FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b
MODULE_TYPE= DXE_DRIVER
VERSION_STRING = 1.0
-
ENTRY_POINT= GenericWatchdogEntry
[Sources.common]
GenericWatchdogDxe.c
[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
[LibraryClasses]
ArmGenericTimerCounterLib
@@ -46,8 +45,8 @@ [Pcd.common]
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
[Protocols]
- gEfiWatchdogTimerArchProtocolGuid
- gHardwareInterrupt2ProtocolGuid
+ gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
+ gHardwareInterrupt2ProtocolGuid ## ALWAYS_CONSUMES
[Depex]
gHardwareInterrupt2ProtocolGuid
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
index 8ccf15366dfa..285727fc0e84 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
@@ -34,15 +34,16 @@
#define TIME_UNITS_PER_SECOND 1000
// Tick frequency of the generic timer basis of the generic watchdog.
-UINTN mTimerFrequencyHz = 0;
+STATIC UINTN mTimerFrequencyHz = 0;
/* In cases where the compare register was set manually, information about
how long the watchdog was asked to wait cannot be retrieved from hardware.
It is therefore stored here. 0 means the timer is not running. */
-UINT64 mNumTimerTicks = 0;
+STATIC UINT64 mNumTimerTicks = 0;
-EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
+STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
+STATIC
VOID
WatchdogWriteOffsetRegister (
UINT32 Value
@@ -51,6 +52,7 @@ WatchdogWriteOffsetRegister (
MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
}
+STATIC
VOID
WatchdogWriteCompareRegister (
UINT64 Value
@@ -60,6 +62,7 @@ WatchdogWriteCompareRegister (
MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_HIGH, (Value >> 32) &
MAX_UINT32);
}
+STATIC
VOID
WatchdogEnable (
VOID
@@ -68,6 +71,7 @@ WatchdogEnable (
MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
}
+STATIC
VOID
WatchdogDisable (
VOID
@@ -79,6 +83,7 @@ WatchdogDisable (
/** On exiting boot services we must make sure the Watchdog Timer
is stopped.
**/
+STATIC
VOID
EFIAPI
WatchdogExitBootServicesEvent (
@@ -93,6 +98,7 @@ WatchdogExitBootServicesEvent (
/* This function is called when the watchdog's first signal (WS0) goes high.
It uses the ResetSystem Runtime Service to reset the board.
*/
+STATIC
VOID
EFIAPI
WatchdogInterruptHandler (
@@ -141,10 +147,11 @@ WatchdogInterruptHandler (
@retval EFI_UNSUPPORTED The code does not support NotifyFunction.
**/
+STATIC
EFI_STATUS
EFIAPI
WatchdogRegisterHandler (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFYNotifyFunction
)
{
@@ -167,10 +174,11 @@ WatchdogRegisterHandler (
in TimerPeriod 100ns units.
**/
+STATIC
EFI_STATUS
EFIAPI
WatchdogSetTimerPeriod (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
@@ -222,10 +230,11 @@ WatchdogSetTimerPeriod (
@retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
**/
+STATIC
EFI_STATUS
EFIAPI
WatchdogGetTimerPeriod (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
@@ -270,13 +279,13 @@ WatchdogGetTimerPeriod (
Retrieves the period of the timer interrupt in 100ns units.
**/
-EFI_WATCHDOG_TIMER_ARCH_PROTOCOLgWatchdogTimer = {
- (EFI_WATCHDOG_TIMER_REGISTER_HANDLER)WatchdogRegisterHandler,
- (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD)WatchdogSetTimerPeriod,
- (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD)WatchdogGetTimerPeriod
+STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
[edk2] [PATCH v2 1/4] ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanup
Before fixing the SP805 driver, let's clean it up a bit. No
functional changes.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
---
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf | 11 +--
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c | 97
++--
2 files changed, 52 insertions(+), 56 deletions(-)
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
index 37924f2e3cd2..c3971fb035d3 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
@@ -1,6 +1,7 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2018, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD
License
@@ -18,35 +19,29 @@ [Defines]
FILE_GUID = ebd705fb-fa92-46a7-b32b-7f566d944614
MODULE_TYPE= DXE_DRIVER
VERSION_STRING = 1.0
-
ENTRY_POINT= SP805Initialize
[Sources.common]
SP805Watchdog.c
[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
- BaseMemoryLib
DebugLib
IoLib
- PcdLib
- UefiLib
UefiBootServicesTableLib
UefiDriverEntryPoint
- UefiRuntimeServicesTableLib
[Pcd]
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
[Protocols]
- gEfiWatchdogTimerArchProtocolGuid
+ gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
[Depex]
TRUE
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
index 0a9f64095bf8..12c2f0a1fe49 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
@@ -1,6 +1,7 @@
/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+* Copyright (c) 2018, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD
License
@@ -19,16 +20,13 @@
#include
#include
#include
-#include
#include
-#include
-#include
#include
#include "SP805Watchdog.h"
-EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+STATIC EFI_EVENT mEfiExitBootServicesEvent;
/**
Make sure the SP805 registers are unlocked for writing.
@@ -43,8 +41,8 @@ SP805Unlock (
VOID
)
{
- if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
-MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
+ if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED) {
+MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
}
}
@@ -61,9 +59,9 @@ SP805Lock (
VOID
)
{
- if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
+ if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED) {
// To lock it, just write in any number (except the special unlock code).
-MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
+MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
}
}
@@ -77,8 +75,8 @@ SP805Stop (
)
{
// Disable interrupts
- if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
-MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
+ if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) {
+MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
}
}
@@ -94,8 +92,8 @@ SP805Start (
)
{
// Enable interrupts
- if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
-MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
+ if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) {
+MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
}
}
@@ -103,6 +101,7 @@ SP805Start (
On exiting boot services we must make sure the SP805 Watchdog Timer
is stopped.
**/
+STATIC
VOID
EFIAPI
ExitBootServicesEvent (
@@ -110,9 +109,9 @@ ExitBootServicesEvent (
IN VOID *Context
)
{
- SP805Unlock();
- SP805Stop();
- SP805Lock();
+ SP805Unlock ();
+ SP805Stop ();
+ SP805Lock ();
}
/**
@@ -142,10 +141,11 @@ ExitBootServicesEvent (
previously registered.
**/
+STATIC
EFI_STATUS
EFIAPI
SP805RegisterHandler (
- IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFYNotifyFunction
)
{
@@ -182,22 +182,24
[edk2] [PATCH v2 0/4] ArmPkg, ArmPlatformPkg: watchdog driver cleanup
This series cleans up the code of the two watchdog drivers we have for ARM systems, and brings them in compliance with the PI spec, which specifies that the default action of the watchdog can be overridden by registering a handler. Note that the TC2 code in edk2-platforms will have to be brought up to date. The SP805 on the FVP model seems terminally broken (it is 'wired' to the 24 MHz APB clock instead of the 32 kHz WDOG clock, so I'll switch that one over to use the SBSA watchdog instead) Changes since v1: - always fall back to calling gRT_>ResetSystem() if the registered handler returns - WARN() if running the SP805 driver with interrupt handling disabled - add some R-bs Cc: Leif Lindholm Cc: Sami Mujawar Cc: Thomas Panakamattam Abraham Cc: Meenakshi Aggarwal Cc: Udit Kumar Cc: Matteo Carlini Cc: Nariman Poushin Ard Biesheuvel (4): ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanup ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt mode ArmPkg/GenericWatchdogDxe: clean up the code ArmPkg/GenericWatchdogDxe: implement RegisterHandler() method ArmPlatformPkg/ArmPlatformPkg.dec | 1 + .../GenericWatchdogDxe/GenericWatchdogDxe.inf | 9 +- .../SP805WatchdogDxe/SP805WatchdogDxe.inf | 15 +- .../GenericWatchdogDxe/GenericWatchdogDxe.c | 143 -- .../Drivers/SP805WatchdogDxe/SP805Watchdog.c | 187 +++--- 5 files changed, 213 insertions(+), 142 deletions(-) -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 4/4] ArmPkg/GenericWatchdogDxe: implement RegisterHandler() method
Even though UEFI does not appear to use it, let's implement the
complete PI watchdog protocol, including handler registration,
which will be invoked instead of the ResetSystem() runtime service
when the watchdog timer expires.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
---
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 34
++--
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
index 285727fc0e84..a1ef0363eb39 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
@@ -42,6 +42,7 @@ STATIC UINTN mTimerFrequencyHz = 0;
STATIC UINT64 mNumTimerTicks = 0;
STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
+STATIC EFI_WATCHDOG_TIMER_NOTIFYmWatchdogNotify;
STATIC
VOID
@@ -107,17 +108,25 @@ WatchdogInterruptHandler (
)
{
STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
+ UINT64 TimerPeriod;
WatchdogDisable ();
mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source);
- gRT->ResetSystem (
- EfiResetCold,
- EFI_TIMEOUT,
- StrSize (ResetString),
- (VOID *)
- );
+ //
+ // The notify function should be called with the elapsed number of ticks
+ // since the watchdog was armed, which should exceed the timer period.
+ // We don't actually know the elapsed number of ticks, so let's return
+ // the timer period plus 1.
+ //
+ if (mWatchdogNotify != NULL) {
+TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) *
mNumTimerTicks);
+mWatchdogNotify (TimerPeriod + 1);
+ }
+
+ gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
+ (CHAR16 *)ResetString);
// If we got here then the reset didn't work
ASSERT (FALSE);
@@ -155,9 +164,16 @@ WatchdogRegisterHandler (
IN EFI_WATCHDOG_TIMER_NOTIFYNotifyFunction
)
{
- // ERROR: This function is not supported.
- // The watchdog will reset the board
- return EFI_UNSUPPORTED;
+ if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
+return EFI_ALREADY_STARTED;
+ }
+
+ mWatchdogNotify = NotifyFunction;
+ return EFI_SUCCESS;
}
/**
--
2.19.2
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] BaseTools/tools_def ARM: emit PIC veneers
On Wed, 12 Dec 2018 at 13:36, Leif Lindholm wrote: > > On Wed, Dec 12, 2018 at 01:19:31PM +0100, Ard Biesheuvel wrote: > > The ARM linker may emit veneers, i.e., trampolines, when ordinary > > direct relative branches cannot be used, e.g., for Thumb interworking > > or branch targets that are out of range. > > > > Usually, such veneers carry an absolute reference to the branch > > target, which is problematic for us, since these absolute references > > are not covered by annotations that are visible to GenFw in the > > PE/COFF conversion, and so these absolute references are not fixed > > up by the PE/COFF loader at runtime. > > > > So switch to all ARM GNU ld toolchains to position independent veneers. > > Do we know how ling that flag has been around for? I find a post from > 2009 referring to as "new", so I guess we're safe for anything we care > about. > Reviewed-by: Leif Lindholm > I accidentally pushed this, and failed to add the tags as well. Given that this only affects 32-bit ARM, I guess few people are going to mind, so I am going to leave this as-is unless anyone complains. > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > --- > > BaseTools/Conf/tools_def.template | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/BaseTools/Conf/tools_def.template > > b/BaseTools/Conf/tools_def.template > > index 2ba833e1fb06..902680c24c85 100755 > > --- a/BaseTools/Conf/tools_def.template > > +++ b/BaseTools/Conf/tools_def.template > > @@ -4150,7 +4150,7 @@ DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie > > DEFINE GCC_DLINK2_FLAGS_COMMON = > > -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds > > DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) > > --gc-sections > > DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib > > -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) > > -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map > > -DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z > > common-page-size=0x20 > > +DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z > > common-page-size=0x20 -Wl,--pic-veneer > > DEFINE GCC_AARCH64_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z > > common-page-size=0x20 > > DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0 > > DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20 > > DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = DEF(GCC_IA32_X64_DLINK_COMMON) > > --entry _ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) > > -- > > 2.19.2 > > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v2] ArmPkg/DefaultExceptionHandlerLib ARM: avoid endless loop in RELEASE builds
On Wed, 19 Dec 2018 at 20:11, Leif Lindholm wrote: > > On Wed, Dec 19, 2018 at 06:39:07PM +0100, Ard Biesheuvel wrote: > > Ensure that we prevent the CPU from proceeding after having taken an > > unhandled exception on a RELEASE build, which does not contain the > > ASSERT() which ensures this on DEBUG and NOOPT builds. > > > > Retain the code following the deadloop so that we can keep going when > > running in a debugger. > > Could you add a clarifying comment to this extent? > Because I was scratching my head when I looked at that before :) > > With that: > Reviewed-by: Leif Lindholm > Pushed as 5c8bc8be9e5e4665ab7e31558db9e3fe9990a13e > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > --- > > v2: remove pointless 'if (!PcdAdjust)' conditional > > > > ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c | > > 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git > > a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > index 0b9da031b47d..4978711ed0e8 100644 > > --- > > a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > +++ > > b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > @@ -267,6 +267,8 @@ DefaultExceptionHandler ( > >DEBUG ((EFI_D_ERROR, "\n")); > >ASSERT (FALSE); > > > > + CpuDeadLoop (); > > + > >// Clear the error registers that we have already displayed incase some > > one wants to keep going > >SystemContext.SystemContextArm->DFSR = 0; > >SystemContext.SystemContextArm->IFSR = 0; > > -- > > 2.19.2 > > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v7] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support.
No problem. Please let me know when you have reviewed it and I will send the
final patch with your name as reviewer.
Thanks
Ashish
From: Wu, Hao A
Sent: Tuesday, December 18, 2018 6:46:57 PM
To: Ashish Singhal; edk2-devel@lists.01.org
Subject: RE: [edk2] [PATCH v7] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and
above Support.
Hi,
Could you grant me some time for reviewing this patch?
I will try to give you the feedbacks before the end of WW01 2019. Sorry for the
potential delay.
Best Regards,
Hao Wu
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Ashish Singhal
> Sent: Wednesday, December 19, 2018 5:29 AM
> To: edk2-devel@lists.01.org
> Cc: Ashish Singhal
> Subject: [edk2] [PATCH v7] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC
> HC v4 and above Support.
>
> Add SDMA, ADMA2 and 26b data length support.
>
> If V4 64 bit address mode is enabled in compatibility register,
> program controller to enable V4 host mode and use appropriate
> SDMA registers supporting 64 bit addresses.
>
> If V4 64 bit address mode is enabled in compatibility register,
> program controller to enable V4 host mode and use appropriate
> ADMA descriptors supporting 64 bit addresses.
>
> If host controller version is above V4.0, enable ADMA2 with 26b data
> length support for better performance. HC 2 register is configured to
> use 26 bit data lengths and ADMA2 descriptors are configured appropriately.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ashish Singhal
> ---
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c| 2 +-
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 4 +-
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 21 +-
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 7 +-
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 328
> +
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 84 --
> 6 files changed, 363 insertions(+), 83 deletions(-)
> mode change 100755 => 100644
> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
>
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
> old mode 100755
> new mode 100644
> index 2d3fb68..0c5646f
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
> @@ -707,7 +707,7 @@ EmmcSwitchClockFreq (
>//
>// Convert the clock freq unit from MHz to KHz.
>//
> - Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private-
> >BaseClkFreq[Slot]);
> + Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private-
> >BaseClkFreq[Slot], Private->ControllerVersion[Slot]);
>if (EFI_ERROR (Status)) {
> return Status;
>}
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
> index 68485c8..cdcdfa3 100644
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
> @@ -864,7 +864,7 @@ SdCardSetBusMode (
> return Status;
>}
>
> - Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private-
> >BaseClkFreq[Slot]);
> + Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private-
> >BaseClkFreq[Slot], Private->ControllerVersion[Slot]);
>if (EFI_ERROR (Status)) {
> return Status;
>}
> @@ -1064,7 +1064,7 @@ SdCardIdentification (
> goto Error;
>}
>
> - SdMmcHcInitClockFreq (PciIo, Slot, Private->BaseClkFreq[Slot]);
> + SdMmcHcInitClockFreq (PciIo, Slot, Private->BaseClkFreq[Slot], Private-
> >ControllerVersion[Slot]);
>
>gBS->Stall (1000);
>
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> index a87f8de..b5bc260 100644
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> @@ -62,7 +62,9 @@ SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate =
> {
>{ // MaxCurrent
> 0,
>},
> - 0 // ControllerVersion
> + {
> +0 // ControllerVersion
> + }
> };
>
> SD_DEVICE_PATHmSdDpTemplate = {
> @@ -621,6 +623,14 @@ SdMmcPciHcDriverBindingStart (
>for (Slot = FirstBar; Slot < (FirstBar + SlotNum); Slot++) {
> Private->Slot[Slot].Enable = TRUE;
>
> +//
> +// Get SD/MMC Pci Host Controller Version
> +//
> +Status = SdMmcHcGetControllerVersion (PciIo, Slot,
> >ControllerVersion[Slot]);
> +if (EFI_ERROR (Status)) {
> + goto Done;
> +}
> +
> Status = SdMmcHcGetCapability (PciIo, Slot, >Capability[Slot]);
> if (EFI_ERROR (Status)) {
>continue;
> @@ -649,7 +659,14 @@ SdMmcPciHcDriverBindingStart (
>Private->BaseClkFreq[Slot]
>));
>
> -Support64BitDma &= Private->Capability[Slot].SysBus64;
Re: [edk2] [PATCH v2] ArmPkg/DefaultExceptionHandlerLib ARM: avoid endless loop in RELEASE builds
On Wed, Dec 19, 2018 at 06:39:07PM +0100, Ard Biesheuvel wrote: > Ensure that we prevent the CPU from proceeding after having taken an > unhandled exception on a RELEASE build, which does not contain the > ASSERT() which ensures this on DEBUG and NOOPT builds. > > Retain the code following the deadloop so that we can keep going when > running in a debugger. Could you add a clarifying comment to this extent? Because I was scratching my head when I looked at that before :) With that: Reviewed-by: Leif Lindholm > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > v2: remove pointless 'if (!PcdAdjust)' conditional > > ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c | 2 > ++ > 1 file changed, 2 insertions(+) > > diff --git > a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > index 0b9da031b47d..4978711ed0e8 100644 > --- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > @@ -267,6 +267,8 @@ DefaultExceptionHandler ( >DEBUG ((EFI_D_ERROR, "\n")); >ASSERT (FALSE); > > + CpuDeadLoop (); > + >// Clear the error registers that we have already displayed incase some > one wants to keep going >SystemContext.SystemContextArm->DFSR = 0; >SystemContext.SystemContextArm->IFSR = 0; > -- > 2.19.2 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms 22/41] Platform/NXP: Add ArmPlatformLib for LS1046A
On Wed, Nov 28, 2018 at 08:31:36PM +0530, Meenakshi Aggarwal wrote:
> From: Vabhav
>
> Adding support of ArmPlatformLib for NXP LS1046ARDB board
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> Reviewed-by: Leif Lindholm
> ---
> .../Library/PlatformLib/ArmPlatformLib.c | 105 ++
> .../Library/PlatformLib/ArmPlatformLib.inf | 66 +
> .../Library/PlatformLib/NxpQoriqLsHelper.S | 35 +
> .../Library/PlatformLib/NxpQoriqLsMem.c| 152
> +
> 4 files changed, 358 insertions(+)
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.c
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsHelper.S
> create mode 100644
> Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>
> diff --git a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.c
> b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.c
> new file mode 100644
> index 000..c59a06a
> --- /dev/null
> +++ b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.c
> @@ -0,0 +1,105 @@
> +/** ArmPlatformLib.c
> +*
> +* Contains board initialization functions.
> +*
> +* Based on BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c
> +*
> +* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
> +* Copyright (c) 2016, Freescale Semiconductor, Inc. All rights reserved.
> +* Copyright 2017 NXP
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#include
> +#include
> +
> +extern VOID SocInit (VOID);
Please import this through an include file.
> +
> +/**
> + Return the current Boot Mode
> +
> + This function returns the boot reason on the platform
> +
> +**/
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> + VOID
> + )
> +{
> + return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> + Placeholder for Platform Initialization
> +**/
> +EFI_STATUS
> +ArmPlatformInitialize (
> + IN UINTN MpId
> + )
> +{
> + SocInit ();
> +
> + return EFI_SUCCESS;
> +}
> +
> +ARM_CORE_INFO LS1046aMpCoreInfoCTA72x4[] = {
STATIC?
m-prefix.
> + {
> +// Cluster 0, Core 0
> +0x0, 0x0,
> +
> +// MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +(EFI_PHYSICAL_ADDRESS)0,
> +(EFI_PHYSICAL_ADDRESS)0,
> +(EFI_PHYSICAL_ADDRESS)0,
> +(UINT64)0x
> + },
> +};
Move global variables before function definitions start:
https://edk2-docs.gitbooks.io/edk-ii-c-coding-standards-specification/content/5_source_files/54_code_file_structure.html
> +
> +EFI_STATUS
> +PrePeiCoreGetMpCoreInfo (
> + OUT UINTN *CoreCount,
> + OUT ARM_CORE_INFO **ArmCoreTable
> + )
> +{
> + *CoreCount= sizeof (LS1046aMpCoreInfoCTA72x4) / sizeof (ARM_CORE_INFO);
> + *ArmCoreTable = LS1046aMpCoreInfoCTA72x4;
> +
> + return EFI_SUCCESS;
> +}
> +
> +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
STATIC?
Before function definitions.
> +
> +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
STATIC?
m-prefix?
Before function definitions?
/
Leif
> + {
> +EFI_PEI_PPI_DESCRIPTOR_PPI,
> +,
> +
> + }
> +};
> +
> +VOID
> +ArmPlatformGetPlatformPpiList (
> + OUT UINTN *PpiListSize,
> + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
> + )
> +{
> + *PpiListSize = sizeof (gPlatformPpiTable);
> + *PpiList = gPlatformPpiTable;
> +}
> +
> +
> +UINTN
> +ArmPlatformGetCorePosition (
> + IN UINTN MpId
> + )
> +{
> + return 1;
> +}
> diff --git
> a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
> b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
> new file mode 100644
> index 000..49b57fc
> --- /dev/null
> +++ b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
> @@ -0,0 +1,66 @@
> +# @file
> +#
> +# Copyright 2017 NXP
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD
> License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +#
> +
> +[Defines]
> + INF_VERSION= 0x0001001A
> + BASE_NAME = PlatformLib
> +
Re: [edk2] [PATCH edk2-platforms 21/41] Platform/NXP: LS1046A RDB Board Library
On Wed, Nov 28, 2018 at 08:31:35PM +0530, Meenakshi Aggarwal wrote: > Library to provide board specific timings for LS1046ARDB > board with interfacing to IFC controller for accessing > FPGA and NAND. Expand IFC in commit message, please. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Vabhav > Reviewed-by: Leif Lindholm > --- > .../NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h | 83 > ++ > .../NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c | 61 > .../LS1046aRdbPkg/Library/BoardLib/BoardLib.inf| 31 > 3 files changed, 175 insertions(+) > create mode 100644 Platform/NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h > create mode 100644 Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c > create mode 100644 Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.inf > > diff --git a/Platform/NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h > b/Platform/NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h > new file mode 100644 > index 000..e15100d > --- /dev/null > +++ b/Platform/NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h > @@ -0,0 +1,83 @@ > +/** IfcBoardSpecificLib.h > + > + IFC Flash Board Specific Macros and structure > + > + Copyright 2017 NXP > + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD > License > + which accompanies this distribution. The full text of the license may be > found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > + > +**/ > +#ifndef __IFC__BOARD_SPECIFIC_H__ > +#define __IFC__BOARD_SPECIFIC_H__ NXP_ and/or QORIQ_ prefix on include guards? > + > +#include > + > +// On board flash support > +#define IFC_NAND_BUF_BASE0x7E80 > + > +// On board Inegrated flash Controller chip select configuration > +#define IFC_NOR_CSIFC_CS_MAX > +#define IFC_NAND_CS IFC_CS0 > +#define IFC_FPGA_CS IFC_CS2 > + > +// board-specific NAND timing > +#define NAND_FTIM0(IFC_FTIM0_NAND_TCCST(0x7) | \ > + IFC_FTIM0_NAND_TWP(0x18) | \ > + IFC_FTIM0_NAND_TWCHT(0x7) | \ > + IFC_FTIM0_NAND_TWH(0xa)) > + > +#define NAND_FTIM1(IFC_FTIM1_NAND_TADLE(0x32) | \ > + IFC_FTIM1_NAND_TWBE(0x39) | \ > + IFC_FTIM1_NAND_TRR(0xe) | \ > + IFC_FTIM1_NAND_TRP(0x18)) > + > +#define NAND_FTIM2(IFC_FTIM2_NAND_TRAD(0xf) | \ > + IFC_FTIM2_NAND_TREH(0xa) | \ > + IFC_FTIM2_NAND_TWHRE(0x1e)) > + > +#define NAND_FTIM30x0 > + > +#define NAND_CSPR (IFC_CSPR_PHYS_ADDR(IFC_NAND_BUF_BASE) \ > +| IFC_CSPR_PORT_SIZE_8 \ > +| IFC_CSPR_MSEL_NAND \ > +| IFC_CSPR_V) > + > +#define NAND_CSPR_EXT 0x0 > +#define NAND_AMASK 0x > + > +#define NAND_CSOR (IFC_CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ > + | IFC_CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ > + | IFC_CSOR_NAND_ECC_MODE_8 /* 8-bit ECC */ \ > + | IFC_CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ > + | IFC_CSOR_NAND_PGS_4K /* Page Size = 4K */ \ > + | IFC_CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ > + | IFC_CSOR_NAND_PB(6)) /* 2^6 Pages Per Block */ > + > +// board-specific fpga timing > +#define FPGA_BASE_PHYS 0x7fb0 > +#define FPGA_CSPR_EXT 0x0 > +#define FPGA_CSPR (IFC_CSPR_PHYS_ADDR(FPGA_BASE_PHYS) | \ > +IFC_CSPR_PORT_SIZE_8 | \ > +IFC_CSPR_MSEL_GPCM | \ > +IFC_CSPR_V) > + > +#define FPGA_AMASK IFC_AMASK(64 * 1024) > +#define FPGA_CSOR IFC_CSOR_NOR_ADM_SHIFT(16) > + > +#define FPGA_FTIM0 (IFC_FTIM0_GPCM_TACSE(0x0e) | \ > +IFC_FTIM0_GPCM_TEADC(0x0e) | \ > +IFC_FTIM0_GPCM_TEAHC(0x0e)) > +#define FPGA_FTIM1 (IFC_FTIM1_GPCM_TACO(0xff) | \ > +IFC_FTIM1_GPCM_TRAD(0x3f)) > +#define FPGA_FTIM2 (IFC_FTIM2_GPCM_TCS(0xf) | \ > +IFC_FTIM2_GPCM_TCH(0xf) | \ > +IFC_FTIM2_GPCM_TWP(0x3E)) > +#define FPGA_FTIM3 0x0 > + > +#endif //__IFC__BOARD_SPECIFIC_H__ > diff --git a/Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c > b/Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c > new file mode 100644 > index 000..0971935 > --- /dev/null > +++ b/Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c > @@ -0,0 +1,61 @@ > +/** @file > + > + Copyright 2018 NXP > + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD >
Re: [edk2] [PATCH edk2-platforms 20/41] Silicon/NXP:Add support for PCF2129 Real Time Clock Library
On Wed, Nov 28, 2018 at 08:31:34PM +0530, Meenakshi Aggarwal wrote:
> From: Vabhav
>
> Library to provide functions for NXP pcf2129 real time clock library
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> Signed-off-by: Meenakshi Aggarwal
> ---
> Platform/NXP/NxpQoriqLs.dsc.inc| 1 +
> Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h | 52 +++
> Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.c | 389
> +
> .../NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.dec| 29 ++
> .../NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.inf| 47 +++
> 5 files changed, 518 insertions(+)
> create mode 100644 Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h
> create mode 100644 Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.c
> create mode 100644 Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.dec
> create mode 100644 Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.inf
>
> diff --git a/Platform/NXP/NxpQoriqLs.dsc.inc b/Platform/NXP/NxpQoriqLs.dsc.inc
> index 972dadc..5529a04 100644
> --- a/Platform/NXP/NxpQoriqLs.dsc.inc
> +++ b/Platform/NXP/NxpQoriqLs.dsc.inc
> @@ -34,6 +34,7 @@
>ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
>
> ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
>TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
> + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
>
> ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
>HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
>
> UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
> diff --git a/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h
> b/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h
> new file mode 100644
> index 000..c862954
> --- /dev/null
> +++ b/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h
> @@ -0,0 +1,52 @@
> +/** Pcf2129Rtc.h
> +*
> +* Copyright 2017 NXP
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#ifndef __PCF2129RTC_H__
> +#define __PCF2129RTC_H__
> +
> +/*
> + * RTC register addresses
> + */
> +#define PCF2129_CTRL1_REG_ADDR 0x00 // Control Register 1
> +#define PCF2129_CTRL2_REG_ADDR 0x01 // Control Register 2
> +#define PCF2129_CTRL3_REG_ADDR 0x02 // Control Register 3
> +#define PCF2129_SEC_REG_ADDR0x03
> +#define PCF2129_MIN_REG_ADDR0x04
> +#define PCF2129_HR_REG_ADDR 0x05
> +#define PCF2129_DAY_REG_ADDR0x06
> +#define PCF2129_WEEKDAY_REG_ADDR0x07
> +#define PCF2129_MON_REG_ADDR0x08
> +#define PCF2129_YR_REG_ADDR 0x09
> +
> +#define PCF2129_CTRL3_BIT_BLF BIT2/* Battery Low Flag*/
> +
> +/*
> + * Masks for RTC registers
> + */
> +#define PCF2129_SECONDS_MASK0x7F
> +#define PCF2129_MINUTES_MASK0x7F
> +#define PCF2129_HOURS_MASK 0x3F
> +#define PCF2129_DAYS_MASK 0x3F
> +#define PCF2129_MONTHS_MASK 0x1F
> +
> +#define EPOCH_BASE_1990 1990
> +#define EPOCH_BASE_2000 2000
Too generic names.
Either add to edk2/EmbeddedPkg/Include/Library/TimeBaseLib.h
or add PCF2129_ prefix.
> +
> +typedef struct {
> + UINTN OperationCount;
> + EFI_I2C_OPERATION SetAddressOp;
> + EFI_I2C_OPERATION GetSetDateTimeOp;
> +} RTC_I2C_REQUEST;
PCF2129_I2C_REQUEST?
> +
> +#endif // __PCF2129RTC_H__
> diff --git a/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.c
> b/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.c
> new file mode 100644
> index 000..90bad66
> --- /dev/null
> +++ b/Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129RtcLib.c
> @@ -0,0 +1,389 @@
> +/** @PCF2129RtcLib.c
> + Implement EFI RealTimeClock with runtime services via RTC Lib for PCF2129
> RTC.
> +
> + Based on RTC implementation available in
> + EmbeddedPkg/Library/TemplateRealTimeClockLib/RealTimeClockLib.c
> +
> + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> + Copyright 2017 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#include
> +#include
> +#include
> +#include
>
Re: [edk2] [PATCH edk2-platforms 19/41] Silicon/NXP:Add LS1046ARDB SoCLib Support
On Wed, Nov 28, 2018 at 08:31:33PM +0530, Meenakshi Aggarwal wrote:
> Provide Functions to initialize peripherals,
> print board and soc information.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> Signed-off-by: Meenakshi Aggarwal
> ---
> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 1 +
> Silicon/NXP/LS1046A/Include/SocSerDes.h | 55 ++
> Silicon/NXP/LS1046A/LS1046A.dec | 22 +
> Silicon/NXP/LS1046A/LS1046A.dsc.inc | 68
>
> Silicon/NXP/Library/SocLib/Chassis.c | 1 +
> Silicon/NXP/Library/SocLib/Chassis.h | 1 +
> Silicon/NXP/Library/SocLib/Chassis2/Soc.c| 48
> Silicon/NXP/Library/SocLib/LS1043aSocLib.inf | 2 +
> Silicon/NXP/Library/SocLib/LS1046aSocLib.inf | 53 ++
> Silicon/NXP/NxpQoriqLs.dec | 1 +
> 10 files changed, 252 insertions(+)
> create mode 100644 Silicon/NXP/LS1046A/Include/SocSerDes.h
> create mode 100644 Silicon/NXP/LS1046A/LS1046A.dec
> create mode 100644 Silicon/NXP/LS1046A/LS1046A.dsc.inc
> create mode 100644 Silicon/NXP/Library/SocLib/LS1046aSocLib.inf
>
> diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> index 9a68cfd..b69ffa2 100644
> --- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> +++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> @@ -59,6 +59,7 @@
>gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x021c0500
>gNxpQoriqLsTokenSpaceGuid.PcdSerdes2Enabled|FALSE
>gNxpQoriqLsTokenSpaceGuid.PcdPlatformFreqDiv|0x1
> + gNxpQoriqLsTokenSpaceGuid.PcdMuxToUsb3|TRUE
>
>#
># RTC Pcds
> diff --git a/Silicon/NXP/LS1046A/Include/SocSerDes.h
> b/Silicon/NXP/LS1046A/Include/SocSerDes.h
> new file mode 100644
> index 000..957db0f
> --- /dev/null
> +++ b/Silicon/NXP/LS1046A/Include/SocSerDes.h
> @@ -0,0 +1,55 @@
> +/** @file
> + The Header file of SerDes Module
> +
> + Copyright 2017 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#ifndef __LS1046A_SERDES_H__
> +#define __LS1046A_SERDES_H__
> +
> +#include
> +
> +SERDES_CONFIG SerDes1ConfigTbl[] = {
Whoops. I didn't pick up on this last time:
https://edk2-docs.gitbooks.io/edk-ii-c-coding-standards-specification/content/5_source_files/53_include_files.html#537-include-files-shall-not-generate-code-or-define-data-variables
Can you move this to a .c file?
I guess this and SerDes2ConfigTbl could both be marked STATIC?
> + /* SerDes 1 */
> + {0x, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
> SGMII_FM1_DTSEC6 } },
> + {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6
> } },
> + {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
> SGMII_FM1_DTSEC6 } },
> + {0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
> SGMII_FM1_DTSEC6 } },
> + {0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, SGMII_FM1_DTSEC5,
> SGMII_FM1_DTSEC6 } },
> + {0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE } },
> + {0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE } },
> + {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6 } },
> + {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
> SGMII_FM1_DTSEC6 } },
> + {0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1, SGMII_FM1_DTSEC6 } },
> + {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
> SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6 } },
> + {}
> +};
> +
> +SERDES_CONFIG SerDes2ConfigTbl[] = {
> + /* SerDes 2 */
> + {0x, {PCIE1, PCIE1, PCIE1, PCIE1 } },
> + {0x5559, {PCIE1, PCIE2, PCIE3, SATA } },
> + {0x5577, {PCIE1, PCIE2, PCIE3, PCIE3 } },
> + {0x5506, {PCIE1, PCIE2, NONE, PCIE3 } },
> + {0x0506, {NONE, PCIE2, NONE, PCIE3 } },
> + {0x0559, {NONE, PCIE2, PCIE3, SATA } },
> + {0x5A59, {PCIE1, SGMII_FM1_DTSEC2, PCIE3, SATA } },
> + {0x5A06, {PCIE1, SGMII_FM1_DTSEC2, NONE, PCIE3 } },
> + {}
> +};
> +
> +SERDES_CONFIG *SerDesConfigTbl[] = {
> + SerDes1ConfigTbl,
> + SerDes2ConfigTbl
> +};
> +
> +#endif /* __LS1046A_SERDES_H */
> diff --git a/Silicon/NXP/LS1046A/LS1046A.dec b/Silicon/NXP/LS1046A/LS1046A.dec
> new file mode 100644
> index 000..93fc80d
> --- /dev/null
> +++ b/Silicon/NXP/LS1046A/LS1046A.dec
> @@ -0,0 +1,22 @@
> +# LS1046A.dec
> +#
> +# Copyright 2017 NXP
> +#
> +# This program and the accompanying materials are licensed and made
> available under
> +# the terms and conditions of the BSD License which accompanies this
> distribution.
> +# The full text
Re: [edk2] [PATCH edk2-platforms 18/41] LS1043 : Enable NOR driver for LS1043aRDB package.
On Wed, Nov 28, 2018 at 08:31:32PM +0530, Meenakshi Aggarwal wrote:
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
I think I actually gave a
Reviewed-by: Leif Lindholm
for this one last round.
> ---
> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 15 ++-
> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 9 -
> 2 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> index 48a7b5a..9a68cfd 100644
> --- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> +++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
> @@ -41,6 +41,7 @@
>IfcLib|Silicon/NXP/Library/IfcLib/IfcLib.inf
>BoardLib|Platform/NXP/LS1043aRdbPkg/Library/BoardLib/BoardLib.inf
>FpgaLib|Silicon/NXP/Library/FpgaLib/FpgaLib.inf
> + NorFlashLib|Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
>
> [PcdsFixedAtBuild.common]
>
> @@ -65,6 +66,13 @@
>gDs1307RtcLibTokenSpaceGuid.PcdI2cSlaveAddress|0x68
>gDs1307RtcLibTokenSpaceGuid.PcdI2cBusFrequency|10
>
> + #
> + # NV Storage PCDs
> + #
> + gArmTokenSpaceGuid.PcdVFPEnabled|1
> + gNxpQoriqLsTokenSpaceGuid.PcdFlashDeviceBase64|0x06000
> + gNxpQoriqLsTokenSpaceGuid.PcdFlashReservedRegionBase64|0x6030
> +
>
>
> #
> # Components Section - list of all EDK II Modules needed by this Platform
> @@ -74,10 +82,15 @@
>#
># Architectural Protocols
>#
> - MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
> +
> +NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
> + }
> + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
>
>Silicon/NXP/Drivers/WatchDog/WatchDogDxe.inf
>Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
>Platform/NXP/LS1043aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> + Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
>
> ##
> diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
> b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
> index 417303d..6b27aed 100644
> --- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
> +++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
> @@ -55,6 +55,7 @@
> gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> FV = FVMAIN_COMPACT
>
> !include Platform/NXP/FVRules.fdf.inc
> +!include VarStore.fdf.inc
>
>
> #
> # FV Section
> @@ -104,7 +105,8 @@ READ_LOCK_STATUS = TRUE
>INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
>INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
> - INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
>INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
>
>INF Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
> @@ -124,6 +126,11 @@ READ_LOCK_STATUS = TRUE
>INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
>
>#
> + # NOR Driver
> + #
> + INF Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
> +
> + #
># Network modules
>#
>INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
> --
> 1.9.1
>
___
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Re: [edk2] [PATCH edk2-platforms 17/41] Silicon/NXP : Add NOR driver.
On Wed, Nov 28, 2018 at 08:31:31PM +0530, Meenakshi Aggarwal wrote:
> Add NOR DXE phase driver, it installs BlockIO and Fvp
> protocol.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc| 98 +++
> .../NXP/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 252 +++
> Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.c | 503 +
> Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.h | 146
> Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf| 65 ++
> Silicon/NXP/Drivers/NorFlashDxe/NorFlashFvbDxe.c | 816
> +
> 6 files changed, 1880 insertions(+)
> create mode 100644 Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc
> create mode 100644 Silicon/NXP/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c
> create mode 100644 Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.c
> create mode 100644 Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.h
> create mode 100644 Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
> create mode 100644 Silicon/NXP/Drivers/NorFlashDxe/NorFlashFvbDxe.c
>
> diff --git a/Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc
> b/Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc
> new file mode 100644
> index 000..e254337
> --- /dev/null
> +++ b/Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc
> @@ -0,0 +1,98 @@
> +## @file
> +# FDF include file with FD definition that defines an empty variable store.
> +#
> +# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
> +# Copyright (C) 2014, Red Hat, Inc.
> +# Copyright (c) 2016, Linaro, Ltd. All rights reserved.
> +# Copyright (c) 2016, Freescale Semiconductor. All rights reserved.
> +# Copyright 2017 NXP
> +#
> +# This program and the accompanying materials are licensed and made
> available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +##
> +
> +[FD.LS1043aRdbNv_EFI]
> +BaseAddress = 0x6030 #The base address of the FLASH device
> +Size = 0x000C #The size in bytes of the FLASH device
> +ErasePolarity = 1
> +BlockSize = 0x1
> +NumBlocks = 0xC
> +
> +#
> +# Place NV Storage just above Platform Data Base
> +#
> +DEFINE NVRAM_AREA_VARIABLE_BASE= 0x
> +DEFINE NVRAM_AREA_VARIABLE_SIZE= 0x0004
> +DEFINE FTW_WORKING_BASE= $(NVRAM_AREA_VARIABLE_BASE)
> + $(NVRAM_AREA_VARIABLE_SIZE)
> +DEFINE FTW_WORKING_SIZE= 0x0004
> +DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) +
> $(FTW_WORKING_SIZE)
> +DEFINE FTW_SPARE_SIZE = 0x0004
> +
> +#
> +# LS1043ARDB NVRAM Area
> +# LS1043ARDB NVRAM Area contains: Variable + FTW Working + FTW Spare
> +#
> +
> +
> +$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
> +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
> +#NV_VARIABLE_STORE
> +DATA = {
> + ## This is the EFI_FIRMWARE_VOLUME_HEADER
> + # ZeroVector []
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + # FileSystemGuid: gEfiSystemNvDataFvGuid =
> + # { 0xFFF12B8D, 0x7696, 0x4C8B,
> + # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
> + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
> + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
> + # FvLength: 0xC
> + 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00,
> + # Signature "_FVH" # Attributes
> + 0x5f, 0x46, 0x56, 0x48, 0x36, 0x0E, 0x00, 0x00,
> + # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision
> + 0x48, 0x00, 0xC2, 0xF9, 0x00, 0x00, 0x00, 0x02,
> + # Blockmap[0]: 0x3 Blocks * 0x4 Bytes / Block
> + 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
> + # Blockmap[1]: End
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + ## This is the VARIABLE_STORE_HEADER
> + # It is compatible with SECURE_BOOT_ENABLE == FALSE as well.
> + # Signature: gEfiAuthenticatedVariableGuid =
> + # { 0xaaf32c78, 0x947b, 0x439a,
> + # { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
> + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
> + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
> + # Size: 0x4
> (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) -
> + # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x3ffb8
> + # This can speed up the Variable Dispatch a bit.
> + 0xB8, 0xFF, 0x03, 0x00,
> + #
Re: [edk2] [PATCH edk2-platforms 00/27] Import Hummingboard Edge platform for Windows IoT Core
Hi Leif, No problem - it's been a crazy year all around so I fully understand. Thank you for making time to review and provide feedback on this patch set. I am already out of office for the rest of the year so I will make the changes recommended by you and Ard when I get back. And I also have some changes marked to simplify portions of the code and make it more readable/sane. Have a great holiday season! Chris From: Leif Lindholm Sent: Saturday, December 15, 2018 5:32 AM To: Chris Co Cc: edk2-devel@lists.01.org; Ard Biesheuvel; Michael D Kinney Subject: Re: [PATCH edk2-platforms 00/27] Import Hummingboard Edge platform for Windows IoT Core Hi Chris, Sorry for dragging this out, but it's been a crazy year. I think I've now provided feedback for all but the SdMmc bits. For the next revision, please break out SdMmc support (including and put it last in the series). I still don't like the idea of adding a third driver stack to the project, and am likely to have ideas of major restructuring, but if we can isolate that from the rest, reviewing the remainder should be reasonably quick next time around. My last day "in the office" before Christmas is 21 December, and then I'll be out until 7 January. So basically, if you can get a new set out early nexy week, I may have a chance to look at it, and if not - take your time :) Regards, Leif On Fri, Sep 21, 2018 at 08:25:52AM +, Chris Co wrote: > REF: > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fchristopherco%2Fedk2-platforms%2Ftree%2Fwiniot_hmb_v1data=02%7C01%7CChristopher.Co%40microsoft.com%7Cfe389e235d9f4b5a3db608d66291b91f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C636804775359296793sdata=ArbTsmK70lP0z2I5DtAMUtjMaoGvxmjo421G0pFHw20%3Dreserved=0 > > v0: > * > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.01.org%2Fpipermail%2Fedk2-devel%2F2018-July%2F027213.htmldata=02%7C01%7CChristopher.Co%40microsoft.com%7Cfe389e235d9f4b5a3db608d66291b91f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C636804775359296793sdata=YPaztVWBhe3mimyel5pBFmUQn16PDobNrZDG2Pw9Z4M%3Dreserved=0 > * > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.01.org%2Fpipermail%2Fedk2-devel%2F2018-July%2F027266.htmldata=02%7C01%7CChristopher.Co%40microsoft.com%7Cfe389e235d9f4b5a3db608d66291b91f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C636804775359296793sdata=aNuEw0cnaQTgI9vG1aoaeDKCKeZX0nPZPBxrk5IMZLM%3Dreserved=0 > * > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.01.org%2Fpipermail%2Fedk2-devel%2F2018-July%2F027333.htmldata=02%7C01%7CChristopher.Co%40microsoft.com%7Cfe389e235d9f4b5a3db608d66291b91f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C636804775359296793sdata=KBKCyLHP2AmOifipqCPt2Q6cxByt%2Fw18sb1v63Eh5%2FE%3Dreserved=0 > * > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.01.org%2Fpipermail%2Fedk2-devel%2F2018-July%2F027409.htmldata=02%7C01%7CChristopher.Co%40microsoft.com%7Cfe389e235d9f4b5a3db608d66291b91f%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C636804775359296793sdata=chPGxhVlyJmKSOLTn9UNWRdfeya2IdqCIuno2DQlRpk%3Dreserved=0 > > The patch set supports the bring up of Windows 10 IoT Core on > Solidrun's Hummingboard Edge board running NXP's i.MX 6Quad SoC. > > This patch set is a preliminary submission, with the goal to get further > review > feedback from maintainers since the v0 version had too many initial issues to > conduct a full review. > > Changes in this patch set from v0: > * Merged the 4 previous patch sets into one. > * All code should now follow the edk2 coding style. > * SMBIOS driver refactored to use PCDs. Fixed UUID generation to use MAC > address. > * Updated ACPI HIDs to proper NXP IDs where applicable. > * Removed unnecessary (and spec-violating) _DSD methods from our ACPI tables. > * General code cleanup and refactoring. > * Add Silicon package support for i.MX 6Solo/DualLite, 6SoloX, > 6DualPlus/QuadPlus > families in iMX6Pkg. > > Known issues remaining from previous review: > * Silicon/NXP/iMXPlatformPkg: SdhcDxe fixed initialization needs to be moved > to > a PlatformDxe init and use NonDiscoverableDeviceRegistrationLib. > * Platform/Microsoft: Left in SdMmcDxe code. Alternatives are still under > evaluation. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Christopher Co > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Cc: Michael D Kinney > > Christopher Co (27): > Platform/Microsoft: Add OpteeClientPkg dec > Platform/Microsoft: Add SdMmc Dxe Driver > Platform/Microsoft: Add MsPkg > Silicon/NXP: Add iMXPlatformPkg dec > Silicon/NXP: Add UART library support for i.MX platforms > Silicon/NXP: Add I2C library support for i.MX platforms > Silicon/NXP: Add i.MX display library support > Silicon/NXP: Add Virtual RTC support for i.MX platform > Silicon/NXP: Add headers for SoC-specific i.MX packages to use > Silicon/NXP: Add
Re: [edk2] [PATCH edk2-platforms 16/41] Silicon/NXP : Add support of NorFlashLib
On Wed, Nov 28, 2018 at 08:31:30PM +0530, Meenakshi Aggarwal wrote:
> NorFlashLib interacts with the underlying IFC NOR controller.
Expand IFC in commit message.
> This will be used by NOR driver for any information
> exchange with NOR controller.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
On the whole, a big improvement.
A few minor style comments and one polite request below.
> ---
> Silicon/NXP/Include/Library/NorFlashLib.h| 77 +++
> Silicon/NXP/Include/NorFlash.h | 44 ++
> Silicon/NXP/Library/NorFlashLib/CfiCommand.h | 99
> Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c | 210 +++
> Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h | 53 ++
> Silicon/NXP/Library/NorFlashLib/NorFlashLib.c| 696
> +++
> Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf | 43 ++
> 7 files changed, 1222 insertions(+)
> create mode 100644 Silicon/NXP/Include/Library/NorFlashLib.h
> create mode 100644 Silicon/NXP/Include/NorFlash.h
> create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiCommand.h
> create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.c
> create mode 100644 Silicon/NXP/Library/NorFlashLib/CfiNorFlashLib.h
> create mode 100644 Silicon/NXP/Library/NorFlashLib/NorFlashLib.c
> create mode 100644 Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
>
> diff --git a/Silicon/NXP/Include/Library/NorFlashLib.h
> b/Silicon/NXP/Include/Library/NorFlashLib.h
> new file mode 100644
> index 000..defdc61
> --- /dev/null
> +++ b/Silicon/NXP/Include/Library/NorFlashLib.h
> @@ -0,0 +1,77 @@
> +/** @file
> +
> + Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
> + Copyright (c) 2016, Freescale Semiconductor. All rights reserved.
> + Copyright 2017 NXP
> +
> +This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> + **/
> +
> +#ifndef _NOR_FLASH_LIB_H_
> +#define _NOR_FLASH_LIB_H_
> +
> +#include
> +
> +#define NOR_FLASH_DEVICE_COUNT 1
> +
> +typedef struct {
> + UINTN DeviceBaseAddress; // Start address of the Device Base Address
> (DBA)
> + UINTN RegionBaseAddress; // Start address of one single region
> + UINTN Size;
> + UINTN BlockSize;
> + UINTN MultiByteWordCount; // Maximum Word count that can be written to
> Nor Flash in multi byte write
> + UINTN WordWriteTimeOut;// single byte/word timeout usec
> + UINTN BufferWriteTimeOut; // buffer write timeout usec
> + UINTN BlockEraseTimeOut; // block erase timeout usec
> + UINTN ChipEraseTimeOut;// chip erase timeout usec
> +} NorFlashDescription;
> +
> +EFI_STATUS
> +NorFlashPlatformGetDevices (
> + OUT NorFlashDescription **NorFlashDevices,
> + OUT UINT32 *Count
> + );
> +
> +EFI_STATUS
> +NorFlashPlatformFlashGetAttributes (
> + OUT NorFlashDescription *NorFlashDevices,
> + IN UINT32 Count
> + );
> +
> +EFI_STATUS
> +NorFlashPlatformWriteBuffer (
> + IN NOR_FLASH_INSTANCE *Instance,
> + IN EFI_LBALba,
> + INUINTN Offset,
> + IN OUTUINTN *NumBytes,
> + INUINT8 *Buffer
> + );
> +
> +EFI_STATUS
> +NorFlashPlatformEraseSector (
> + IN NOR_FLASH_INSTANCE *Instance,
> + IN UINTN SectorAddress
> + );
> +
> +EFI_STATUS
> +NorFlashPlatformRead (
> + IN NOR_FLASH_INSTANCE *Instance,
> + IN EFI_LBA Lba,
> + IN UINTNOffset,
> + IN UINTNBufferSizeInBytes,
> + OUT UINT8 *Buffer
> + );
> +
> +EFI_STATUS
> +NorFlashPlatformReset (
> + IN UINTN Instance
> + );
> +
> +#endif /* _NOR_FLASH_LIB_H_ */
> diff --git a/Silicon/NXP/Include/NorFlash.h b/Silicon/NXP/Include/NorFlash.h
> new file mode 100644
> index 000..8fa41d8
> --- /dev/null
> +++ b/Silicon/NXP/Include/NorFlash.h
> @@ -0,0 +1,44 @@
> +/** @NorFlash.h
> +
> + Contains data structure shared by both NOR Library and Driver.
> + Copyright 2017 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#ifndef __NOR_FLASH_H__
> +#define __NOR_FLASH_H__
> +
> +#include
> +#include
> +
> +typedef struct _NOR_FLASH_INSTANCE
[edk2] [edk2-platforms] [PATCH v7 2/2] Platform/ARM: Add Readme.md
This covers the bulk of the information originally present in https://github.com/tianocore/tianocore.github.io/wiki/ArmPlatformPkg-AArch64 regarding building and running the Foundation/Base FVP Platforms. The sections on fetching source have been delegated to the root Readme.md Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Nariman Poushin --- Changes from v6: - Removed inline html and generally tidied up markdown Platform/ARM/Readme.md | 63 ++ Readme.md | 4 +--- 2 files changed, 64 insertions(+), 3 deletions(-) create mode 100644 Platform/ARM/Readme.md diff --git a/Platform/ARM/Readme.md b/Platform/ARM/Readme.md new file mode 100644 index 000..ac86e95 --- /dev/null +++ b/Platform/ARM/Readme.md @@ -0,0 +1,63 @@ +# Introduction + +These instructions explain how to get an edk2/edk2-platforms build running +on the ARM Base FVP, which is a software model provided by ARM (for free) +, which models a Cortex A core with various peripherals. More information +can be found here: +[https://developer.arm.com/products/system-design/fixed-virtual-platforms] + +##Requirements +- A 32-bit or 64-bit Linux host machine. +- Visual Studio is not officially supported, experimental support can be found here: +[https://git.linaro.org/people/leif.lindholm/edk2.git/log/?h=aarch64-vs] + +# Build EDK2 Tianocore + +`cd $(WORKSPACE)/edk2` + +`build -a AARCH64 -p Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc -t GCC5` + +Once built, the edk2 image is the following file Build/ArmVExpress-FVP-AArch64/DEBUG_GCC5/FV/FVP_AARCH64_EFI.fd + +# Run edk2/edk2-platforms on the ARM Base Platform FVP + +In order to run the binary we have just built there are a few steps we need to +go through, we need to get a model, a set of prebuilts (where we will swap out +the edk2 image with our own) and the tool with which we will swap out the +prebuilt edk2 image. + +We will also rely on the "run_model" script that comes with the prebuilts, it +is entirely possible to run the model without this but would require quite a bit +of knowledge regarding the areguments ARM fastmodel (documentation can be found here: +[https://developer.arm.com/docs/100966/1101/programming-reference-for-base-fvps/base-platform-revc-features]) +however the manual set of the FVP is outside the scope of this document. If you are interested +please consult the documentation. + +It's recommended you create a folder where you download the prebuilts and +required tool and copy your edk2 image in to it, as the run script expects +the binaries in the same directory. + +1. Download the Base FVP from here https://developer.arm.com/products/system-design/fixed-virtual-platforms + + - Select Armv8-A Base Platform FVP based on Fast Models 11.4 + - It has a click through license but is free. + +2. Download the 18.10 Linaro ARM Landing Team release for FVP booting UEFI +https://releases.linaro.org/members/arm/platforms/18.10/fvp-uefi.zip + +3. Download the prebuilt fiptool from https://git.linaro.org/landing-teams/working/arm/prebuilt_tools.git + +4. Update the fip.bin image from fvp-uefi.zip by running the following command: + + `fiptool update --nt-fw=[path to binary built above] fip.bin` + +5. Execute the FVP run_model.sh script from fvp-uefi.zip and provide a path to the FVP binaries +downloaded in step 1): + + `MODEL=[path to FVP binary] ./run_model.sh` + +This expects the contents of fvp-uefi.zip, the bl1.bin and fip.bin (which is +the file we modify), to be in the same directory as the run_model.sh script. + +This should be sufficient to provide a build/run/debug environment for aarch64. + diff --git a/Readme.md b/Readme.md index bb53c6f..86c989f 100644 --- a/Readme.md +++ b/Readme.md @@ -206,9 +206,7 @@ they will be documented with the platform. * [Overdrive](Platform/AMD/OverdriveBoard) * [Overdrive 1000](Platform/SoftIron/Overdrive1000Board) -## ARM -* [Juno](Platform/ARM/JunoPkg) -* [Versatile Express](Platform/ARM/VExpressPkg) +## [ARM](Platform/ARM/Readme.md) ## Hisilicon * [D02](Platform/Hisilicon/D02) -- 2.7.4 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2] ArmPkg/DefaultExceptionHandlerLib ARM: avoid endless loop in RELEASE builds
Ensure that we prevent the CPU from proceeding after having taken an unhandled exception on a RELEASE build, which does not contain the ASSERT() which ensures this on DEBUG and NOOPT builds. Retain the code following the deadloop so that we can keep going when running in a debugger. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- v2: remove pointless 'if (!PcdAdjust)' conditional ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c index 0b9da031b47d..4978711ed0e8 100644 --- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c @@ -267,6 +267,8 @@ DefaultExceptionHandler ( DEBUG ((EFI_D_ERROR, "\n")); ASSERT (FALSE); + CpuDeadLoop (); + // Clear the error registers that we have already displayed incase some one wants to keep going SystemContext.SystemContextArm->DFSR = 0; SystemContext.SystemContextArm->IFSR = 0; -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms 14/41] Silicon/NXP : Add support for FpgaLib.
On Wed, Nov 28, 2018 at 08:31:28PM +0530, Meenakshi Aggarwal wrote:
> FpgaLib export FPGA_READ and FPGA_WRITE function and
> provide a function to print Board personality.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> Silicon/NXP/Include/Library/FpgaLib.h | 97 +
> Silicon/NXP/Library/FpgaLib/FpgaLib.c | 145
>
> Silicon/NXP/Library/FpgaLib/FpgaLib.inf | 34
Moving this library up to a more "generic" level than in previous
submission (which is a good thing!), could you add Nxp/Qoriq in
file/directory/library names?
> 3 files changed, 276 insertions(+)
> create mode 100644 Silicon/NXP/Include/Library/FpgaLib.h
> create mode 100644 Silicon/NXP/Library/FpgaLib/FpgaLib.c
> create mode 100644 Silicon/NXP/Library/FpgaLib/FpgaLib.inf
>
> diff --git a/Silicon/NXP/Include/Library/FpgaLib.h
> b/Silicon/NXP/Include/Library/FpgaLib.h
> new file mode 100644
> index 000..847689c
> --- /dev/null
> +++ b/Silicon/NXP/Include/Library/FpgaLib.h
> @@ -0,0 +1,97 @@
> +/** FpgaLib.h
> +* Header defining the Fpga specific constants (Base addresses, sizes, flags)
> +*
> +* Copyright 2017 NXP
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD
> License
> +* which accompanies this distribution. The full text of the license may be
> found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +
> +#ifndef __LS1_FPGA_H__
> +#define __LS1_FPGA_H__
NXP/QORIQ in include guard?
> +
> +/*
> + * FPGA register set of board.
> + */
> +typedef struct {
> + UINT8 FpgaVersionMajor; /* 0x0 - FPGA Major Revision Register */
> + UINT8 FpgaVersionMinor; /* 0x1 - FPGA Minor Revision Register */
> + UINT8 PcbaVersion; /* 0x2 - PCBA Revision Register */
> + UINT8 SystemReset; /* 0x3 - system reset register */
> + UINT8 SoftMuxOn;/* 0x4 - Switch Control Enable Register */
> + UINT8 RcwSource1; /* 0x5 - Reset config word 1 */
> + UINT8 RcwSource2; /* 0x6 - Reset config word 2 */
> + UINT8 Vbank;/* 0x7 - Flash bank selection Control */
> + UINT8 SysclkSelect; /* 0x8 - System clock selection Control */
> + UINT8 UartSel; /* 0x9 - Uart selection Control */
> + UINT8 Sd1RefClkSel; /* 0xA - Serdes1 reference clock selection
> Control */
> + UINT8 TdmClkMuxSel; /* 0xB - TDM Clock Mux selection Control */
> + UINT8 SdhcSpiCsSel; /* 0xC - SDHC/SPI Chip select selection Control */
> + UINT8 StatusLed;/* 0xD - Status Led */
> + UINT8 GlobalReset; /* 0xE - Global reset */
> + UINT8 SdEmmc; /* 0xF - SD or EMMC Interface Control Regsiter */
> + UINT8 VddEn;/* 0x10 - VDD Voltage Control Enable Register */
> + UINT8 VddSel; /* 0x11 - VDD Voltage Control Register */
> +} FPGA_REG_SET;
> +
> +/**
> + Function to read FPGA register.
> +**/
> +UINT8
> +FpgaRead (
Nxp/Qoriq in function names?
> + UINTN Reg
> + );
> +
> +/**
> + Function to write FPGA register.
> +**/
> +VOID
> +FpgaWrite (
> + UINTN Reg,
> + UINT8 Value
> + );
> +
> +/**
> + Function to read FPGA revision.
> +**/
> +VOID
> +FpgaRevBit (
> + UINT8 *Value
> + );
> +
> +/**
> + Function to initialize FPGA timings.
> +**/
> +VOID
> +FpgaInit (
> + VOID
> + );
> +
> +/**
> + Function to print board personality.
> +**/
> +VOID
> +PrintBoardPersonality (
> + VOID
> + );
> +
> +#define FPGA_BASE_PHYS 0x7fb0
> +
> +#define SRC_VBANK 0x25
> +#define SRC_NAND0x106
> +#define SRC_QSPI0x44
> +#define SRC_SD 0x40
> +
> +#define SERDES_FREQ1"100.00 MHz"
> +#define SERDES_FREQ2"156.25 MHz"
> +
> +#define FPGA_READ(Reg) FpgaRead (OFFSET_OF (FPGA_REG_SET, Reg))
> +#define FPGA_WRITE(Reg, Value) FpgaWrite (OFFSET_OF (FPGA_REG_SET, Reg),
> Value)
NXP/QORIQ and Nxp/Qoriq on the above too.
> +
> +#endif
Include guard comment, please.
> diff --git a/Silicon/NXP/Library/FpgaLib/FpgaLib.c
> b/Silicon/NXP/Library/FpgaLib/FpgaLib.c
> new file mode 100644
> index 000..93e9a90
> --- /dev/null
> +++ b/Silicon/NXP/Library/FpgaLib/FpgaLib.c
> @@ -0,0 +1,145 @@
> +/** @FpgaLib.c
> + Fpga Library containing functions to program and read the Fpga registers.
> +
> + FPGA is connected to IFC Controller and so MMIO APIs are used
> + to read/write FPGA registers
> +
> + Copyright 2017 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> +
Re: [edk2] [PATCH edk2-platforms] Platform/AMD/OverdriveBoard: build capsule unconditionally
On Wed, 19 Dec 2018 at 18:26, Leif Lindholm wrote:
>
> On Wed, Dec 19, 2018 at 06:06:14PM +0100, Ard Biesheuvel wrote:
> > Remove the DO_CAPSULE conditionals so that the capsules are
> > always built. This fixes a build issue that exists currently,
> > since the IPv6 enabled version of IScsiDxe that we now include
> > depends on a library class that can only be resolved if building
> > with DO_CAPSULE=TRUE.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ard Biesheuvel
>
> Reviewed-by: Leif Lindholm
>
Thanks!
Pushed as 54a0e7ae1289..c955b5129771
> > ---
> > Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 9 -
> > Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 9 -
> > 2 files changed, 18 deletions(-)
> >
> > diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > index 3d0544cf74cd..49671eefbdea 100644
> > --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > @@ -19,7 +19,6 @@
> >
> > DEFINE NUM_CORES= 8
> > DEFINE DO_FLASHER = FALSE
> > -DEFINE DO_CAPSULE = FALSE
> >
> >PLATFORM_NAME = Overdrive
> >PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB
> > @@ -124,14 +123,12 @@ DEFINE DO_CAPSULE = FALSE
> >
> >CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
> >
> > DisplayUpdateProgressLib|MdeModulePkg/Library/DisplayUpdateProgressLibGraphics/DisplayUpdateProgressLibGraphics.inf
> > -!if $(DO_CAPSULE) == TRUE
> >BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> >IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> >
> > EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
> >
> > FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
> >IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
> >
> > PlatformFlashAccessLib|Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf
> > -!endif
> >
> >TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
> >OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
> > @@ -492,8 +489,6 @@ DEFINE DO_CAPSULE = FALSE
> >gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
> >gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
> >
> > -!if $(DO_CAPSULE) == TRUE
> > -
> > [PcdsDynamicExDefault.common.DEFAULT]
> >
> > gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
> >
> > @@ -503,8 +498,6 @@ DEFINE DO_CAPSULE = FALSE
> ># d34b3d29-0085-4ab3-8be8-84188cc50489
> >gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,
> > 0x3d, 0x4b, 0xd3, 0x85, 0x0, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c,
> > 0xc5, 0x04, 0x89}
> >
> > -!endif
> > -
> > [PcdsDynamicHii]
> >
> > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
> >
> > @@ -761,7 +754,6 @@ DEFINE DO_CAPSULE = FALSE
> >}
> > !endif
> >
> > -!if $(DO_CAPSULE) == TRUE
> >#
> ># Firmware update
> >#
> > @@ -769,4 +761,3 @@ DEFINE DO_CAPSULE = FALSE
> >
> > SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> >
> > SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
> >
> > Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> > -!endif
> > diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> > b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> > index 840b3d0313f3..4b6b808c1454 100644
> > --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> > +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> > @@ -252,13 +252,11 @@ READ_LOCK_STATUS = TRUE
> >#
> >INF Silicon/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf
> >
> > -!if $(DO_CAPSULE) == TRUE
> >#
> ># Firmware update
> >#
> >INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> >INF
> > SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> > -!endif
> >
> > [FV.STYX_EFI]
> > FvAlignment= 16
> > @@ -288,10 +286,7 @@ READ_LOCK_STATUS = TRUE
> >INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
> >INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> >INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> > -
> > -!if $(DO_CAPSULE) == TRUE
> >INF RuleOverride = FMP_IMAGE_DESC
> > Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> > -!endif
> >
> >FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> > SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF
> > PROCESSING_REQUIRED = TRUE {
> > @@ -299,8 +294,6 @@ READ_LOCK_STATUS = TRUE
> > }
> >}
> >
> > -!if $(DO_CAPSULE) == TRUE
> > -
> > [FV.CapsuleDispatchFv]
> > FvAlignment= 16
>
Re: [edk2] [PATCH edk2-platforms] Platform/AMD/OverdriveBoard: build capsule unconditionally
On Wed, Dec 19, 2018 at 06:06:14PM +0100, Ard Biesheuvel wrote:
> Remove the DO_CAPSULE conditionals so that the capsules are
> always built. This fixes a build issue that exists currently,
> since the IPv6 enabled version of IScsiDxe that we now include
> depends on a library class that can only be resolved if building
> with DO_CAPSULE=TRUE.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 9 -
> Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 9 -
> 2 files changed, 18 deletions(-)
>
> diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> index 3d0544cf74cd..49671eefbdea 100644
> --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> @@ -19,7 +19,6 @@
>
> DEFINE NUM_CORES= 8
> DEFINE DO_FLASHER = FALSE
> -DEFINE DO_CAPSULE = FALSE
>
>PLATFORM_NAME = Overdrive
>PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB
> @@ -124,14 +123,12 @@ DEFINE DO_CAPSULE = FALSE
>
>CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
>
> DisplayUpdateProgressLib|MdeModulePkg/Library/DisplayUpdateProgressLibGraphics/DisplayUpdateProgressLibGraphics.inf
> -!if $(DO_CAPSULE) == TRUE
>BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
>IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>
> EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
>
> FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
>
> PlatformFlashAccessLib|Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf
> -!endif
>
>TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
>OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
> @@ -492,8 +489,6 @@ DEFINE DO_CAPSULE = FALSE
>gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
>gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
>
> -!if $(DO_CAPSULE) == TRUE
> -
> [PcdsDynamicExDefault.common.DEFAULT]
>
> gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>
> @@ -503,8 +498,6 @@ DEFINE DO_CAPSULE = FALSE
># d34b3d29-0085-4ab3-8be8-84188cc50489
>gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,
> 0x3d, 0x4b, 0xd3, 0x85, 0x0, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5,
> 0x04, 0x89}
>
> -!endif
> -
> [PcdsDynamicHii]
>
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
>
> @@ -761,7 +754,6 @@ DEFINE DO_CAPSULE = FALSE
>}
> !endif
>
> -!if $(DO_CAPSULE) == TRUE
>#
># Firmware update
>#
> @@ -769,4 +761,3 @@ DEFINE DO_CAPSULE = FALSE
>SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>
> Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> -!endif
> diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> index 840b3d0313f3..4b6b808c1454 100644
> --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
> @@ -252,13 +252,11 @@ READ_LOCK_STATUS = TRUE
>#
>INF Silicon/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf
>
> -!if $(DO_CAPSULE) == TRUE
>#
># Firmware update
>#
>INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>INF
> SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> -!endif
>
> [FV.STYX_EFI]
> FvAlignment= 16
> @@ -288,10 +286,7 @@ READ_LOCK_STATUS = TRUE
>INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
>INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> -
> -!if $(DO_CAPSULE) == TRUE
>INF RuleOverride = FMP_IMAGE_DESC
> Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> -!endif
>
>FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED
> = TRUE {
> @@ -299,8 +294,6 @@ READ_LOCK_STATUS = TRUE
> }
>}
>
> -!if $(DO_CAPSULE) == TRUE
> -
> [FV.CapsuleDispatchFv]
> FvAlignment= 16
> ERASE_POLARITY = 1
> @@ -369,8 +362,6 @@ CAPSULE_HEADER_INIT_VERSION = 0x1
>
>FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>
> -!endif
> -
>
>
> #
> # Rules are use with the [FV] section's module INF type to define
> --
> 2.19.2
>
[edk2] [PATCH edk2-platforms] Platform/AMD/OverdriveBoard: build capsule unconditionally
Remove the DO_CAPSULE conditionals so that the capsules are
always built. This fixes a build issue that exists currently,
since the IPv6 enabled version of IScsiDxe that we now include
depends on a library class that can only be resolved if building
with DO_CAPSULE=TRUE.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 9 -
Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 9 -
2 files changed, 18 deletions(-)
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 3d0544cf74cd..49671eefbdea 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -19,7 +19,6 @@
DEFINE NUM_CORES= 8
DEFINE DO_FLASHER = FALSE
-DEFINE DO_CAPSULE = FALSE
PLATFORM_NAME = Overdrive
PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB
@@ -124,14 +123,12 @@ DEFINE DO_CAPSULE = FALSE
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
DisplayUpdateProgressLib|MdeModulePkg/Library/DisplayUpdateProgressLibGraphics/DisplayUpdateProgressLibGraphics.inf
-!if $(DO_CAPSULE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
PlatformFlashAccessLib|Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf
-!endif
TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -492,8 +489,6 @@ DEFINE DO_CAPSULE = FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
-!if $(DO_CAPSULE) == TRUE
-
[PcdsDynamicExDefault.common.DEFAULT]
gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
@@ -503,8 +498,6 @@ DEFINE DO_CAPSULE = FALSE
# d34b3d29-0085-4ab3-8be8-84188cc50489
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,
0x3d, 0x4b, 0xd3, 0x85, 0x0, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5,
0x04, 0x89}
-!endif
-
[PcdsDynamicHii]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
@@ -761,7 +754,6 @@ DEFINE DO_CAPSULE = FALSE
}
!endif
-!if $(DO_CAPSULE) == TRUE
#
# Firmware update
#
@@ -769,4 +761,3 @@ DEFINE DO_CAPSULE = FALSE
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
-!endif
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
index 840b3d0313f3..4b6b808c1454 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
@@ -252,13 +252,11 @@ READ_LOCK_STATUS = TRUE
#
INF Silicon/AMD/Styx/Drivers/StyxRngDxe/StyxRngDxe.inf
-!if $(DO_CAPSULE) == TRUE
#
# Firmware update
#
INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
INF
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
-!endif
[FV.STYX_EFI]
FvAlignment= 16
@@ -288,10 +286,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-
-!if $(DO_CAPSULE) == TRUE
INF RuleOverride = FMP_IMAGE_DESC
Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
-!endif
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED =
TRUE {
@@ -299,8 +294,6 @@ READ_LOCK_STATUS = TRUE
}
}
-!if $(DO_CAPSULE) == TRUE
-
[FV.CapsuleDispatchFv]
FvAlignment= 16
ERASE_POLARITY = 1
@@ -369,8 +362,6 @@ CAPSULE_HEADER_INIT_VERSION = 0x1
FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
-!endif
-
#
# Rules are use with the [FV] section's module INF type to define
--
2.19.2
___
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Re: [edk2] [PATCH 0/2] Delete TCP, PXE, iSCSI driver in MdeModulePkg
On Wed, Dec 19, 2018 at 01:42:03PM +0800, Fu Siyuan wrote: > This patch series is to delete the Tcp4Dxe, UefiPxeBcDxe and IScsi4Dxe > drivers in MdeModulePkg. These drivers will not be maintained and can't > co-work with the dual-stack drivers in NetworkPkg. > > In future, people should use below NetworkPkg drivers instead: > NetworkPkg/IScsiDxe/IScsiDxe.inf > NetworkPkg/TcpDxe/TcpDxe.inf > NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf > These drivers are actively maintained with more bug fixes and new feature > support. > > All edk2 platforms DSC/FDF have already been updated to use the NetworkPkg > drivers in privious patch. > > Bugzilla link: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 I have no issue with this - as long as it happens soon. This is a very invasive change, and I want a long time between this removal and the next stable tag. However, due to the amount of code involved (and the impact this has on email servers), but also to allow more flexibility if we _do_ end up having to revert, it would be useful if this was split up into one patch per deleted module. / Leif > Fu Siyuan (2): > MdeModulePkg: Delete the TCP/PXE/ISCSI drivers in MdeModulePkg. > NetworkPkg: Remove some clarification from TCP/PXE/ISCSI driver INF. > > .../Network/IScsiDxe/ComponentName.c | 283 -- > .../Universal/Network/IScsiDxe/IScsiCHAP.c| 430 --- > .../Universal/Network/IScsiDxe/IScsiConfig.c | 1264 --- > .../Universal/Network/IScsiDxe/IScsiDhcp.c| 472 --- > .../Universal/Network/IScsiDxe/IScsiDriver.c | 676 > .../Network/IScsiDxe/IScsiExtScsiPassThru.c | 412 --- > .../Universal/Network/IScsiDxe/IScsiIbft.c| 539 --- > .../Network/IScsiDxe/IScsiInitiatorName.c | 116 - > .../Universal/Network/IScsiDxe/IScsiMisc.c| 948 -- > .../Universal/Network/IScsiDxe/IScsiProto.c | 2799 --- > .../Universal/Network/IScsiDxe/IScsiTcp4Io.c | 487 --- > MdeModulePkg/Universal/Network/IScsiDxe/Md5.c | 350 -- > .../Universal/Network/Tcp4Dxe/ComponentName.c | 433 --- > .../Universal/Network/Tcp4Dxe/SockImpl.c | 1201 --- > .../Universal/Network/Tcp4Dxe/SockInterface.c | 990 -- > .../Network/Tcp4Dxe/Tcp4Dispatcher.c | 717 > .../Universal/Network/Tcp4Dxe/Tcp4Driver.c| 782 - > .../Universal/Network/Tcp4Dxe/Tcp4Input.c | 1497 - > .../Universal/Network/Tcp4Dxe/Tcp4Io.c| 112 - > .../Universal/Network/Tcp4Dxe/Tcp4Main.c | 674 > .../Universal/Network/Tcp4Dxe/Tcp4Misc.c | 940 -- > .../Universal/Network/Tcp4Dxe/Tcp4Option.c| 352 -- > .../Universal/Network/Tcp4Dxe/Tcp4Output.c| 1238 --- > .../Universal/Network/Tcp4Dxe/Tcp4Timer.c | 584 > .../Network/UefiPxeBcDxe/ComponentName.c | 365 -- > .../Network/UefiPxeBcDxe/PxeBcDhcp.c | 1999 --- > .../Network/UefiPxeBcDxe/PxeBcDriver.c| 665 > .../Network/UefiPxeBcDxe/PxeBcImpl.c | 2989 - > .../Network/UefiPxeBcDxe/PxeBcMtftp.c | 454 --- > .../Network/UefiPxeBcDxe/PxeBcSupport.c | 221 -- > MdeModulePkg/MdeModulePkg.dsc |3 - > .../Network/IScsiDxe/ComponentName.h | 165 - > .../Universal/Network/IScsiDxe/IScsi4Dxe.uni | 25 - > .../Network/IScsiDxe/IScsi4DxeExtra.uni | 20 - > .../Universal/Network/IScsiDxe/IScsiCHAP.h| 106 - > .../Universal/Network/IScsiDxe/IScsiCommon.h | 22 - > .../Universal/Network/IScsiDxe/IScsiConfig.h | 166 - > .../Network/IScsiDxe/IScsiConfigDxe.vfr | 219 -- > .../IScsiDxe/IScsiConfigDxeStrings.uni| 62 - > .../Network/IScsiDxe/IScsiConfigNVDataStruc.h | 109 - > .../Universal/Network/IScsiDxe/IScsiDhcp.h| 55 - > .../Universal/Network/IScsiDxe/IScsiDriver.h | 140 - > .../Universal/Network/IScsiDxe/IScsiDxe.inf | 134 - > .../Network/IScsiDxe/IScsiExtScsiPassThru.h | 22 - > .../Universal/Network/IScsiDxe/IScsiIbft.h| 38 - > .../Universal/Network/IScsiDxe/IScsiImpl.h| 168 - > .../Network/IScsiDxe/IScsiInitiatorName.h | 74 - > .../Universal/Network/IScsiDxe/IScsiMisc.h| 317 -- > .../Universal/Network/IScsiDxe/IScsiProto.h | 1005 -- > .../Universal/Network/IScsiDxe/IScsiTcp4Io.h | 142 - > MdeModulePkg/Universal/Network/IScsiDxe/Md5.h | 80 - > .../Universal/Network/Tcp4Dxe/SockImpl.h | 131 - > .../Universal/Network/Tcp4Dxe/Socket.h| 954 -- > .../Universal/Network/Tcp4Dxe/Tcp4Driver.h| 342 -- > .../Universal/Network/Tcp4Dxe/Tcp4Dxe.inf | 94 - > .../Universal/Network/Tcp4Dxe/Tcp4Dxe.uni | 23 - > .../Network/Tcp4Dxe/Tcp4DxeExtra.uni | 20 - > .../Universal/Network/Tcp4Dxe/Tcp4Func.h | 781 - > .../Universal/Network/Tcp4Dxe/Tcp4Main.h | 494 --- > .../Universal/Network/Tcp4Dxe/Tcp4Option.h| 130 - > .../Universal/Network/Tcp4Dxe/Tcp4Proto.h | 357 -- > .../Network/UefiPxeBcDxe/PxeBcDhcp.h
Re: [edk2] [PATCH v2 edk2-platforms 0/8] Platform/ARM/Sgi: Add support for virtio network device
On Wed, Dec 19, 2018 at 4:08 PM Ard Biesheuvel wrote: > > On Fri, 14 Dec 2018 at 17:59, Vijayenthiran Subramaniam > wrote: > > > > Changes since v1: > > - Rebased the series against latest edk2-platforms > > > > This patch series adds support for virtio network controller found in ARM > > SGI > > plaform's fast models. The first patch in this series restructure the > > virtio device registration code to allow registration of additional virtio > > devices. The second patch adds support for the virtio network device. The > > rest > > of the patches update the ACPI tables to add an entry for the virtio network > > device and corresponding PCDs for virtio block and network device. > > > > Daniil Egranov (4): > > Platform/ARM/SgiPkg: Restructure virtio device registration > > Platform/ARM/SgiPkg: Add support for virtio net device > > Sgi575: AcpiTables: Use PCDs for virtio disk > > Sgi575: AcpiTables: Add entry for virtio network device > > > > Vijayenthiran Subramaniam (4): > > SgiClark.Ares: AcpiTables: Use PCDs for virtio disk > > SgiClark.Ares: AcpiTables: Add entry for virtio network device > > SgiClark.Helios: AcpiTables: Use PCDs for virtio disk > > SgiClark.Helios: AcpiTables: Add entry for virtio network device > > > > Reviewed-by: Ard Biesheuvel > > Pushed as c718cc037860..54a0e7ae1289 > > Thanks! Thank you Ard. Regards, Vijayenthiran ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] Platform/FVP-AArch64: switch to the SBSA watchdog
On Tue, Dec 18, 2018 at 05:46:21PM +0100, Ard Biesheuvel wrote: > On the FVP Foundation model, the SP805 watchdog appears to be 'wired' > incorrectly, resulting in a watchdog counter that decrements at the > APB clock rate of 24 MHz instead of the usual 32 kHz. Since the > timer start value is only 32-bits wide, this makes the watchdog > unusable in UEFI, since the default timeout set by the DXE core is > 5 minutes, which is not representable in 32-bit at this clock rate. > > So switch to the SBSA watchdog instead, which is wired up to the > generic timer, and ticks at the correct rate. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel >From my point of view: Reviewed-by: Leif Lindholm But I'd like a nod from Sami or Thomas (added to cc) as well. > --- > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 7 > --- > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 2 +- > Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h | 3 > +++ > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 > +++ > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 7 > ++- > 5 files changed, 17 insertions(+), 5 deletions(-) > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > index 7db1c675c3d9..0941edeaf53c 100644 > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > @@ -133,9 +133,10 @@ >gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C17 > >## SBSA Watchdog Count > -!ifndef DISABLE_SBSA_WATCHDOG >gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1 > -!endif > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a44 > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a45 > + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59 > > !ifdef EDK2_ENABLE_PL111 >## PL111 Versatile Express Motherboard controller > @@ -265,7 +266,7 @@ > !ifdef EDK2_ENABLE_PL111 >ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > !endif > - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > ># SMBIOS Support > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > index 239029d05cf1..c3e573e1bb4f 100644 > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 > !ifdef EDK2_ENABLE_PL111 >INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > !endif > - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > ># ># Semi-hosting filesystem > diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > index d856b6daa1d7..e267912ef5f5 100644 > --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > @@ -76,4 +76,7 @@ > #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1 > #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1 > > +#define SBSA_WATCHDOG_BASE 0x2a44 > +#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB) > + > #endif > diff --git > a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > index 53898c5e957e..511a2ac99b75 100644 > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > @@ -60,5 +60,8 @@ >gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase >gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength > > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase > + > [Ppis] >gArmMpCoreInfoPpiGuid > diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > index c8eefa0cf28b..eb8f6a48cd02 100644 > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > @@ -23,7 +23,7 @@ > #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 > : 0) > > // Number of Virtual Memory Map Descriptors > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR) > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR) > > // DDR attributes > #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
Re: [edk2] [PATCH v2 edk2-platforms 0/8] Platform/ARM/Sgi: Add support for virtio network device
On Fri, 14 Dec 2018 at 17:59, Vijayenthiran Subramaniam
wrote:
>
> Changes since v1:
> - Rebased the series against latest edk2-platforms
>
> This patch series adds support for virtio network controller found in ARM SGI
> plaform's fast models. The first patch in this series restructure the
> virtio device registration code to allow registration of additional virtio
> devices. The second patch adds support for the virtio network device. The rest
> of the patches update the ACPI tables to add an entry for the virtio network
> device and corresponding PCDs for virtio block and network device.
>
> Daniil Egranov (4):
> Platform/ARM/SgiPkg: Restructure virtio device registration
> Platform/ARM/SgiPkg: Add support for virtio net device
> Sgi575: AcpiTables: Use PCDs for virtio disk
> Sgi575: AcpiTables: Add entry for virtio network device
>
> Vijayenthiran Subramaniam (4):
> SgiClark.Ares: AcpiTables: Use PCDs for virtio disk
> SgiClark.Ares: AcpiTables: Add entry for virtio network device
> SgiClark.Helios: AcpiTables: Use PCDs for virtio disk
> SgiClark.Helios: AcpiTables: Add entry for virtio network device
>
Reviewed-by: Ard Biesheuvel
Pushed as c718cc037860..54a0e7ae1289
Thanks!
> Platform/ARM/SgiPkg/SgiPlatform.dec
> | 14 ++-
> Platform/ARM/SgiPkg/SgiPlatform.dsc
> | 21 +++-
> Platform/ARM/SgiPkg/SgiPlatform.fdf
> | 4 +
> Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
> | 7 ++
> Platform/ARM/SgiPkg/AcpiTables/SgiClarkAresAcpiTables.inf
> | 7 ++
> Platform/ARM/SgiPkg/AcpiTables/SgiClarkHeliosAcpiTables.inf
> | 7 ++
> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> | 11 +-
> Platform/ARM/SgiPkg/Include/Guid/SgiVirtioDevicesFormSet.h
> | 24
> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> | 14 +--
> Platform/ARM/SgiPkg/Drivers/PlatformDxe/{VirtioBlockIo.c => VirtioDevices.c}
> | 117 +++-
> Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> | 28 -
> Platform/ARM/SgiPkg/AcpiTables/SgiClarkAres/Dsdt.asl
> | 29 -
> Platform/ARM/SgiPkg/AcpiTables/SgiClarkHelios/Dsdt.asl
> | 28 -
> 13 files changed, 260 insertions(+), 51 deletions(-)
> create mode 100644 Platform/ARM/SgiPkg/Include/Guid/SgiVirtioDevicesFormSet.h
> rename Platform/ARM/SgiPkg/Drivers/PlatformDxe/{VirtioBlockIo.c =>
> VirtioDevices.c} (25%)
>
> --
> 2.7.4
>
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Re: [edk2] [PATCH] EmbeddedPkg: remove GdbDebugAgent library
On Wed, 19 Dec 2018 at 16:30, Ard Biesheuvel wrote: > > On Wed, 19 Dec 2018 at 16:20, Leif Lindholm wrote: > > > > On Wed, Dec 12, 2018 at 03:17:29PM +, Leif Lindholm wrote: > > > > Considering the commit log from its introduction > > > > > > > > """ > > > > commit 969eba7b0df70c9aa261eaf005085568b88de87c > > > > Author: andrewfish > > > > Date: Sat Apr 3 00:41:42 2010 + > > > > > > > > Add the beginning of a GDB based Debug Agent. IA-32 and X64 don't have > > > > low level interrupt code yet. I've been testing on ARM. > > > > > > > > git-svn-id: > > > > https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10334 > > > > 6f19259b-4bc3-4df7-8a09-765794883524 > > > > """ > > > > > > > > the lack of low level interrupt code in this patch, and the following > > > > snippet from the .inf > > > > > > > > """ > > > > [Sources.X64] > > > > Ia32/Processor.c > > > > > > > > [Sources.Ia32] > > > > X64/Processor.c > > > > """ > > > > > > > > I think it is safe to say that this code was never used on anything but > > > > ARM. > > > > > > I believe the same, but since we have the author of both the code and > > > that commit message easily accessible, I would like to verify before > > > we nuke it. > > > > Well, he didn't speak up for a week, and is probably riding > > wilderbeest as I type this - so yeah, go ahead. > > > > We can always revert :) > > > > Reviewed-by: Leif Lindholm > > > > Thanks > > Pushed as 5f0b035f107d..3bdc78e1 Now with the list and Andrew in cc ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] EmbeddedPkg: remove GdbDebugAgent library
On Wed, Dec 12, 2018 at 03:17:29PM +, Leif Lindholm wrote: > > Considering the commit log from its introduction > > > > """ > > commit 969eba7b0df70c9aa261eaf005085568b88de87c > > Author: andrewfish > > Date: Sat Apr 3 00:41:42 2010 + > > > > Add the beginning of a GDB based Debug Agent. IA-32 and X64 don't have > > low level interrupt code yet. I've been testing on ARM. > > > > git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10334 > > 6f19259b-4bc3-4df7-8a09-765794883524 > > """ > > > > the lack of low level interrupt code in this patch, and the following > > snippet from the .inf > > > > """ > > [Sources.X64] > > Ia32/Processor.c > > > > [Sources.Ia32] > > X64/Processor.c > > """ > > > > I think it is safe to say that this code was never used on anything but ARM. > > I believe the same, but since we have the author of both the code and > that commit message easily accessible, I would like to verify before > we nuke it. Well, he didn't speak up for a week, and is probably riding wilderbeest as I type this - so yeah, go ahead. We can always revert :) Reviewed-by: Leif Lindholm / Leif ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-non-osi 1/1] Platform/Socionext: update ARM-TF binary to include OP-TEE
On Tue, 18 Dec 2018 at 14:05, Ard Biesheuvel wrote: > > On Tue, 18 Dec 2018 at 14:04, Sumit Garg wrote: > > > > On Tue, 18 Dec 2018 at 18:30, Ard Biesheuvel > > wrote: > > > > > > On Tue, 18 Dec 2018 at 13:58, Sumit Garg wrote: > > > > > > > > On Tue, 18 Dec 2018 at 18:16, Ard Biesheuvel > > > > wrote: > > > > > > > > > > On Tue, 18 Dec 2018 at 13:09, Sumit Garg > > > > > wrote: > > > > > > > > > > > > Include a prebuilt binary of OP-TEE OS built from commit > > > > > > a5d528c7e54fd7726230483bd4cd5c4786d7703f. > > > > > > (https://github.com/OP-TEE/optee_os.git master) > > > > > > > > > > > > Also update ARM-TF RELEASE build to commit 47577cbaaf4b. > > > > > > > > > > > > Cc: Ard Biesheuvel > > > > > > Cc: Leif Lindholm > > > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > > > > > Signed-off-by: Sumit Garg > > > > > > --- > > > > > > Platform/Socionext/DeveloperBox/fip_all_arm_tf.bin | Bin 46824 -> > > > > > > 415251 bytes > > > > > > > > > > Thanks Sumit! > > > > > > > > > > In the future, please use --no-binary when sending patches like this > > > > > one. > > > > > > > > > > > > > Sure will take care of this in future. > > > > > > > > > However, do you have any explanation why the size increases 10x? This > > > > > patch adds the pseudo-TA, but OP-TEE was already included in the > > > > > previous build, so this is a bit unexpected. > > > > > > > > > > > > > Actually I think ARM-TF was not updated earlier to include OP-TEE in > > > > upstream (tee.bin size: 316392 bytes). > > > > > > > > > > Ah, right. So we added the OP-TEE aware ATF build but not OP-TEE > > > itself? That would indeed explain it. > > > > We didn't updated ATF build at all in upstream. I think you have > > updated ATF build in local repo [1] only. > > > > [1] git://git.linaro.org/leg/noupstream/edk2-non-osi.git > > > > Indeed. I cannot apply this patch. Could you please rebase it to latest upstream edk2-non-osi and send me a link to the repo? ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH] BaseTools/tools_def ARM: use softfloat target for CLANG3x
The target triplet we use for CLANG35 and CLANG38 specifies a hardfloat target, and so the binaries that are emitted are annotated as using VFP registers for passing floating point arguments, even though no VFP is used anywhere in the code. This works fine as long as we don't try to link against code that uses software floating point, since combining object files with different floating point calling conventions is not permitted. So switch to the softfloat arm-linux-gnueabi triplet instead. Unfortunately, this requires all CLANG3x/ARM users to install another cross toolchain. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- BaseTools/Conf/tools_def.template | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 2ba833e1fb06..f82bc72327d8 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -5231,7 +5231,7 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 *_CLANG35_*_DLINK_PATH = ENV(CLANG35_BIN)clang *_CLANG35_*_ASLDLINK_PATH= ENV(CLANG35_BIN)clang -DEFINE CLANG35_ARM_TARGET= -target arm-linux-gnueabihf +DEFINE CLANG35_ARM_TARGET= -target arm-linux-gnueabi DEFINE CLANG35_AARCH64_TARGET= -target aarch64-linux-gnu DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare -Wno-empty-body -Wno-unknown-warning-option @@ -5384,7 +5384,7 @@ NOOPT_CLANG38_X64_DLINK2_FLAGS = DEF(GCC5_X64_DLINK2_FLAGS) -O0 ## # CLANG38 ARM definitions ## -DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabihf +DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabi DEFINE CLANG38_ARM_CC_FLAGS = DEF(GCC_ARM_CC_FLAGS) DEF(CLANG38_ARM_TARGET) DEF(CLANG38_WARNING_OVERRIDES) -mno-movt DEFINE CLANG38_ARM_DLINK_FLAGS = DEF(CLANG38_ARM_TARGET) DEF(GCC_ARM_DLINK_FLAGS) -- 2.19.2 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms 13/41] Silicon/NXP : Add support of IfcLib
On Wed, Nov 28, 2018 at 08:31:27PM +0530, Meenakshi Aggarwal wrote:
> Add support of IfcLib, it will be used to perform
> any operation on IFC controller.
Expand acronym.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> Silicon/NXP/Include/Library/IfcLib.h | 26 +
> Silicon/NXP/Library/IfcLib/IfcLib.c | 150 +++
> Silicon/NXP/Library/IfcLib/IfcLib.h | 190
> ++
> Silicon/NXP/Library/IfcLib/IfcLib.inf | 38 +++
Names Ifc -> NxpIfc please.
> Silicon/NXP/NxpQoriqLs.dec| 1 +
> 5 files changed, 405 insertions(+)
> create mode 100644 Silicon/NXP/Include/Library/IfcLib.h
> create mode 100644 Silicon/NXP/Library/IfcLib/IfcLib.c
> create mode 100644 Silicon/NXP/Library/IfcLib/IfcLib.h
> create mode 100644 Silicon/NXP/Library/IfcLib/IfcLib.inf
>
> diff --git a/Silicon/NXP/Include/Library/IfcLib.h
> b/Silicon/NXP/Include/Library/IfcLib.h
> new file mode 100644
> index 000..8d2c151
> --- /dev/null
> +++ b/Silicon/NXP/Include/Library/IfcLib.h
> @@ -0,0 +1,26 @@
> +/** @IfcLib.h
> +
> + The integrated flash controller (IFC) is used to interface with external
> asynchronous
> + NAND flash, asynchronous NOR flash, SRAM, generic ASIC memories and EPROM.
> +
> + Copyright 2018 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#ifndef __IFC_LIB_H__
> +#define __IFC_LIB_H__
Header guard NXP_ (and/or QORIQ_) prefix.
> +
> +VOID
> +IfcInit (
> + VOID
> + );
> +
> +#endif //__IFC_LIB_H__
> diff --git a/Silicon/NXP/Library/IfcLib/IfcLib.c
> b/Silicon/NXP/Library/IfcLib/IfcLib.c
> new file mode 100644
> index 000..8cf02ae
> --- /dev/null
> +++ b/Silicon/NXP/Library/IfcLib/IfcLib.c
> @@ -0,0 +1,150 @@
> +/** @IfcLib.c
> +
> + The integrated flash controller (IFC) is used to interface with external
> asynchronous/
> + synchronous NAND flash, asynchronous NOR flash, SRAM, generic ASIC memory
> and
> + EPROM.
> + It has eight chip-selects, to which a maximum of eight flash devices can
> be attached,
> + although only one of these can be accessed at any given time.
> +
> + Copyright 2018 NXP
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD
> License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#include
> +#include "IfcLib.h"
> +
> +STATIC MMIO_OPERATIONS_32 *mMmioOps;
> +
> +STATIC UINT8 mNandCS;
> +STATIC UINT8 mNorCS;
> +STATIC UINT8 mFpgaCS;
> +
> +VOID
Local only?
If so, STATIC please.
> +SetTimings (
> + IN UINT8CS,
> + IN IFC_TIMINGS IfcTimings
> + )
> +{
> + IFC_REGS*IfcRegs;
> +
> + IfcRegs = (IFC_REGS*)PcdGet64 (PcdIfcBaseAddr);
> +
> + // Configure Extended chip select property registers
> + mMmioOps->Write ((UINTN)>CsprCs[CS].CsprExt, IfcTimings.CsprExt);
> +
> + // Configure Fpga timing registers
> + mMmioOps->Write ((UINTN)>FtimCs[CS].Ftim[IFC_FTIM0],
> IfcTimings.Ftim[0]);
> + mMmioOps->Write ((UINTN)>FtimCs[CS].Ftim[IFC_FTIM1],
> IfcTimings.Ftim[1]);
> + mMmioOps->Write ((UINTN)>FtimCs[CS].Ftim[IFC_FTIM2],
> IfcTimings.Ftim[2]);
> + mMmioOps->Write ((UINTN)>FtimCs[CS].Ftim[IFC_FTIM3],
> IfcTimings.Ftim[3]);
> +
> + // Configure chip select option registers
> + mMmioOps->Write ((UINTN)>CsprCs[CS].Cspr, IfcTimings.Cspr);
> +
> + // Configure address mask registers
> + mMmioOps->Write ((UINTN)>AmaskCs[CS].Amask, IfcTimings.Amask);
> +
> + // Configure chip select property registers
> + mMmioOps->Write ((UINTN)>CsorCs[CS].Csor, IfcTimings.Csor);
> +
> + return;
> +}
> +
> +VOID
Local only?
If so, STATIC please.
> +NandInit(
> + VOID
> + )
> +{
> + IFC_REGS* IfcRegs;
> + IFC_TIMINGS NandIfcTimings;
> +
> + IfcRegs = (IFC_REGS*)PcdGet64 (PcdIfcBaseAddr);
> +
> + // Get Nand Flash Timings
> + GetIfcNandFlashTimings ();
> +
> + // Validate chip select
> + if (NandIfcTimings.CS < IFC_CS_MAX) {
> +mNandCS = NandIfcTimings.CS;
> +
> +// clear event registers
> +mMmioOps->Write ((UINTN)>IfcNand.PgrdcmplEvtStat, ~0U);
> +
> +mMmioOps->Write ((UINTN)>IfcNand.NandEvterStat, ~0U);
> +
> +// Enable error and event for any detected errors
> +mMmioOps->Write ((UINTN)>IfcNand.NandEvterEn,
> +
Re: [edk2] [PATCH v3 3/3] MdeModulePkg/EbcDebugger: Remove an internal function AsciiToUpper
Hi,
I think the patch will bring issue with regard to bisecting.
One way to resolve this is to introduce a patch to rename the 'AsciiToUpper'
within file EdbSupportString.c to something like 'InternalAsciiToUpper'. And
make the new patch as the 1st one of the series. Then goes the remaining 3
patches of this version of the series.
I also have a question that will we perform a cleanup for other 'XXXToUpper'
functions within the code base?
I did a quick search for keyword 'ToUpper', and found some (not all) possible
candidates that can be replaced with the newly added BaseLib APIs:
FatPkg\FatPei\FatLiteLib.c
Line 34: ToUpper (
MdeModulePkg\Library\DxeHttpLib\DxeHttpLib.c
Line 911: HttpIoCharToUpper (
MdeModulePkg\Universal\EbcDxe\EbcDebugger\EdbSupportString.c
Line 319: UnicodeToUpper (
ShellPkg\Library\UefiShellDebug1CommandsLib\UefiShellDebug1CommandsLib.c
Line 134: CharToUpper (
ShellPkg\Library\UefiShellLib\UefiShellLib.c
Line 3759: InternalShellCharToUpper (
Best Regards,
Hao Wu
> -Original Message-
> From: Zhang, Shenglei
> Sent: Wednesday, December 19, 2018 4:43 PM
> To: edk2-devel@lists.01.org
> Cc: Wang, Jian J; Wu, Hao A; Zeng, Star
> Subject: [PATCH v3 3/3] MdeModulePkg/EbcDebugger: Remove an internal
> function AsciiToUpper
>
> AsciiToUpper in EdbSupportString.c is an internal function.
> And we will introduce a public function which has the same name
> and effect. So we remove its implement. Code in EdbSupportString.c
> now consumes the public one.
> https://bugzilla.tianocore.org/show_bug.cgi?id=1369
>
> Cc: Jian J Wang
> Cc: Hao Wu
> Cc: Star Zeng
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Shenglei Zhang
> ---
> .../EbcDxe/EbcDebugger/EdbSupportString.c | 15 ---
> 1 file changed, 15 deletions(-)
>
> diff --git
> a/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
> b/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
> index 78a0559079..0eb894ddfb 100644
> --- a/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
> +++ b/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
> @@ -323,21 +323,6 @@ UnicodeToUpper (
>return (Chr >= L'a' && Chr <= L'z') ? Chr - (L'a' - L'A') : Chr;
> }
>
> -/**
> -
> - Convert the character to upper case.
> -
> - @param Chrthe character to be converted.
> -
> -**/
> -STATIC
> -CHAR8
> -AsciiToUpper (
> - IN CHAR8 Chr
> - )
> -{
> - return (Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr;
> -}
>
> /**
>Compare the Unicode and Ascii string pointed by String to the string
> pointed by String2.
> --
> 2.18.0.windows.1
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Re: [edk2] [PATCH edk2-platforms] Silicon/AMD: drop ArmBds remnant Pcd imports from StyxDtbLoaderLib
On Wed, Dec 19, 2018 at 11:08:32AM +0100, Ard Biesheuvel wrote: > On Tue, 18 Dec 2018 at 19:38, Leif Lindholm wrote: > > > > ArmPkg PcdArmLinuxFdtMaxOffset and PcdArmLinuxFdtAlignment are still > > referenced in StyxDtbLoaderLib.inf, but not actually used anywhere - > > so drop them. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Leif Lindholm > > Reviewed-by: Ard Biesheuvel Thanks! Pushed as c718cc0378. > > --- > > Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -- > > 1 file changed, 2 deletions(-) > > > > diff --git a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > > b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > > index 23c5e563bb..3fbc0548aa 100644 > > --- a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > > +++ b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > > @@ -52,8 +52,6 @@ [Pcd] > > [FixedPcd] > >gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable > >gArmPlatformTokenSpaceGuid.PcdCoreCount > > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset > > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment > >gAmdStyxTokenSpaceGuid.PcdEnableKcs > >gAmdStyxTokenSpaceGuid.PcdSata1PortCount > > > > -- > > 2.11.0 > > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] ArmPkg: drop ArmBds remnant Pcds from .dec
On Wed, Dec 19, 2018 at 11:08:48AM +0100, Ard Biesheuvel wrote: > On Tue, 18 Dec 2018 at 19:38, Leif Lindholm wrote: > > > > The following Pcds > > - gArmTokenSpaceGuid.PcdArmLinuxSpinTable > > - gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset > > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset > > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment > > remained defined, without actual users. > > So get rid of them. > > > > One reference to be deleted separately from edk2-platforms. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Leif Lindholm > > Reviewed-by: Ard Biesheuvel Thanks! Pushed as 5f0b035f10. > > --- > > ArmPkg/ArmPkg.dec | 20 > > 1 file changed, 20 deletions(-) > > > > diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec > > index d99eb6769f..0ec5e8efd6 100644 > > --- a/ArmPkg/ArmPkg.dec > > +++ b/ArmPkg/ArmPkg.dec > > @@ -80,10 +80,6 @@ [PcdsFeatureFlag.common] > ># it has been configured by the CPU DXE > >gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x0032 > > > > - # Define if the spin-table mechanism is used by the secondary cores when > > booting > > - # Linux (instead of PSCI) > > - gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x0033 > > - > ># Define if the GICv3 controller should use the GICv2 legacy > >gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x0042 > > > > @@ -173,16 +169,6 @@ [PcdsFixedAtBuild.ARM] > ># By default we do not do a transition to non-secure mode > >gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x003E > > > > - # The Linux ATAGs are expected to be under 0x4000 (16KB) from the > > beginning of the System Memory > > - gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x0020 > > - > > - # If the fixed FDT address is not available, then it should be loaded > > below the kernel. > > - # The recommendation from the Linux kernel is to have the FDT below 16KB. > > - # (see the kernel doc: Documentation/arm/Booting) > > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x0023 > > - # The FDT blob must be loaded at a 64bit aligned address. > > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x0026 > > - > ># Non Secure Access Control Register > ># - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality > ># - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 > > @@ -221,12 +207,6 @@ [PcdsFixedAtBuild.AARCH64] > ># Other modes include using SP0 or switching to Aarch32, but these are > ># not currently supported. > >gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x003E > > - # If the fixed FDT address is not available, then it should be loaded > > above the kernel. > > - # The recommendation from the AArch64 Linux kernel is to have the FDT > > below 512MB. > > - # (see the kernel doc: Documentation/arm64/booting.txt) > > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x2000|UINT32|0x0023 > > - # The FDT blob must be loaded at a 2MB aligned address. > > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x0020|UINT32|0x0026 > > > > > > # > > -- > > 2.11.0 > > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH edk2-platforms] Silicon/AMD: drop ArmBds remnant Pcd imports from StyxDtbLoaderLib
On Tue, 18 Dec 2018 at 19:38, Leif Lindholm wrote: > > ArmPkg PcdArmLinuxFdtMaxOffset and PcdArmLinuxFdtAlignment are still > referenced in StyxDtbLoaderLib.inf, but not actually used anywhere - > so drop them. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Leif Lindholm Reviewed-by: Ard Biesheuvel > --- > Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > index 23c5e563bb..3fbc0548aa 100644 > --- a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > +++ b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf > @@ -52,8 +52,6 @@ [Pcd] > [FixedPcd] >gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable >gArmPlatformTokenSpaceGuid.PcdCoreCount > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment >gAmdStyxTokenSpaceGuid.PcdEnableKcs >gAmdStyxTokenSpaceGuid.PcdSata1PortCount > > -- > 2.11.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] ArmPkg: drop ArmBds remnant Pcds from .dec
On Tue, 18 Dec 2018 at 19:38, Leif Lindholm wrote: > > The following Pcds > - gArmTokenSpaceGuid.PcdArmLinuxSpinTable > - gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment > remained defined, without actual users. > So get rid of them. > > One reference to be deleted separately from edk2-platforms. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Leif Lindholm Reviewed-by: Ard Biesheuvel > --- > ArmPkg/ArmPkg.dec | 20 > 1 file changed, 20 deletions(-) > > diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec > index d99eb6769f..0ec5e8efd6 100644 > --- a/ArmPkg/ArmPkg.dec > +++ b/ArmPkg/ArmPkg.dec > @@ -80,10 +80,6 @@ [PcdsFeatureFlag.common] ># it has been configured by the CPU DXE >gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x0032 > > - # Define if the spin-table mechanism is used by the secondary cores when > booting > - # Linux (instead of PSCI) > - gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x0033 > - ># Define if the GICv3 controller should use the GICv2 legacy >gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x0042 > > @@ -173,16 +169,6 @@ [PcdsFixedAtBuild.ARM] ># By default we do not do a transition to non-secure mode >gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x003E > > - # The Linux ATAGs are expected to be under 0x4000 (16KB) from the > beginning of the System Memory > - gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x0020 > - > - # If the fixed FDT address is not available, then it should be loaded > below the kernel. > - # The recommendation from the Linux kernel is to have the FDT below 16KB. > - # (see the kernel doc: Documentation/arm/Booting) > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x0023 > - # The FDT blob must be loaded at a 64bit aligned address. > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x0026 > - ># Non Secure Access Control Register ># - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality ># - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 > @@ -221,12 +207,6 @@ [PcdsFixedAtBuild.AARCH64] ># Other modes include using SP0 or switching to Aarch32, but these are ># not currently supported. >gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x003E > - # If the fixed FDT address is not available, then it should be loaded > above the kernel. > - # The recommendation from the AArch64 Linux kernel is to have the FDT > below 512MB. > - # (see the kernel doc: Documentation/arm64/booting.txt) > - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x2000|UINT32|0x0023 > - # The FDT blob must be loaded at a 2MB aligned address. > - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x0020|UINT32|0x0026 > > > # > -- > 2.11.0 > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH 2/4] ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt mode
Hi Ard, On Tue, Dec 18, 2018 at 9:59 PM Ard Biesheuvel wrote: > > On Tue, 18 Dec 2018 at 14:39, Leif Lindholm wrote: > > > > On Tue, Dec 18, 2018 at 02:10:12PM +0100, Ard Biesheuvel wrote: > > > The SP805 watchdog driver doesn't implement the PI watchdog protocol > > > fully, but always simply resets the system if the watchdog time runs > > > out. > > > > > > However, the hardware does support the intended usage model, as long > > > as the SP805 is wired up correctly. So let's implement interrupt based > > > mode involving a handler that is registered by the DXE core and invoked > > > when the watchdog runs out. In the interrupt handler, we invoke the > > > notify function if one was registered, or call the ResetSystem() > > > runtime service otherwise (as per the UEFI spec) > > > > The only question mark from my end is - what happens when the > > interrupt isn't wired up correctly? Would it be worth to bail out and > > refuse to register the driver if PcdSP805WatchdogInterrupt is set to > > 0? > > > > Thomas? > > > > I have left the code in place that enables the hard reset, but the > timeout is double the programmed value (since the countdown timer is > restarted on an interrupt, and the hard reset is generated when it > reaches zero the second time) > > This should cover both the miswired interrupt scenario, and the > scenario where ResetSystem() (or the handler) gets stuck and never > returns. Yes, this would suffice. But the system would reset after twice the amount of time than programmed, which probably is okay. -Thomas. > ___ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 1/3] MdePkg/IndustryStandard: Introduce a correctly spelled Marco
EFI_RETURNING_FROM_EFI_APPLICATOIN is incorrect. Before removing it, introduce the correctly spelled one, EFI_RETURNING_FROM_EFI_APPLICATION. https://bugzilla.tianocore.org/show_bug.cgi?id=1368 Cc: Michael D Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang --- MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h index 2d223f4ea7..ee517ddbda 100644 --- a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h +++ b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h @@ -58,6 +58,8 @@ "Calling EFI Application from Boot Option" #define EFI_RETURNING_FROM_EFI_APPLICATOIN \ "Returning from EFI Application from Boot Option" +#define EFI_RETURNING_FROM_EFI_APPLICATION \ + "Returning from EFI Application from Boot Option" #define EFI_EXIT_BOOT_SERVICES_INVOCATION \ "Exit Boot Services Invocation" #define EFI_EXIT_BOOT_SERVICES_FAILED \ -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 3/3] MdePkg/IndustryStandard: Remove an incorrectly spelled Marco
EFI_RETURNING_FROM_EFI_APPLICATOIN is not correctly spelled, so now remove it. https://bugzilla.tianocore.org/show_bug.cgi?id=1368 Cc: Michael D Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang --- MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h index ee517ddbda..96784708ae 100644 --- a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h +++ b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h @@ -56,8 +56,6 @@ #define EFI_CALLING_EFI_APPLICATION \ "Calling EFI Application from Boot Option" -#define EFI_RETURNING_FROM_EFI_APPLICATOIN \ - "Returning from EFI Application from Boot Option" #define EFI_RETURNING_FROM_EFI_APPLICATION \ "Returning from EFI Application from Boot Option" #define EFI_EXIT_BOOT_SERVICES_INVOCATION \ -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 2/3] SecurityPkg/Tcg: Fix typos in TcgDxe.c and Tcg2Dxe.c
Change EFI_RETURNING_FROM_EFI_APPLICATOIN to
EFI_RETURNING_FROM_EFI_APPLICATION.
https://bugzilla.tianocore.org/show_bug.cgi?id=1368
Cc: Chao Zhang
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang
---
SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c | 4 ++--
SecurityPkg/Tcg/TcgDxe/TcgDxe.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
index aa463b287e..662637f3e3 100644
--- a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
+++ b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
@@ -2314,10 +2314,10 @@ OnReadyToBoot (
//
Status = TcgMeasureAction (
4,
- EFI_RETURNING_FROM_EFI_APPLICATOIN
+ EFI_RETURNING_FROM_EFI_APPLICATION
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "%a not Measured. Error!\n",
EFI_RETURNING_FROM_EFI_APPLICATOIN));
+ DEBUG ((EFI_D_ERROR, "%a not Measured. Error!\n",
EFI_RETURNING_FROM_EFI_APPLICATION));
}
//
diff --git a/SecurityPkg/Tcg/TcgDxe/TcgDxe.c b/SecurityPkg/Tcg/TcgDxe/TcgDxe.c
index 21837fe3d3..3889fb4a81 100644
--- a/SecurityPkg/Tcg/TcgDxe/TcgDxe.c
+++ b/SecurityPkg/Tcg/TcgDxe/TcgDxe.c
@@ -1180,10 +1180,10 @@ OnReadyToBoot (
// 6. Not first attempt, meaning a return from last attempt
//
Status = TcgMeasureAction (
- EFI_RETURNING_FROM_EFI_APPLICATOIN
+ EFI_RETURNING_FROM_EFI_APPLICATION
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "%a not Measured. Error!\n",
EFI_RETURNING_FROM_EFI_APPLICATOIN));
+ DEBUG ((EFI_D_ERROR, "%a not Measured. Error!\n",
EFI_RETURNING_FROM_EFI_APPLICATION));
}
}
--
2.18.0.windows.1
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[edk2] [PATCH v2 0/3] Fix an incorrectly spelled Marco
EFI_RETURNING_FROM_EFI_APPLICATOIN is not spelled correctly and change it to EFI_RETURNING_FROM_EFI_APPLICATION. v2 In v1 EFI_RETURNING_FROM_EFI_APPLICATOIN is changed into EFI_RETURNING_FROM_EFI_APPLICATION directly in one patch, which may lead to unbisectability. To solve this problem, the correct one is introduced in 1/3 and remove the incorrect one in 3/3. Cc: Leif Lindholm Cc: Laszlo Ersek Cc: Michael D Kinney Cc: Liming Gao Cc: Jian J Wang Cc: Hao Wu Cc: Star Zeng Cc: Philippe Mathieu-Daud? Shenglei Zhang (3): MdePkg/IndustryStandard: Introduce a correctly spelled Marco SecurityPkg/Tcg: Fix typos in TcgDxe.c and Tcg2Dxe.c MdePkg/IndustryStandard: Remove an incorrectly spelled Marco MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 2 +- SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c | 4 ++-- SecurityPkg/Tcg/TcgDxe/TcgDxe.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v3 2/3] MdePkg/BaseLib: Remove InternalCharToUpper and InternalBaseLibAsciiToUpper
InternalCharToUpper and InternalBaseLibAsciiToUpper are internal functions and now we will introduce public functions that have the same effects. So I remove their definition in BaseLibInternals.h. https://bugzilla.tianocore.org/show_bug.cgi?id=1369 Cc: Leif Lindholm Cc: Laszlo Ersek Cc: Michael D Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang --- MdePkg/Library/BaseLib/BaseLibInternals.h | 42 --- 1 file changed, 42 deletions(-) diff --git a/MdePkg/Library/BaseLib/BaseLibInternals.h b/MdePkg/Library/BaseLib/BaseLibInternals.h index 8855231c1a..9db925b157 100644 --- a/MdePkg/Library/BaseLib/BaseLibInternals.h +++ b/MdePkg/Library/BaseLib/BaseLibInternals.h @@ -469,28 +469,6 @@ InternalIsDecimalDigitCharacter ( ); -/** - Convert a Unicode character to upper case only if - it maps to a valid small-case ASCII character. - - This internal function only deal with Unicode character - which maps to a valid small-case ASCII character, i.e. - L'a' to L'z'. For other Unicode character, the input character - is returned directly. - - @param Char The character to convert. - - @retval LowerCharacter If the Char is with range L'a' to L'z'. - @retval UnchangedOtherwise. - -**/ -CHAR16 -EFIAPI -InternalCharToUpper ( - IN CHAR16Char - ); - - /** Convert a Unicode character to numerical value. @@ -552,26 +530,6 @@ InternalAsciiIsDecimalDigitCharacter ( ); -/** - Converts a lowercase Ascii character to upper one. - - If Chr is lowercase Ascii character, then converts it to upper one. - - If Value >= 0xA0, then ASSERT(). - If (Value & 0x0F) >= 0x0A, then ASSERT(). - - @param Chr one Ascii character - - @return The uppercase value of Ascii character - -**/ -CHAR8 -EFIAPI -InternalBaseLibAsciiToUpper ( - IN CHAR8 Chr - ); - - /** Check if a ASCII character is a hexadecimal character. -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v3 1/3] MdePkg/BaseLib: Introduce CharToUpper and AsciiToUpper publicly
Introduce two public functions CharToUpper and AsciiToUpper.
They have the same functions as InternalCharToUpper and
InternalBaseLibAsciiToUpper.Considering the internal functions will
be removed,so directly I change their function names to the public ones'.
https://bugzilla.tianocore.org/show_bug.cgi?id=1369
Cc: Leif Lindholm
Cc: Laszlo Ersek
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang
---
MdePkg/Include/Library/BaseLib.h| 40 +
MdePkg/Library/BaseLib/SafeString.c | 8 +++---
MdePkg/Library/BaseLib/String.c | 16 ++--
3 files changed, 52 insertions(+), 12 deletions(-)
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 8cc086983d..b861d82287 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -2720,6 +2720,46 @@ AsciiStrnToUnicodeStrS (
OUT UINTN *DestinationLength
);
+/**
+ Convert a Unicode character to upper case only if
+ it maps to a valid small-case ASCII character.
+
+ This internal function only deal with Unicode character
+ which maps to a valid small-case ASCII character, i.e.
+ L'a' to L'z'. For other Unicode character, the input character
+ is returned directly.
+
+ @param Char The character to convert.
+
+ @retval LowerCharacter If the Char is with range L'a' to L'z'.
+ @retval UnchangedOtherwise.
+
+**/
+CHAR16
+EFIAPI
+CharToUpper (
+ IN CHAR16Char
+ );
+
+/**
+ Converts a lowercase Ascii character to upper one.
+
+ If Chr is lowercase Ascii character, then converts it to upper one.
+
+ If Value >= 0xA0, then ASSERT().
+ If (Value & 0x0F) >= 0x0A, then ASSERT().
+
+ @param Chr one Ascii character
+
+ @return The uppercase value of Ascii character
+
+**/
+CHAR8
+EFIAPI
+AsciiToUpper (
+ IN CHAR8 Chr
+ );
+
/**
Converts an 8-bit value to an 8-bit BCD value.
diff --git a/MdePkg/Library/BaseLib/SafeString.c
b/MdePkg/Library/BaseLib/SafeString.c
index 417497cbc9..17f88b46d8 100644
--- a/MdePkg/Library/BaseLib/SafeString.c
+++ b/MdePkg/Library/BaseLib/SafeString.c
@@ -905,7 +905,7 @@ StrHexToUintnS (
String++;
}
- if (InternalCharToUpper (*String) == L'X') {
+ if (CharToUpper (*String) == L'X') {
if (*(String - 1) != L'0') {
*Data = 0;
return RETURN_SUCCESS;
@@ -1036,7 +1036,7 @@ StrHexToUint64S (
String++;
}
- if (InternalCharToUpper (*String) == L'X') {
+ if (CharToUpper (*String) == L'X') {
if (*(String - 1) != L'0') {
*Data = 0;
return RETURN_SUCCESS;
@@ -2459,7 +2459,7 @@ AsciiStrHexToUintnS (
String++;
}
- if (InternalBaseLibAsciiToUpper (*String) == 'X') {
+ if (AsciiToUpper (*String) == 'X') {
if (*(String - 1) != '0') {
*Data = 0;
return RETURN_SUCCESS;
@@ -2586,7 +2586,7 @@ AsciiStrHexToUint64S (
String++;
}
- if (InternalBaseLibAsciiToUpper (*String) == 'X') {
+ if (AsciiToUpper (*String) == 'X') {
if (*(String - 1) != '0') {
*Data = 0;
return RETURN_SUCCESS;
diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c
index e6df12797d..dba53779c9 100644
--- a/MdePkg/Library/BaseLib/String.c
+++ b/MdePkg/Library/BaseLib/String.c
@@ -552,7 +552,7 @@ InternalIsDecimalDigitCharacter (
**/
CHAR16
EFIAPI
-InternalCharToUpper (
+CharToUpper (
IN CHAR16Char
)
{
@@ -586,7 +586,7 @@ InternalHexCharToUintn (
return Char - L'0';
}
- return (10 + InternalCharToUpper (Char) - L'A');
+ return (10 + CharToUpper (Char) - L'A');
}
/**
@@ -1181,7 +1181,7 @@ AsciiStrCmp (
**/
CHAR8
EFIAPI
-InternalBaseLibAsciiToUpper (
+AsciiToUpper (
IN CHAR8 Chr
)
{
@@ -1211,7 +1211,7 @@ InternalAsciiHexCharToUintn (
return Char - '0';
}
- return (10 + InternalBaseLibAsciiToUpper (Char) - 'A');
+ return (10 + AsciiToUpper (Char) - 'A');
}
@@ -1260,13 +1260,13 @@ AsciiStriCmp (
ASSERT (AsciiStrSize (FirstString));
ASSERT (AsciiStrSize (SecondString));
- UpperFirstString = InternalBaseLibAsciiToUpper (*FirstString);
- UpperSecondString = InternalBaseLibAsciiToUpper (*SecondString);
+ UpperFirstString = AsciiToUpper (*FirstString);
+ UpperSecondString = AsciiToUpper (*SecondString);
while ((*FirstString != '\0') && (*SecondString != '\0') &&
(UpperFirstString == UpperSecondString)) {
FirstString++;
SecondString++;
-UpperFirstString = InternalBaseLibAsciiToUpper (*FirstString);
-UpperSecondString = InternalBaseLibAsciiToUpper (*SecondString);
+UpperFirstString = AsciiToUpper (*FirstString);
+UpperSecondString = AsciiToUpper (*SecondString);
}
return UpperFirstString - UpperSecondString;
--
2.18.0.windows.1
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[edk2] [PATCH v3 0/3] Introduce two public functions and remove internal ones
Introduce public functions CharToUpper and AsciiToUpper. Remove internal functions InternalCharToUpper and InternalBaseLibAsciiToUpper. v2: Update the title and commit message of 1/3. v3: 1.Add a patch to remove AsciiToUpper in EdbSupportString.c. 2.Revert the changes in Basetools. Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Laszlo Ersek Cc: Jian J Wang Cc: Hao Wu Cc: Star Zeng Shenglei Zhang (3): MdePkg/BaseLib: Introduce CharToUpper and AsciiToUpper publicly MdePkg/BaseLib: Remove InternalCharToUpper and InternalBaseLibAsciiToUpper MdeModulePkg/EbcDebugger: Remove an internal function AsciiToUpper .../EbcDxe/EbcDebugger/EdbSupportString.c | 15 --- MdePkg/Include/Library/BaseLib.h | 40 ++ MdePkg/Library/BaseLib/BaseLibInternals.h | 42 --- MdePkg/Library/BaseLib/SafeString.c | 8 ++-- MdePkg/Library/BaseLib/String.c | 16 +++ 5 files changed, 52 insertions(+), 69 deletions(-) -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v3 3/3] MdeModulePkg/EbcDebugger: Remove an internal function AsciiToUpper
AsciiToUpper in EdbSupportString.c is an internal function.
And we will introduce a public function which has the same name
and effect. So we remove its implement. Code in EdbSupportString.c
now consumes the public one.
https://bugzilla.tianocore.org/show_bug.cgi?id=1369
Cc: Jian J Wang
Cc: Hao Wu
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang
---
.../EbcDxe/EbcDebugger/EdbSupportString.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
b/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
index 78a0559079..0eb894ddfb 100644
--- a/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
+++ b/MdeModulePkg/Universal/EbcDxe/EbcDebugger/EdbSupportString.c
@@ -323,21 +323,6 @@ UnicodeToUpper (
return (Chr >= L'a' && Chr <= L'z') ? Chr - (L'a' - L'A') : Chr;
}
-/**
-
- Convert the character to upper case.
-
- @param Chrthe character to be converted.
-
-**/
-STATIC
-CHAR8
-AsciiToUpper (
- IN CHAR8 Chr
- )
-{
- return (Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr;
-}
/**
Compare the Unicode and Ascii string pointed by String to the string pointed
by String2.
--
2.18.0.windows.1
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