(add BaseTools maintainers)
On 23 November 2015 at 17:56, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> R_ARM_REL32 are relative relocations, so we don't need to do anything
> special when performing the ELF to PE/COFF conversion, since our memory
> layout is identical
R_ARM_REL32 are relative relocations, so we don't need to do anything
special when performing the ELF to PE/COFF conversion, since our memory
layout is identical between the two binary formats. So just allow them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard
boot protocol, which QEMU implements as well.)
I would highly appreciate testing on both ARM and AARCH64 platforms, since
some AARCH64 code was changed as well (patch #3)
Ard Biesheuvel (6):
BaseTools/GenFw ARM: allow R_ARM_REL32 relocations
ArmLib/ArmV7Mmu: use 64-bit type for mapping region
of exactly 4 GB in size, which just exceeds
the range of the UINT32 variable we use in FillTranslationTable() to
track our progress while populating the page tables. So promote it
to UINT64 instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.bies
: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/MemnodeParser.S
| 237
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/ArmVirtXen.dsc | 7 +++
ArmVirtPkg/ArmVirtXen.fdf | 21 ++--
2 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/ArmVirtPkg/ArmVirtXen
1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
| 140
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ArmXenRelocatablePlatformLib.inf
| 3 +
2 files changed, 143 inse
-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/PrePi/Arm/ArchPrePi.c| 26 +++
ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 203
ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 6 +-
ArmVirtPkg/PrePi/Scripts/PrePi-P
KVM uses a fixed size of 40 bits for its intermediate physical address
space, so there is no need to support anything beyond that even if the
host hardware does.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by:
(formerly patch #2)
- use an explicit 64-bit type the left shift left hand operand, since the right
hand operand may (and will) exceed 32 even on 32-bit platforms (patch #2,
formerly patch #1)
- add missing space between MIN and (
Ard Biesheuvel (2):
ArmVirtPkg/ArmVirtQemu: limit the (I)PA space
On 23 November 2015 at 17:56, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> By special request, this implements ARM support to the ArmVirtXen
> platform. This is probably still rough around the edges, since I have
> not tested it myself under Xen yet. I did test all t
On 24 November 2015 at 15:47, David Woodhouse wrote:
> On Tue, 2015-11-24 at 14:19 +, Cohen, Eugene wrote:
>>
>> Here's a patch with this changes:
>>
>> ---
>> edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf| 2
>> +-
>>
otated,
> with VECTOR_BASE and VECTOR_END, which provide the necessary alignment
> and symbol exports. The now redundant directives and labels are removed.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Ar
e Contribution Agreement 1.0
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> ArmPkg/Include/Chipset/AArch64Mmu.h| 2 ++
> ArmPkg/Library/ArmLib/AArch
(+ Leif)
On 19 November 2015 at 15:42, Cohen, Eugene wrote:
> Ok, I created a script after all - I went ahead and created a script to add
> AREA directives whenever an exported label is found.
>
> Same question as before: do you want me to submit a patchset with the AREA
>
into similar issues on ThunderX, or
any other hardware whose support PA space is so large. Their platform does not
use ArmVirtPkg/ArmVirtPlatformLib though, so a similar change may be necssary on
the Xen end.
Ard Biesheuvel (2):
ArmVirtPkg/ArmVirtPlatformLib: reduce ID map size to GCD region size
KVM uses a fixed size of the intermediate physical address space of
40 bits, so there is no need to support anything beyond that even if
the host hardware does.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmV
to gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize bits,
since we cannot manipulate mappings above that limit anwyay (because
they are not covered by GCD). This allows the PCD to be set by platforms
whose (I)PA space has a fixed limit.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard
-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
BaseTools/Conf/build_rule.template | 13 +
1 file changed, 13 insertions(+)
diff --git a/BaseTools/Conf/build_rule.template
b/BaseTools/Conf/build_rule.template
index 3637ef47414e..91bcc1828cb5 100644
--- a/BaseTool
and toolchains
Ard Biesheuvel (2):
BaseTools AARCH64: add separate GCC build rule for XIP objects
BaseTools AARCH64: build XIP modules with strict alignment
BaseTools/Conf/build_rule.template | 13 +
BaseTools/Conf/tools_def.template | 9 -
2 files changed, 21 insertions
On 13 January 2016 at 11:18, Laszlo Ersek wrote:
> On 01/12/16 16:24, Shannon Zhao wrote:
>> When booting VM through UEFI, UEFI takes ownership of the RTC hardware.
>> To DTB UEFI could call libfdt api to disable the RTC device node, but to
>> ACPI it couldn't do that.
performing the cache maintenance if the MMU code is not used to begin with,
check that explicitly in the constructor.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
As discussed in the thread dedicated to this s
On 13 June 2016 at 17:45, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Mon, Jun 13, 2016 at 05:26:07PM +0200, Ard Biesheuvel wrote:
>> On some platforms, performing cache maintenance on regions that are backed
>> by NOR flash result in SErrors. Since cache maint
On 15 June 2016 at 17:10, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On 13 June 2016 at 16:26, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
>> On some platforms, performing cache maintenance on regions that are backed
>> by NOR flash result in SErro
On 15 June 2016 at 14:52, wrote:
> From: Evan Lloyd
>
> Updates and bug fixes for the PL011 driver in ArmPlatformPkg.
>
> Because of an interface change, ArmVirtPkg/FdtPL011SerialPortLib is also
> updated.
>
> This patchset is a resubmit in response to
On 21 June 2016 at 17:43, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/21/16 12:30, Ard Biesheuvel wrote:
>> Similar to how OVMF implements this, add a FD definition for the varstore
>> firmware volume and the FTW areas. This can be used by host side tooling
>> to man
[0] fields in the FV header, the Size field of the varstore header,
and the Crc and WriteQueueSize fields of the FTW header. The event log
region is not used by ArmVirtQemu, so it has been omitted.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.bies
by the non-secure firmware.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
This is the EDK2 counterpart of Peter's patch against the Linux kernel
7c9b973061b0 ("irqchip/gic-v3: Configure all interrupts as non-sec
On 22 June 2016 at 16:46, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Tue, Jun 21, 2016 at 12:30:30PM +0200, Ard Biesheuvel wrote:
>> This series refactors some of the NOR flash code in ArmPlatformPkg and
>> ArmVirtPkg so that we can add an empty varstore definition
This module is now identical in functionality to NorFlashDxe, and is no
longer used, so remove it altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.in
and
gEfiVariableGuid in the varstore FV headers, and is an improvement by itself,
since it allows us to get rid of the 'secure boot' flavor of NorFlashDxe.
Ard Biesheuvel (4):
ArmPlatformPkg/NorFlashDxe: accept both non-secure and secure varstore
GUIDs
ArmVirtPkg/ArmVirtQemu: switch secure boot build
Similar to how OVMF implements this, add a FD definition for the varstore
firmware volume and the FTW areas. This can be used by host side tooling
to manipulate a pristine varstore before presenting it to the guest.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard
to the common NorFlashDxe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/ArmVirtQemu.dsc | 4
ArmVirtPkg/ArmVirtQemu.fdf | 4
ArmVirtPkg/ArmVirtQemuKernel.dsc | 4
ArmV
into
a single one, which means we can remove NorFlashAuthenticatedDxe entirely
in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf
Introduce the library class ArmMmuLib, which encapsulates the functionality
to set up and modify page table entries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPkg/ArmPkg.dec | 1 +
ArmPkg/I
Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 768
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 76 ++
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
that
fail to tolerate cache maintenance operations on NOR flash regions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c | 60
ArmPkg/Library/Arm
On 17 June 2016 at 18:30, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/16/16 12:29, Ard Biesheuvel wrote:
>> Switch all users of ArmLib that depend on the MMU routines to the new,
>> separate ArmMmuLib. This needs to occur in one go, since the MMU
>> routines ar
On 17 June 2016 at 12:32, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Thu, Jun 16, 2016 at 12:29:30PM +0200, Ard Biesheuvel wrote:
>> This introduces a special version of ArmMmuLib for PEIMs that takes care
>> only to perform cache maintenance on the live entr
On 21 June 2016 at 17:43, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/21/16 12:30, Ard Biesheuvel wrote:
>> Similar to how OVMF implements this, add a FD definition for the varstore
>> firmware volume and the FTW areas. This can be used by host side tooling
>> to man
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>> Laszlo Ersek
>> Sent: Wednesday, June 22, 2016 11:43 PM
>> To: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> Cc: edk2-devel@lists.01.org <edk2
On 23 June 2016 at 15:25, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/22/16 16:32, Ard Biesheuvel wrote:
>> Reassign all interrupts to non-secure Group-1 if the GIC has its DS
>> (Disable Security) bit set. In this case, it is safe to assume that we
>> own the GIC,
On 23 June 2016 at 15:51, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Thu, Jun 23, 2016 at 03:26:53PM +0200, Ard Biesheuvel wrote:
>> On 23 June 2016 at 15:25, Laszlo Ersek <ler...@redhat.com> wrote:
>> > On 06/22/16 16:32, Ard Biesheuvel wrote:
>> >
On 23 June 2016 at 16:00, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> On 23 June 2016 at 12:57, Laszlo Ersek <ler...@redhat.com> wrote:
>> On 06/23/16 10:14, Ard Biesheuvel wrote:
>>> On 23 June 2016 at 03:43, Gao, Liming <liming@intel.com> wr
On 23 June 2016 at 13:31, Shannon Zhao wrote:
> From: Shannon Zhao
>
> Add ACPI support for Virt Xen ARM and only for aarch64. It gets the
> ACPI tables through Xen ARM multiboot protocol.
>
> Contributed-under: TianoCore Contribution Agreement
On 23 June 2016 at 12:57, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/23/16 10:14, Ard Biesheuvel wrote:
>> On 23 June 2016 at 03:43, Gao, Liming <liming@intel.com> wrote:
>>> Ard:
>>> Could you send the updated FDF file that causes build failure? I
values,
but the defaults used by the new version for ReceiveFifoDepth and
Timeout deviate from the original values. So put them back.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
MdeModulePkg/Universal/SerialDxe/SerialIo
On 15 January 2016 at 18:05, Laszlo Ersek wrote:
> Hi,
>
> snipping context liberally...
>
>> Whilst simple text input seems to work ok, cursor support does not.
>> And we need cursor support for Intel BDS.
>
> (1) I think this is important. See below.
>
>> When
On 15 January 2016 at 17:07, Ryan Harkin <ryan.har...@linaro.org> wrote:
> On 15 January 2016 at 15:42, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
>> SerialDxe was migrated to MdeModulePkg from EmbeddedPkg, and all
>> users of the latter were moved to the former.
won't generate
> the RTC ACPI device at all when using UEFI.
>
> Signed-off-by: Shannon Zhao <shannon.z...@linaro.org>
> ---
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> v2: just totally don't generate the RTC ACPI device when using UEFI
> ---
> hw/arm
On 18 January 2016 at 15:29, Ryan Harkin wrote:
> ARM Ltd Platform support is migrating to use OpenPlatformPkg [1].
>
> Currently, Juno and FVP exist both in EDK2's ArmPlatformPkg and in
> OpenPlatformPkg. And they are starting to diverge, with
> OpenPlatformPkg being the
On 18 January 2016 at 16:28, Ryan Harkin <ryan.har...@linaro.org> wrote:
> On 18 January 2016 at 15:11, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
>> On 18 January 2016 at 16:08, Ryan Harkin <ryan.har...@linaro.org> wrote:
>>> On 18 January 2016 a
On 15 January 2016 at 22:14, Jarlstrom, Laurie
wrote:
> To: EDK II Community
>
> This message is an update on the transition from SourceForge to GitHub for
> EDK II development. The schedule is currently targeting the last week of
> January or the first week of
anoCore Contribution Agreement 1.0
> Signed-off-by: Shannon Zhao <shannon.z...@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Committed as 402dde68aff9
Thanks,
Ard.
> ---
> Changes since v2:
> * add gFdtClientProtocolGuid to the [Depex]
>
On 10 February 2016 at 16:55, Leif Lindholm wrote:
> For whatever reason, every single operation on the PL061 looked for an
> "Initialized" flag, and manually called the initialization function if
> not set. Move this to a single call on protocol installation.
>
I think
On 10 February 2016 at 16:55, Leif Lindholm wrote:
> The PL061 GPIO controller is a bit of an anachronism, and the existing
> driver does nothing to hide this - leading to it being very tricky to
> read.
>
> Rewrite it to document (in comments and code) what is actually
On 9 February 2016 at 20:29, Ryan Harkin wrote:
> On 9 February 2016 at 19:23, Ryan Harkin wrote:
>> This is a follow up from my previous patch [1] to add a PCD for the
>> auto-negotiation timeout and the v2 series that followed it.
>>
>> Review
On 9 February 2016 at 20:23, Ryan Harkin <ryan.har...@linaro.org> wrote:
> When reviewing my LAN9118 driver PCD patch [1], Ard Biesheuvel noted
> that most calls to gBS->Stall() in this driver seem to be used to
> prevent timing issues between the device updating data and
larger value works for Juno R0, R1 and R2.
>
> [1] http://article.gmane.org/gmane.comp.bios.edk2.devel/7341
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ryan Harkin <ryan.har...@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org
On 9 February 2016 at 12:41, Ryan Harkin <ryan.har...@linaro.org> wrote:
> When reviewing my LAN9118 driver PCD patch [1], Ard Biesheuvel noted
> that most calls to gBS->Stall() in this driver seem to be used to
> prevent timing issues between the device updating data and
for the NIC to negotiate was causing a problem.
> He suggested the solution contained in this patch to provide a PCD
> configurable by the platform.
>
> Setting the PCD to a larger value works for Juno R0, R1 and R2.
>
> [1] http://article.gmane.org/gmane.comp.bios.edk2.devel/7341
>
&
On 9 February 2016 at 14:25, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> On 9 February 2016 at 12:41, Ryan Harkin <ryan.har...@linaro.org> wrote:
>> When reviewing my LAN9118 driver PCD patch [1], Ard Biesheuvel noted
>> that most calls to gBS->Stall()
ed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ryan Harkin <ryan.har...@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
.0
> Signed-off-by: Ryan Harkin <ryan.har...@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c | 22 +++---
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git
On 5 February 2016 at 15:05, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> When emulating a full stack of ARM Trusted Firmware, OP-TEE, etc, UEFI will
> not
> be executed from (emulated) NOR flash but loaded in memory at an a priori
> unknown memory addres
Ryan Harkin <ryan.har...@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc | 382 -
> ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf | 263 -
> Arm
On 5 February 2016 at 09:18, Ryan Harkin wrote:
> On 4 February 2016 at 11:40, Ryan Harkin wrote:
>> On 3 February 2016 at 17:42, Leif Lindholm wrote:
>>> Hi Ryan,
>>>
>>> On Wed, Feb 03, 2016 at 05:09:28PM +, Ryan
, this is simply a matter of whitelisting these new relocation types
in the same way.
While we're at it, clean up the code a bit, and add a comment explaining
why these relocations are ignored in WriteRelocations64 ().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
uted-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Eugene Cohen <eug...@hp.com>
One coding style nit below, but I will fix that up when applying
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> .../AArch64/DefaultExceptionHandler.c |
On 12 February 2016 at 11:41, Ryan Harkin <ryan.har...@linaro.org> wrote:
> On 12 February 2016 at 09:25, Ard Biesheuvel <ard.biesheu...@linaro.org>
> wrote:
>> On 10 February 2016 at 16:51, Ryan Harkin <ryan.har...@linaro.org> wrote:
>>> This small seri
Allow the use of a patchable PCD for the initial DT base address recorded in
gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress, so that the module
can be reused by a relocatable version of ArmVirtQemu.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
for the system memory, but uses the QEMU MMU layout.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/Library/{ArmXenRelocatablePlatformLib =>
ArmQemuRelocatablePlatformLib}/AARCH64/RelocatableVir
.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/{ArmVirtQemu.dsc => ArmVirtQemuKernel.dsc} | 50
ArmVirtPkg/{ArmVirtQemu.fdf => ArmVirtQemuKernel.fdf} | 49 +++
2 files changed, 5
address and the contents of the DT
Patch #3 contains the platform DSC and FDF definitions
Ard Biesheuvel (3):
ArmVirtPkg/EarlyFdtPL011: allow patchable PCD for initial DT base
address
ArmVirtPkg: introduce new ArmQemuRelocatablePlatformLib
ArmVirtPkg: implement ArmVirtQemuKernel
On 31 January 2016 at 21:36, Laszlo Ersek <ler...@redhat.com> wrote:
> On 01/30/16 11:25, Ard Biesheuvel wrote:
>> On 30 January 2016 at 04:17, Yao, Jiewen <jiewen@intel.com> wrote:
>>> Thanks for the clarification. I think you are right.
>>>
>&
On 3 February 2016 at 00:40, Jordan Justen wrote:
> On 2016-02-02 09:47:23, Jordan Justen wrote:
>> As mentioned previously, we will attempt to transition to GitHub
>> starting this morning (around 10AM PST, UTC-8). One of the first steps
>> will be to disable
On 30 January 2016 at 04:17, Yao, Jiewen wrote:
> Thanks for the clarification. I think you are right.
>
> I said "This table is used to retire old PropertiesTable", because UEFI2.6
> does not recommend using PropertiesTable to report RT information.
> The future BIOS/OS
On 2 February 2016 at 09:05, Bhupesh Sharma wrote:
> Hi,
>
> I think some of the edk2 shell users might have already noticed this, that the
> Backspace input doesn't work on the UEFI shell (I am using the latest
> edk2/master branch).
>
> On Qemu-AARCH64 2.5 build, I can
dsc file of the package
>> which use SecureBootConfigDxe.Now add it to pass build.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Dandan Bi <dandan...@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> -
that this will inhibit the publishing of any tables that carry only
32-bit addresses, i.e., RSDPv1, RSDTv1 and RSDTv3.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: "Yao, Jiewen" <jiewen@intel.com
On 23 February 2016 at 17:06, Laszlo Ersek wrote:
[supersnip]
> By that I don't mean *another* new PCD, beyond the ACPI version PCD that
> Ard's patch series already contains -- I mean a more generic PCD that
> *replaces* the ACPI version PCD, and controls the allocations
On 24 February 2016 at 11:49, Laszlo Ersek <ler...@redhat.com> wrote:
> On 02/24/16 09:34, Ard Biesheuvel wrote:
>> This implements a UEFI driver model driver for the VirtIO RNG device.
>>
>> Changes since v3:
>> - add patch to add the driver to OvmfPkg builds (#
the sledge hammer approach
>> for now.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Leif Lindholm <leif.lindh...@linaro.org>
>
> Tested-by: Ryan Harkin <ryan.har...@linaro.org>
> Reviewed-by: Ryan Harkin <rya
This implements a UEFI driver model driver for Virtio devices of type
VIRTIO_SUBSYSTEM_ENTROPY_SOURCE, and exposes them via instances of
the EFI_RNG_PROTOCOL protocol, supporting the EFI_RNG_ALGORITHM_RAW
algorithm only.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard
only to set up its rings).
However, the virtio entropy device, to be covered in the upcoming
patches, reports the amount of randomness produced by the host only
through this quantity.
Cc: Jordan Justen <jordan.l.jus...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Sign
This adds the new Virtio-RNG DXE module to the default build of
ArmVirtQemu. Note that QEMU needs to be invoked with the 'device
virtio-rng-pci' option in order for this device to be exposed to
the guest.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
This adds the new Virtio-RNG DXE module to all three builds of
OvmfPkg. Note that QEMU needs to be invoked with the 'device
virtio-rng-pci' option in order for this device to be exposed to
the guest.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
On 23 February 2016 at 19:31, Cohen, Eugene wrote:
>> > + if (ArmReadCurrentEL() == AARCH64_EL2) {
>> > +HcrReg = ArmReadHcr();
>> > +
>> > +// set AMO, IMO, and FMO so all available async exceptions go to EL2
>> > +// (EL3 takes precedence over this and may choose to
On 22 February 2016 at 13:11, Laszlo Ersek <ler...@redhat.com> wrote:
> On 02/22/16 12:45, Ard Biesheuvel wrote:
>> On 22 February 2016 at 11:24, Laszlo Ersek <ler...@redhat.com> wrote:
>>> On 02/22/16 04:35, Ni, Ruiyu wrote:
>>>> Ard,
>>>> So
alf of Laszlo Ersek
>> [ler...@redhat.com]
>> Sent: Friday, February 19, 2016 21:40
>> To: Ard Biesheuvel; edk2-de...@ml01.01.org; Tian, Feng; Zeng, Star;
>> leif.lindh...@linaro.org; graeme.greg...@linaro.org; Fan, Jeff; Yao, Jiewen
>> Cc: Gao, Liming
>> Subject
v1.0b), but this may change in the future,
so let's choose a meaningful value right away.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Laszlo Ersek <ler...@redhat.com>
---
ArmVirtPkg/ArmVirtQemu.dsc | 4
on arm64 anyway.
- drop BdsDxe patch for now, more discussion is needed
- implement review feedback from Star
Ard Biesheuvel (2):
MdeModulePkg: AcpiTableDxe: make 4 GB table allocation limit optional
ArmVirtPkg/ArmVirtQemu: limit ACPI support to v5.0 and higher
ArmVirtPkg/ArmVirtQemu.dsc
On 23 February 2016 at 04:03, Zeng, Star <star.z...@intel.com> wrote:
> Ard,
>
> On 2016/2/19 21:15, Ard Biesheuvel wrote:
>>
>> AARCH64 systems never require compatibility with legacy ACPI OSes, and
>> may not have any 32-bit addressable system RAM. To support
On 23 February 2016 at 08:21, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> (+ Liming)
>
> On 22 February 2016 at 22:59, Cohen, Eugene <eug...@hp.com> wrote:
>> The AArch64 DAIF bits are different for reading (mrs) versus writing (msr).
>> The bitmask defin
On 22 February 2016 at 13:40, Yao, Jiewen wrote:
> I did a search on current MdeModulePkg. I found there are more modules
> allocating Below4G memory.
>
> Besides BDS, we have BootGraphicsResourceTableDxe, BootScriptExecutorDxe,
> FirmwarePerformanceDataTableDxe,
Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
index 0a3471
No ARM support for ACPI is planned under any OS we intend to run under
ArmVirtQemu-ARM, so remove the drivers from the ARM build.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmVirtPkg/ArmVirtQemu.ds
On 22 February 2016 at 13:42, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> On 22 February 2016 at 13:40, Yao, Jiewen <jiewen@intel.com> wrote:
>> I did a search on current MdeModulePkg. I found there are more modules
>> allocating Below4G memory.
in preparation for the
> improvements.
>
For the series:
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Changes since RFC:
> - Rework the initialization code based on feedback from Ard.
> - Bugfix reported by Ard and tested by Haojian.
> - Moved the Linaro Copyright introd
On 25 February 2016 at 17:07, David Woodhouse <dw...@infradead.org> wrote:
> On Tue, 2016-02-23 at 18:35 +0100, Ard Biesheuvel wrote:
>> AARCH64 systems never require compatibility with legacy ACPI OSes, and
>> may not have any 32-bit addressable system RAM. To support ACPI on
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