[edk2] [PATCH 2/2] BaseTools AARCH64: build XIP modules with strict alignment

[Ard Biesheuvel]

GCC for AARCH64 recognizes byte swapping load and store sequences
and may replace them with wider loads or stores combined with rev
instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before
we turn the MMU on.

So build any modules or static libraries that may execute with the MMU
off with -mstrict-align. Other modules don't need this switch, so we
can remove it from the CLANG35/AARCH64 common CC flags.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 BaseTools/Conf/tools_def.template | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 0cc85a6f359d..c42a434165c0 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4324,6 +4324,7 @@ DEFINE GCC_X64_CC_FLAGS= 
DEF(GCC_ALL_CC_FLAGS) -mno-red-zone -Wno-ad
 DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
-minline-int-divide-min-latency
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
 DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables
+DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align
 DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -4398,6 +4399,7 @@ DEFINE GCC47_ARM_ASM_FLAGS   = 
DEF(GCC46_ARM_ASM_FLAGS)
 DEFINE GCC47_AARCH64_ASM_FLAGS   = $(ARCHASM_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_ASM_FLAGS) -mlittle-endian
 DEFINE GCC47_ARM_CC_FLAGS= DEF(GCC46_ARM_CC_FLAGS) 
-mno-unaligned-access
 DEFINE GCC47_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC44_ALL_CC_FLAGS) -mcmodel=large DEF(GCC_AARCH64_CC_FLAGS)
+DEFINE GCC47_AARCH64_CC_XIPFLAGS = DEF(GCC_AARCH64_CC_XIPFLAGS)
 DEFINE GCC47_ARM_DLINK_FLAGS = DEF(GCC46_ARM_DLINK_FLAGS)
 DEFINE GCC47_ARM_DLINK2_FLAGS= DEF(GCC46_ARM_DLINK2_FLAGS)
 DEFINE GCC47_AARCH64_DLINK_FLAGS = DEF(GCC_AARCH64_DLINK_FLAGS)
@@ -4418,6 +4420,7 @@ DEFINE GCC48_ARM_ASM_FLAGS   = 
DEF(GCC47_ARM_ASM_FLAGS)
 DEFINE GCC48_AARCH64_ASM_FLAGS   = DEF(GCC47_AARCH64_ASM_FLAGS)
 DEFINE GCC48_ARM_CC_FLAGS= DEF(GCC47_ARM_CC_FLAGS)
 DEFINE GCC48_AARCH64_CC_FLAGS= DEF(GCC47_AARCH64_CC_FLAGS)
+DEFINE GCC48_AARCH64_CC_XIPFLAGS = DEF(GCC47_AARCH64_CC_XIPFLAGS)
 DEFINE GCC48_ARM_DLINK_FLAGS = DEF(GCC47_ARM_DLINK_FLAGS)
 DEFINE GCC48_ARM_DLINK2_FLAGS= DEF(GCC47_ARM_DLINK2_FLAGS)
 DEFINE GCC48_AARCH64_DLINK_FLAGS = DEF(GCC47_AARCH64_DLINK_FLAGS)
@@ -4438,6 +4441,7 @@ DEFINE GCC49_ARM_ASM_FLAGS   = 
DEF(GCC48_ARM_ASM_FLAGS)
 DEFINE GCC49_AARCH64_ASM_FLAGS   = DEF(GCC48_AARCH64_ASM_FLAGS)
 DEFINE GCC49_ARM_CC_FLAGS= DEF(GCC48_ARM_CC_FLAGS)
 DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny DEF(GCC_AARCH64_CC_FLAGS)
+DEFINE GCC49_AARCH64_CC_XIPFLAGS = DEF(GCC48_AARCH64_CC_XIPFLAGS)
 DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
 DEFINE GCC49_ARM_DLINK2_FLAGS= DEF(GCC48_ARM_DLINK2_FLAGS)
 DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS)
@@ -4897,6 +4901,7 @@ RELEASE_GCC47_ARM_CC_FLAGS   = 
DEF(GCC47_ARM_CC_FLAGS) -Wno-unused-but-set-v
 *_GCC47_AARCH64_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_PP_FLAGS)
 *_GCC47_AARCH64_RC_FLAGS = DEF(GCC_AARCH64_RC_FLAGS)
 *_GCC47_AARCH64_VFRPP_FLAGS  = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_VFRPP_FLAGS)
+*_GCC47_AARCH64_CC_XIPFLAGS  = DEF(GCC47_AARCH64_CC_XIPFLAGS)
 
   DEBUG_GCC47_AARCH64_CC_FLAGS   = DEF(GCC47_AARCH64_CC_FLAGS) -O0
 RELEASE_GCC47_AARCH64_CC_FLAGS   = DEF(GCC47_AARCH64_CC_FLAGS) 
-Wno-unused-but-set-variable
@@ -5024,6 +5029,7 @@ RELEASE_GCC48_ARM_CC_FLAGS   = 
DEF(GCC48_ARM_CC_FLAGS) -Wno-unused-but-set-v
 *_GCC48_AARCH64_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_PP_FLAGS)
 *_GCC48_AARCH64_RC_FLAGS = DEF(GCC_AARCH64_RC_FLAGS)
 *_GCC48_AARCH64_VFRPP_FLAGS  = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_VFRPP_FLAGS)
+*_GCC48_AARCH64_CC_XIPFLAGS  = DEF(GCC48_AARCH64_CC_XIPFLAGS)
 
   DEBUG_GCC48_AARCH64_CC_FLAGS   = DEF(GCC48_AARCH64_CC_FLAGS) -O0
 RELEASE_GCC48_AARCH64_CC_FLAGS   = DEF(GCC48_AARCH64_CC_FLAGS) 
-Wno-unused-but-set-variable
@@ -5151,6 +5157,7 @@ RELEASE_GCC49_ARM_CC_FLAGS   = 
DEF(GCC49_ARM_CC_FLAGS

[edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with strict alignment

[Ard Biesheuvel]

On AARCH64, before we turn on the MMU, unaligned accesses are not allowed.
Since the idiom recognition employed by GCC may turn allowable sequences
into sequences that result in such unaligned accesses (i.e., a sequence of
byte wide loads in reverse order may be turned into a wider load and a rev
instruction of the compiler thinks unaligned accesses are allowed), we have
to make sure that any code that may execute before the MMU is enabled is
built with -mstrict-align.

Since this aligns with the notion of XIP we have in EDK2, let's add a build
rule that allows XIP specific CC option overrides to be set, and use it to
set the -mstrict-align CC flag for BASE, SEC, PEI_CORE and PEIM modules.

(XIPFLAGS has been suggest by Andrew Fish a couple of months ago, when a
similar issue came up)

Ard Biesheuvel (2):
  BaseTools: add separate build rule for modules that may execute in
place
  BaseTools AARCH64: build XIP modules with strict alignment

 BaseTools/Conf/build_rule.template | 26 
 BaseTools/Conf/tools_def.template  |  9 ++-
 2 files changed, 34 insertions(+), 1 deletion(-)

-- 
2.5.0

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Re: [edk2] [PATCH v2 0/5] AARCH64 code model and toolchain updates

[Ard Biesheuvel]

On 31 December 2015 at 13:57, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> This is a followup to the patch 'BaseTools AARCH64: add -mstrict-align to
> all AARCH64 GCC flavors' that I sent out on the 23rd. As it turns out, using
> strict alignment results in a code size increase which breaks the build for
> the DEBUG shell using the tiny code model we use for GCC49 and up.
>
> I have reproduced some patches here that I have already sent out separately
> (#5) or as part of another series (#1, #2) but I included them again since
> they need to be merged in order to prevent breaking bisect due to build
> errors.
>
> Changes since v1:
> - Dropped the patches that rely on function alignment to sort the input 
> objects
>   in a way that results in the tiny model objects to end up in close proximity
>   of each other. This is unmaintainable hack, and since the issue it solves 
> only
>   affects the DEBUG builds, we can simply switch to the small code model for
>   everything and not care about the code size increase.
> - Added some R-b's from Liming and Leif.
>
> Patches #1 and #2 set the CLANG35 target to the GNU flavor of the respective
> architectures, and adds the target to the preprocessor invocations as well.
>
> Patch #3 changes the default code model for all DEBUG_GCC49 generated code
> to the small model, and updates the minimal alignment accordingly. This allows
> us to get rid of module or module type specific overrides, which are difficult
> to maintain. This results in a slight size increase, but code size is not such
> a big concern for DEBUG builds anyway. Below are the compressed/uncompressed
> sizes of ArmVirtQemu.dsc built with the various code models (built without
> support for secure boot). Note that this includes the -mstrict-align switch
> added in patch #5.
>
>  |  tiny  |  small |  large | small / best  |
> -++++---+
>DEBUG | does not build |   1376k/7958k  |   1297k/7360k  |   +6%/+8% |
> -++++---+
>  RELEASE |772k/3897k  |904k/4636k  |791k/4321k  |  +17%/+19%|
> -++++---+
>
> Patch #4 removes the build options for AARCH64 from ShellPkg. They need to be
> overridden anyway or they will only affect the core Shell binary and not all 
> of
> the Shell component libraries that are merged with the core binary at build 
> time.
> Also, we only need this override for GCC49, since GCC 48 and earlier use the
> large code model, and CLANG35 uses the small code model.
>
> Patch #5 moves the -mstrict-align compiler option to the common AARCH64/GCC
> CFLAGS definition so that it applies to all GCC versions in addition to 
> CLANG35.
> This addresses an issue spotted by the Ubuntu/Debian folks (and which they
> kindly never reported upstream, afaict) here:
> https://bugs.launchpad.net/ubuntu/+source/edk2/+bug/1489560
>
> Ard Biesheuvel (5):
>   BaseTools CLANG35: use GNU target triplets explicitly
>   BaseTools CLANG35: use -target in PP flags as well
>   BaseTools AARCH64: move DEBUG GCC49 to the small code model
>   ShellPkg AARCH64: remove DEBUG BuildOptions override
>   BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors
>

Hello all,

I have committed patches #1 and #2 of this series as SVN r19583 and r19584.

For the remaining ones, I will follow up with an alternate approach to
implement the strict alignment, using build rules.

-- 
Ard.
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Re: [edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with strict alignment

[Ard Biesheuvel]

On 8 January 2016 at 07:13, Gao, Liming <liming@intel.com> wrote:
> Ard:
>   Could we add this option in AARCH64_CC_FLAGS if it has no impact to DXE 
> driver? If yes, you only need to change tools_def.template, no change is 
> required to build_rule.template.
>

It does have impact. It results in a 2% increase in the compressed
footprint of the firmware image. That is exactly why I needed to make
these changes as I did.

Thanks,
Ard.


> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard 
> Biesheuvel
> Sent: Monday, January 04, 2016 5:53 PM
> To: edk2-devel@lists.01.org; Gao, Liming; leif.lindh...@linaro.org; 
> af...@apple.com; Zhu, Yonghong
> Cc: Ard Biesheuvel
> Subject: [edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with strict 
> alignment
>
> On AARCH64, before we turn on the MMU, unaligned accesses are not allowed.
> Since the idiom recognition employed by GCC may turn allowable sequences into 
> sequences that result in such unaligned accesses (i.e., a sequence of byte 
> wide loads in reverse order may be turned into a wider load and a rev 
> instruction of the compiler thinks unaligned accesses are allowed), we have 
> to make sure that any code that may execute before the MMU is enabled is 
> built with -mstrict-align.
>
> Since this aligns with the notion of XIP we have in EDK2, let's add a build 
> rule that allows XIP specific CC option overrides to be set, and use it to 
> set the -mstrict-align CC flag for BASE, SEC, PEI_CORE and PEIM modules.
>
> (XIPFLAGS has been suggest by Andrew Fish a couple of months ago, when a 
> similar issue came up)
>
> Ard Biesheuvel (2):
>   BaseTools: add separate build rule for modules that may execute in
> place
>   BaseTools AARCH64: build XIP modules with strict alignment
>
>  BaseTools/Conf/build_rule.template | 26   
> BaseTools/Conf/tools_def.template  |  9 ++-
>  2 files changed, 34 insertions(+), 1 deletion(-)
>
> --
> 2.5.0
>
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Re: [edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with strict alignment

[Ard Biesheuvel]

On 8 January 2016 at 08:33, Gao, Liming <liming@intel.com> wrote:
> Ard:
>   OK. If only for AARCH64, how about add the specific Build Rule for it?
>
> +[C-Code-File.BASE,C-Code-File.SEC,C-Code-File.PEI_CORE,C-Code-File.PEIM]
> ==>
> +[C-Code-File.BASE.AARCH64,C-Code-File.SEC.AARCH64,C-Code-File.PEI_CORE.AARCH64,C-Code-File.PEIM.AARCH64]
>

Yes, that is also fine.

> -----Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Friday, January 08, 2016 3:14 PM
> To: Gao, Liming
> Cc: edk2-devel@lists.01.org; leif.lindh...@linaro.org; af...@apple.com; Zhu, 
> Yonghong
> Subject: Re: [edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with 
> strict alignment
>
> On 8 January 2016 at 07:13, Gao, Liming <liming@intel.com> wrote:
>> Ard:
>>   Could we add this option in AARCH64_CC_FLAGS if it has no impact to DXE 
>> driver? If yes, you only need to change tools_def.template, no change is 
>> required to build_rule.template.
>>
>
> It does have impact. It results in a 2% increase in the compressed footprint 
> of the firmware image. That is exactly why I needed to make these changes as 
> I did.
>
> Thanks,
> Ard.
>
>
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>> Ard Biesheuvel
>> Sent: Monday, January 04, 2016 5:53 PM
>> To: edk2-devel@lists.01.org; Gao, Liming; leif.lindh...@linaro.org;
>> af...@apple.com; Zhu, Yonghong
>> Cc: Ard Biesheuvel
>> Subject: [edk2] [PATCH 0/2] BaseTools AARCH64: build XIP modules with
>> strict alignment
>>
>> On AARCH64, before we turn on the MMU, unaligned accesses are not allowed.
>> Since the idiom recognition employed by GCC may turn allowable sequences 
>> into sequences that result in such unaligned accesses (i.e., a sequence of 
>> byte wide loads in reverse order may be turned into a wider load and a rev 
>> instruction of the compiler thinks unaligned accesses are allowed), we have 
>> to make sure that any code that may execute before the MMU is enabled is 
>> built with -mstrict-align.
>>
>> Since this aligns with the notion of XIP we have in EDK2, let's add a build 
>> rule that allows XIP specific CC option overrides to be set, and use it to 
>> set the -mstrict-align CC flag for BASE, SEC, PEI_CORE and PEIM modules.
>>
>> (XIPFLAGS has been suggest by Andrew Fish a couple of months ago, when
>> a similar issue came up)
>>
>> Ard Biesheuvel (2):
>>   BaseTools: add separate build rule for modules that may execute in
>> place
>>   BaseTools AARCH64: build XIP modules with strict alignment
>>
>>  BaseTools/Conf/build_rule.template | 26 
>> BaseTools/Conf/tools_def.template  |  9 ++-
>>  2 files changed, 34 insertions(+), 1 deletion(-)
>>
>> --
>> 2.5.0
>>
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Re: [edk2] [PATCH 1/8] MdePkg/BaseLib: do not rely on undefined behavior in arithmetic shift

[Ard Biesheuvel]

On 18 December 2015 at 04:05, Gao, Liming <liming@intel.com> wrote:
> Reviewed-by: Liming Gao <liming@intel.com>
>

Thanks. Committed as SVN r19580

> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Thursday, December 17, 2015 6:01 PM
> To: edk2-devel@lists.01.org; Gao, Liming
> Cc: Ard Biesheuvel
> Subject: [PATCH 1/8] MdePkg/BaseLib: do not rely on undefined behavior in 
> arithmetic shift
>
> The runtime test whether the compiler supports arithmetic shift of negative 
> signed numbers currently relies on undefined behavior in C, which means that 
> all bets are off regarding whether the condition that follows passes or 
> fails, regardless of whether the compiler in fact supports arithmetic shift 
> or not.
>
> Relevant quote from ISO C99 (6.5.7/4)
>
>   The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits
>   are filled with zeros. If E1 has an unsigned type, the value of the result
>   is E1 × 2^E2, reduced modulo one more than the maximum value representable
>   in the result type. If E1 has a signed type and nonnegative value, and
>   E1 × 2^E2 is representable in the result type, then that is the resulting
>   value; otherwise, the behavior is undefined.
>
> For historic purposes, let's keep the test in place (although it is doubtful 
> we actually need it) but rewrite it in a way that prevents compilers from 
> this century from doing whacky things with it.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
>  MdePkg/Library/BaseLib/Math64.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MdePkg/Library/BaseLib/Math64.c 
> b/MdePkg/Library/BaseLib/Math64.c index 83d76847213e..9624cf90029f 100644
> --- a/MdePkg/Library/BaseLib/Math64.c
> +++ b/MdePkg/Library/BaseLib/Math64.c
> @@ -86,7 +86,7 @@ InternalMathARShiftU64 (
>//
>// Test if this compiler supports arithmetic shift
>//
> -  TestValue = (((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1));
> +  TestValue = (INTN)((INT64)(1ULL << 63) >> 63);
>if (TestValue == -1) {
>  //
>  // Arithmetic shift is supported
> --
> 2.5.0
>
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Re: [edk2] [PATCH 3/6] BaseTools AARCH64: reduce tiny model function alignment

[Ard Biesheuvel]

On 27 December 2015 at 21:34, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> On 27 December 2015 at 20:14, Leif Lindholm <leif.lindh...@linaro.org> wrote:
>> On Sun, Dec 27, 2015 at 08:02:34PM +0100, Ard Biesheuvel wrote:
>>> On 27 December 2015 at 18:58, Leif Lindholm <leif.lindh...@linaro.org> 
>>> wrote:
>>> > On Thu, Dec 24, 2015 at 02:03:16PM +0100, Ard Biesheuvel wrote:
>>> >> The tiny code model for AARCH64 is the most efficient model, since its
>>> >> symbol references are relative via a single 32-bit ADR instruction. This
>>> >> gives us a range of only +/- 1 MB, but this is sufficient for the vast
>>> >> majority of the modules that make up a typical EDK2 firmware. Since the
>>> >> reference is relative, it does not result in a fixup entry in the PE/COFF
>>> >> relocation table. Unlike the small code model, which uses ADRP 
>>> >> instructions,
>>> >> the tiny model does not impose section alignment requirements.
>>> >>
>>> >> However, in some cases, (e.g., the full Shell binary built in DEBUG mode)
>>> >> the resulting binary exceeds 1 MB, which may result in build errors if
>>> >> code at one end of the image references a symbol at the other end.
>>> >>
>>> >> Since the tiny and small code models can coexist in a single binary, we
>>> >> can work around this problem by making sure that tiny model .text and
>>> >> .data sections are emitted in close proximity to each other, by reducing
>>> >> the function alignment for tiny model code (which by itself should also 
>>> >> be
>>> >> an improvement in terms of code size), and sorting the linker input by
>>> >> alignment.
>>> >
[...]
>>> > My GCC manpage claims that
>>> > "-Os disables the following optimization flags: -falign-functions ..."
>>> > and -Os is set in GCC_ALL_CC_FLAGS, and as far as I can see not
>>> > overridden for AARCH64, except for DEBUG builds.
>>> >
>>>
>>> OK, that means we will need to build the RELEASE Shell components with
>>> -O2 rather than -Os if we ever hit the same issue for RELEASE builds.
>>> Since those modules are not the ones where we are likely to care
>>> deeply about code size, this is not a showstopper I think
>>
>> Could we move the -falign-functions=4 to DEBUG_GCCnn_AARCH64_CC_FLAGS
>> instead then, next to the -O0? I'd prefer keeeping dead parameters off
>> the command line where possible.
>>
>> Of course, could make sense to change the DEBUG_GCCnn_AARCH64_CC_FLAGS
>> to include a common DEBUG_GCC_AARCH64_CC_FLAGS variable where these
>> are set instead.
>>
>
> Well, since this applies to GCC49 DEBUG only, let's add it only there
> instead. GCC49 currently means '4.9 or later', and I hope we will not
> have a need to introduce GCC5 etc, and if that does happen, let's
> worry about it then.
>

I double checked this, and it turns out that -Os implies
-falign-functions=4, so while it does disable it usually, it does not
in this particular case.

I will still move it to the DEBUG flags, though, since that is the
only place we need it.
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[edk2] [PATCH v2 2/5] BaseTools CLANG35: use -target in PP flags as well

[Ard Biesheuvel]

The Clang preprocessor may rely on builtin defines that are target
dependent, so we should add the -target argument also when invoking
the preprocessor directly.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Liming Gao <liming@intel.com>
---
 BaseTools/Conf/tools_def.template | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 8d3f20999303..0cc85a6f359d 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -5169,9 +5169,7 @@ RELEASE_GCC49_AARCH64_CC_FLAGS   = 
DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-s
 *_CLANG35_*_ASL_PATH = DEF(UNIX_IASL_BIN)
 
 *_CLANG35_*_PP_FLAGS = DEF(GCC_PP_FLAGS)
-*_CLANG35_*_ASLPP_FLAGS  = DEF(GCC_ASLPP_FLAGS)
 *_CLANG35_*_ASLCC_FLAGS  = DEF(GCC_ASLCC_FLAGS)
-*_CLANG35_*_VFRPP_FLAGS  = DEF(GCC_VFRPP_FLAGS)
 *_CLANG35_*_APP_FLAGS=
 *_CLANG35_*_ASL_FLAGS= DEF(IASL_FLAGS)
 *_CLANG35_*_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
@@ -5204,9 +5202,10 @@ DEFINE CLANG35_AARCH64_CC_FLAGS  = 
DEF(GCC_AARCH64_CC_FLAGS) DEF(CLANG35_AARCH64
 *_CLANG35_ARM_DLINK_FLAGS= DEF(GCC_ARM_DLINK_FLAGS)
 *_CLANG35_ARM_DLINK2_FLAGS   = DEF(GCC_DLINK2_FLAGS_COMMON) 
--defsym=PECOFF_HEADER_SIZE=0x220
 *_CLANG35_ARM_PLATFORM_FLAGS =
-*_CLANG35_ARM_PP_FLAGS   = DEF(GCC_PP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_ARM_PP_FLAGS   = DEF(GCC_PP_FLAGS) DEF(CLANG35_ARM_TARGET) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
 *_CLANG35_ARM_RC_FLAGS   = DEF(GCC_ARM_RC_FLAGS)
-*_CLANG35_ARM_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_ARM_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) 
DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
+*_CLANG35_ARM_ASLPP_FLAGS= DEF(GCC_ASLPP_FLAGS) DEF(CLANG35_ARM_TARGET)
 
   DEBUG_CLANG35_ARM_CC_FLAGS = DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS) -O0
 RELEASE_CLANG35_ARM_CC_FLAGS = DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS) -Oz
@@ -5225,9 +5224,10 @@ RELEASE_CLANG35_ARM_CC_FLAGS = 
DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) $(P
 *_CLANG35_AARCH64_DLINK_FLAGS= DEF(GCC_AARCH64_DLINK_FLAGS) -z 
common-page-size=0x1000
 *_CLANG35_AARCH64_DLINK2_FLAGS   = DEF(GCC_DLINK2_FLAGS_COMMON) 
--defsym=PECOFF_HEADER_SIZE=0x228
 *_CLANG35_AARCH64_PLATFORM_FLAGS =
-*_CLANG35_AARCH64_PP_FLAGS   = DEF(GCC_PP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_PP_FLAGS   = DEF(GCC_PP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
 *_CLANG35_AARCH64_RC_FLAGS   = DEF(GCC_AARCH64_RC_FLAGS)
-*_CLANG35_AARCH64_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_ASLPP_FLAGS= DEF(GCC_ASLPP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET)
 
   DEBUG_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -O0
 RELEASE_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -Oz
-- 
2.5.0

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[edk2] [PATCH v2 5/5] BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

[Ard Biesheuvel]

GCC for AARCH64 recognizes byte swapping load and store sequences
and may replace them with wider loads or stores combined with rev
instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before
we turn the MMU on.

So move the -mstrict-align compiler switch to the shared define for
all AARCH64 GCC versions.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Liming Gao <liming@intel.com>
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
---
 BaseTools/Conf/tools_def.template | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 096f00d48e64..82fae766e605 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4323,7 +4323,7 @@ DEFINE GCC_IA32_CC_FLAGS   = 
DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double -
 DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
-Wno-address -mno-stack-arg-probe
 DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
-minline-int-divide-min-latency
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
-DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables
+DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables -mstrict-align
 DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -5188,7 +5188,7 @@ DEFINE CLANG35_AARCH64_TARGET= -target 
aarch64-none-linux-gnu
 
 DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
-Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
-Wno-empty-body
 DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
DEF(CLANG35_WARNING_OVERRIDES)
-DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
DEF(CLANG35_WARNING_OVERRIDES)
+DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small DEF(CLANG35_WARNING_OVERRIDES)
 
 ##
 # CLANG35 ARM definitions
-- 
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[edk2] [PATCH v2 0/5] AARCH64 code model and toolchain updates

[Ard Biesheuvel]

This is a followup to the patch 'BaseTools AARCH64: add -mstrict-align to
all AARCH64 GCC flavors' that I sent out on the 23rd. As it turns out, using
strict alignment results in a code size increase which breaks the build for
the DEBUG shell using the tiny code model we use for GCC49 and up.

I have reproduced some patches here that I have already sent out separately
(#5) or as part of another series (#1, #2) but I included them again since
they need to be merged in order to prevent breaking bisect due to build
errors.

Changes since v1:
- Dropped the patches that rely on function alignment to sort the input objects
  in a way that results in the tiny model objects to end up in close proximity
  of each other. This is unmaintainable hack, and since the issue it solves only
  affects the DEBUG builds, we can simply switch to the small code model for
  everything and not care about the code size increase.
- Added some R-b's from Liming and Leif.

Patches #1 and #2 set the CLANG35 target to the GNU flavor of the respective
architectures, and adds the target to the preprocessor invocations as well.

Patch #3 changes the default code model for all DEBUG_GCC49 generated code
to the small model, and updates the minimal alignment accordingly. This allows
us to get rid of module or module type specific overrides, which are difficult
to maintain. This results in a slight size increase, but code size is not such
a big concern for DEBUG builds anyway. Below are the compressed/uncompressed
sizes of ArmVirtQemu.dsc built with the various code models (built without
support for secure boot). Note that this includes the -mstrict-align switch
added in patch #5.

 |  tiny  |  small |  large | small / best  |
-++++---+
   DEBUG | does not build |   1376k/7958k  |   1297k/7360k  |   +6%/+8% |
-++++---+
 RELEASE |772k/3897k  |904k/4636k  |791k/4321k  |  +17%/+19%|
-++++---+

Patch #4 removes the build options for AARCH64 from ShellPkg. They need to be
overridden anyway or they will only affect the core Shell binary and not all of
the Shell component libraries that are merged with the core binary at build 
time.
Also, we only need this override for GCC49, since GCC 48 and earlier use the
large code model, and CLANG35 uses the small code model.

Patch #5 moves the -mstrict-align compiler option to the common AARCH64/GCC
CFLAGS definition so that it applies to all GCC versions in addition to CLANG35.
This addresses an issue spotted by the Ubuntu/Debian folks (and which they
kindly never reported upstream, afaict) here:
https://bugs.launchpad.net/ubuntu/+source/edk2/+bug/1489560

Ard Biesheuvel (5):
  BaseTools CLANG35: use GNU target triplets explicitly
  BaseTools CLANG35: use -target in PP flags as well
  BaseTools AARCH64: move DEBUG GCC49 to the small code model
  ShellPkg AARCH64: remove DEBUG BuildOptions override
  BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

 BaseTools/Conf/tools_def.template| 35 +++-
 ShellPkg/Application/Shell/Shell.inf |  7 
 2 files changed, 20 insertions(+), 22 deletions(-)

-- 
2.5.0

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[edk2] [PATCH v2 3/5] BaseTools AARCH64: move DEBUG GCC49 to the small code model

[Ard Biesheuvel]

When building AARCH64 platforms that include a Shell binary build from
source, we run into trouble when using the tiny code model for DEBUG
builds. The reason is that the Shell binary built in DEBUG mode exceeds
the 1 MB range of the ADR instruction, so anything that gets pulled into
the final link of the Shell binary either needs to be built with the small
or large model, or needs to be sorted in some way to put the ADR references
close to their targets.

Since code size is not a big concern for DEBUG builds anyway, let's move
to the small code model for all modules when using DEBUG GCC49. This way,
there is no need for workarounds that are specific to UEFI_APPLICATION
modules in general, or the Shell application in particular.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 BaseTools/Conf/tools_def.template | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 0cc85a6f359d..096f00d48e64 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4437,7 +4437,7 @@ DEFINE GCC49_ASM_FLAGS   = 
DEF(GCC48_ASM_FLAGS)
 DEFINE GCC49_ARM_ASM_FLAGS   = DEF(GCC48_ARM_ASM_FLAGS)
 DEFINE GCC49_AARCH64_ASM_FLAGS   = DEF(GCC48_AARCH64_ASM_FLAGS)
 DEFINE GCC49_ARM_CC_FLAGS= DEF(GCC48_ARM_CC_FLAGS)
-DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny DEF(GCC_AARCH64_CC_FLAGS)
+DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC44_ALL_CC_FLAGS) DEF(GCC_AARCH64_CC_FLAGS)
 DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
 DEFINE GCC49_ARM_DLINK2_FLAGS= DEF(GCC48_ARM_DLINK2_FLAGS)
 DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS)
@@ -5145,15 +5145,17 @@ RELEASE_GCC49_ARM_CC_FLAGS   = 
DEF(GCC49_ARM_CC_FLAGS) -Wno-unused-but-set-v
 *_GCC49_AARCH64_ASLCC_FLAGS  = DEF(GCC_ASLCC_FLAGS)
 *_GCC49_AARCH64_ASLDLINK_FLAGS   = DEF(GCC49_AARCH64_ASLDLINK_FLAGS)
 *_GCC49_AARCH64_ASM_FLAGS= DEF(GCC49_AARCH64_ASM_FLAGS)
-*_GCC49_AARCH64_DLINK_FLAGS  = DEF(GCC49_AARCH64_DLINK_FLAGS)
 *_GCC49_AARCH64_DLINK2_FLAGS = DEF(GCC49_AARCH64_DLINK2_FLAGS)
 *_GCC49_AARCH64_PLATFORM_FLAGS   =
 *_GCC49_AARCH64_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_PP_FLAGS)
 *_GCC49_AARCH64_RC_FLAGS = DEF(GCC_AARCH64_RC_FLAGS)
 *_GCC49_AARCH64_VFRPP_FLAGS  = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_VFRPP_FLAGS)
 
-  DEBUG_GCC49_AARCH64_CC_FLAGS   = DEF(GCC49_AARCH64_CC_FLAGS) -O0
-RELEASE_GCC49_AARCH64_CC_FLAGS   = DEF(GCC49_AARCH64_CC_FLAGS) 
-Wno-unused-but-set-variable
+  DEBUG_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -O0 
-mcmodel=small
+  DEBUG_GCC49_AARCH64_DLINK_FLAGS  = DEF(GCC49_AARCH64_DLINK_FLAGS) -z 
common-page-size=0x1000
+
+RELEASE_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) 
-Wno-unused-but-set-variable -mcmodel=tiny
+RELEASE_GCC49_AARCH64_DLINK_FLAGS  = DEF(GCC49_AARCH64_DLINK_FLAGS)
 
 

 #
-- 
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[edk2] [PATCH v2 4/5] ShellPkg AARCH64: remove DEBUG BuildOptions override

[Ard Biesheuvel]

The BuildOptions for AARCH64 in Application/Shell/Shell.inf only affect
the core Shell binary, and not the Shell component libraries which are
merged into the final Shell binary via NULL library class resolution.

This means we need to override the UEFI_APPLICATION build options in
the platform .DSC anyway, there is no point in setting these options
here as well. So remove them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Liming Gao <liming@intel.com>
---
 ShellPkg/Application/Shell/Shell.inf | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/ShellPkg/Application/Shell/Shell.inf 
b/ShellPkg/Application/Shell/Shell.inf
index 253bfdbb224e..131200cb6a23 100644
--- a/ShellPkg/Application/Shell/Shell.inf
+++ b/ShellPkg/Application/Shell/Shell.inf
@@ -108,10 +108,3 @@ [Pcd]
   gEfiShellPkgTokenSpaceGuid.PcdShellForceConsole   ## CONSUMES
   gEfiShellPkgTokenSpaceGuid.PcdShellSupplier   ## CONSUMES
   gEfiShellPkgTokenSpaceGuid.PcdShellMaxHistoryCommandCount ## CONSUMES
-
-[BuildOptions.AARCH64]
-  # The tiny code model used by AARCH64 only supports binaries of up to 1 MB in
-  # size. Since the Shell application exceeds that when built in DEBUG mode,
-  # make sure we build it using the small code model instead.
-  GCC:DEBUG_*_*_CC_FLAGS = -mcmodel=small
-  GCC:DEBUG_*_*_DLINK_FLAGS = -z common-page-size=0x1000
-- 
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Re: [edk2] [PATCH v2 5/5] BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

[Ard Biesheuvel]

On 31 December 2015 at 13:57, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> GCC for AARCH64 recognizes byte swapping load and store sequences
> and may replace them with wider loads or stores combined with rev
> instructions. In some cases (i.e., with GCC version 5 and later)
> this may result in unaligned accesses, which are not allowed before
> we turn the MMU on.
>
> So move the -mstrict-align compiler switch to the shared define for
> all AARCH64 GCC versions.
>

Unfortunately, it turns out that the code size increase is
non-negligible (about 2% for the tiny model release build of
ArmVirtQemu, as an example), and may have a performance impact as
well.

Instead, we would like to add something like

[BuildOptions.common.EDKII.BASE, BuildOptions.common.EDKII.SEC,
BuildOptions.common.EDKII.PEI_CORE, BuildOptions.common.EDKII.PEIM]
  GCC:*_*_AARCH64_CC_FLAGS = -mstrict-align

so that only code that may execute with the MMU off gets the
-mstrict-align treatment. However, it would be *much* more useful if
we could add this to tools_def.txt as a global module type specific
override rather than something each platform needs to define in its
.DSC.

@Liming, Yonghong: have you ever considered adding a feature like this
to BaseTools? Could you comment on the feasibility, i.e., would it be
a huge amount of work to implement this?

Thanks,
Ard.



> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Reviewed-by: Liming Gao <liming@intel.com>
> Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
> ---
>  BaseTools/Conf/tools_def.template | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/BaseTools/Conf/tools_def.template 
> b/BaseTools/Conf/tools_def.template
> index 096f00d48e64..82fae766e605 100644
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -4323,7 +4323,7 @@ DEFINE GCC_IA32_CC_FLAGS   = 
> DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double -
>  DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
> -Wno-address -mno-stack-arg-probe
>  DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
> -minline-int-divide-min-latency
>  DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
> -mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
> -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
> -DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
> -fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
> -fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
> -fno-asynchronous-unwind-tables
> +DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
> -fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
> -fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
> -fno-asynchronous-unwind-tables -mstrict-align
>  DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
>  DEFINE GCC_DLINK2_FLAGS_COMMON = 
> --script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
>  DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) 
> --gc-sections
> @@ -5188,7 +5188,7 @@ DEFINE CLANG35_AARCH64_TARGET= -target 
> aarch64-none-linux-gnu
>
>  DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
> -Wno-empty-body
>  DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
> DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
> DEF(CLANG35_WARNING_OVERRIDES)
> -DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
> DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
> DEF(CLANG35_WARNING_OVERRIDES)
> +DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
> DEF(CLANG35_AARCH64_TARGET) -mcmodel=small DEF(CLANG35_WARNING_OVERRIDES)
>
>  ##
>  # CLANG35 ARM definitions
> --
> 2.5.0
>
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[edk2] [PATCH] BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

[Ard Biesheuvel]

GCC for AARCH64 recognizes byte swapping sequences and replaces them
with rev instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before we
turn the MMU on.

So move the -mstrict-align compiler switch to the shared define for
all AARCH64 GCC versions.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 BaseTools/Conf/tools_def.template | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 864c9ddd382e..6bd0dcf7431c 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4323,7 +4323,7 @@ DEFINE GCC_IA32_CC_FLAGS   = 
DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double -
 DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
-Wno-address -mno-stack-arg-probe
 DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
-minline-int-divide-min-latency
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
-DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables
+DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables -mstrict-align
 DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -5191,7 +5191,7 @@ DEFINE CLANG35_IA32_X64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) 
DEF(CLANG35_WARNING_OVE
 DEFINE CLANG35_IA32_CC_FLAGS = DEF(CLANG35_IA32_X64_CC_FLAGS) 
DEF(CLANG35_IA32_TARGET)
 DEFINE CLANG35_X64_CC_FLAGS  = DEF(CLANG35_IA32_X64_CC_FLAGS) 
DEF(CLANG35_X64_TARGET)
 DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
DEF(CLANG35_WARNING_OVERRIDES)
-DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
DEF(CLANG35_WARNING_OVERRIDES)
+DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small DEF(CLANG35_WARNING_OVERRIDES)
 
 ##
 # CLANG35 IA32 definitions
-- 
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Re: [edk2] [PATCH 4/8] PcAtChipsetPkg: make preprocessor constants explicitly unsigned

[Ard Biesheuvel]

On 18 December 2015 at 10:45, Zeng, Star <star.z...@intel.com> wrote:
> On 2015/12/17 23:47, Ard Biesheuvel wrote:
>>
>> On 17 December 2015 at 15:10, Zeng, Star <star.z...@intel.com> wrote:
>>>
>>> On 2015/12/17 18:01, Ard Biesheuvel wrote:
>>>>
>>>>
>>>> C99 does not define left-shifting negative values, so make all
>>>> [positive] preprocessor constants unsigned explicitly, so they
>>>> do not become negative values after bitwise negation.
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.0
>>>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>>>> ---
>>>>PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 44
>>>> ++--
>>>>1 file changed, 22 insertions(+), 22 deletions(-)
>>>>
>>>> diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
>>>> b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
>>>> index 5698e935b01f..6ed761544a8a 100644
>>>> --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
>>>> +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c
>>>> @@ -19,32 +19,32 @@
>>>>//-
>>>>// UART Register Offsets
>>>>//-
>>>> -#define BAUD_LOW_OFFSET 0x00
>>>> -#define BAUD_HIGH_OFFSET0x01
>>>> -#define IER_OFFSET  0x01
>>>> -#define LCR_SHADOW_OFFSET   0x01
>>>> -#define FCR_SHADOW_OFFSET   0x02
>>>> -#define IR_CONTROL_OFFSET   0x02
>>>> -#define FCR_OFFSET  0x02
>>>> -#define EIR_OFFSET  0x02
>>>> -#define BSR_OFFSET  0x03
>>>> -#define LCR_OFFSET  0x03
>>>> -#define MCR_OFFSET  0x04
>>>> -#define LSR_OFFSET  0x05
>>>> -#define MSR_OFFSET  0x06
>>>> +#define BAUD_LOW_OFFSET 0x00U
>>>> +#define BAUD_HIGH_OFFSET0x01U
>>>> +#define IER_OFFSET  0x01U
>>>> +#define LCR_SHADOW_OFFSET   0x01U
>>>> +#define FCR_SHADOW_OFFSET   0x02U
>>>> +#define IR_CONTROL_OFFSET   0x02U
>>>> +#define FCR_OFFSET  0x02U
>>>> +#define EIR_OFFSET  0x02U
>>>> +#define BSR_OFFSET  0x03U
>>>> +#define LCR_OFFSET  0x03U
>>>> +#define MCR_OFFSET  0x04U
>>>> +#define LSR_OFFSET  0x05U
>>>> +#define MSR_OFFSET  0x06U
>>>>
>>>>//-
>>>>// UART Register Bit Defines
>>>>//-
>>>> -#define LSR_TXRDY   0x20
>>>> -#define LSR_RXDA0x01
>>>> -#define DLAB0x01
>>>> -#define MCR_DTRC0x01
>>>> -#define MCR_RTS 0x02
>>>> -#define MSR_CTS 0x10
>>>> -#define MSR_DSR 0x20
>>>> -#define MSR_RI  0x40
>>>> -#define MSR_DCD 0x80
>>>> +#define LSR_TXRDY   0x20U
>>>> +#define LSR_RXDA0x01U
>>>> +#define DLAB0x01U
>>>> +#define MCR_DTRC0x01U
>>>> +#define MCR_RTS 0x02U
>>>> +#define MSR_CTS 0x10U
>>>> +#define MSR_DSR 0x20U
>>>> +#define MSR_RI  0x40U
>>>> +#define MSR_DCD 0x80U
>>>>
>>>>//-
>>>>// UART Settings
>>>>
>>>
>>> Only DLAB is used to do left shift operation, how about to update the
>>> code
>>> like below?
>>>
>>
>> Even better.
>
>
> So you can include the code change like below in your V2 patch set.
>
> Or you want to send patch with the code change below separately?
>

No, I will just update the patch when I send the next version of the series.

Thanks,
Ard.
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Re: [edk2] [PATCH 3/6] BaseTools AARCH64: reduce tiny model function alignment

[Ard Biesheuvel]

On 27 December 2015 at 20:14, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Sun, Dec 27, 2015 at 08:02:34PM +0100, Ard Biesheuvel wrote:
>> On 27 December 2015 at 18:58, Leif Lindholm <leif.lindh...@linaro.org> wrote:
>> > On Thu, Dec 24, 2015 at 02:03:16PM +0100, Ard Biesheuvel wrote:
>> >> The tiny code model for AARCH64 is the most efficient model, since its
>> >> symbol references are relative via a single 32-bit ADR instruction. This
>> >> gives us a range of only +/- 1 MB, but this is sufficient for the vast
>> >> majority of the modules that make up a typical EDK2 firmware. Since the
>> >> reference is relative, it does not result in a fixup entry in the PE/COFF
>> >> relocation table. Unlike the small code model, which uses ADRP 
>> >> instructions,
>> >> the tiny model does not impose section alignment requirements.
>> >>
>> >> However, in some cases, (e.g., the full Shell binary built in DEBUG mode)
>> >> the resulting binary exceeds 1 MB, which may result in build errors if
>> >> code at one end of the image references a symbol at the other end.
>> >>
>> >> Since the tiny and small code models can coexist in a single binary, we
>> >> can work around this problem by making sure that tiny model .text and
>> >> .data sections are emitted in close proximity to each other, by reducing
>> >> the function alignment for tiny model code (which by itself should also be
>> >> an improvement in terms of code size), and sorting the linker input by
>> >> alignment.
>> >
>> > Hmm...
>>
>> Not elegant, but effective. And the best I could come up with ...
>
> Yeah, I'm not really objecting, it just feels a bit more like
> patchwork than fix.
>

Well, this is primarily caused by the way the Shell is composed of
static libraries, and it is unlikely that this should ever affect
other UEFI_APPLICATION modules as well. And building everything else
with the large code model because of this seems backwards to me too.

>> >> Contributed-under: TianoCore Contribution Agreement 1.0
>> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> >> ---
>> >>  BaseTools/Conf/tools_def.template | 4 ++--
>> >>  1 file changed, 2 insertions(+), 2 deletions(-)
>> >>
>> >> diff --git a/BaseTools/Conf/tools_def.template 
>> >> b/BaseTools/Conf/tools_def.template
>> >> index 0cc85a6f359d..fbf0841fc91f 100644
>> >> --- a/BaseTools/Conf/tools_def.template
>> >> +++ b/BaseTools/Conf/tools_def.template
>> >> @@ -4437,10 +4437,10 @@ DEFINE GCC49_ASM_FLAGS   = 
>> >> DEF(GCC48_ASM_FLAGS)
>> >>  DEFINE GCC49_ARM_ASM_FLAGS   = DEF(GCC48_ARM_ASM_FLAGS)
>> >>  DEFINE GCC49_AARCH64_ASM_FLAGS   = DEF(GCC48_AARCH64_ASM_FLAGS)
>> >>  DEFINE GCC49_ARM_CC_FLAGS= DEF(GCC48_ARM_CC_FLAGS)
>> >> -DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
>> >> DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny DEF(GCC_AARCH64_CC_FLAGS)
>> >> +DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
>> >> DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny -falign-functions=4 
>> >> DEF(GCC_AARCH64_CC_FLAGS)
>> >
>> > My GCC manpage claims that
>> > "-Os disables the following optimization flags: -falign-functions ..."
>> > and -Os is set in GCC_ALL_CC_FLAGS, and as far as I can see not
>> > overridden for AARCH64, except for DEBUG builds.
>> >
>>
>> OK, that means we will need to build the RELEASE Shell components with
>> -O2 rather than -Os if we ever hit the same issue for RELEASE builds.
>> Since those modules are not the ones where we are likely to care
>> deeply about code size, this is not a showstopper I think
>
> Could we move the -falign-functions=4 to DEBUG_GCCnn_AARCH64_CC_FLAGS
> instead then, next to the -O0? I'd prefer keeeping dead parameters off
> the command line where possible.
>
> Of course, could make sense to change the DEBUG_GCCnn_AARCH64_CC_FLAGS
> to include a common DEBUG_GCC_AARCH64_CC_FLAGS variable where these
> are set instead.
>

Well, since this applies to GCC49 DEBUG only, let's add it only there
instead. GCC49 currently means '4.9 or later', and I hope we will not
have a need to introduce GCC5 etc, and if that does happen, let's
worry about it then.


>> >>  DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
>> >>  DEFINE GCC49_ARM_DLINK2_FLAGS= DEF(GCC48_ARM_DLINK2_FLAGS)
>> >> -DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS)
>> >> +DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS) 
>> >> --sort-section=alignment
>> >
>> > No objection to this one.
>> >
>> >>  DEFINE GCC49_AARCH64_DLINK2_FLAGS= DEF(GCC48_AARCH64_DLINK2_FLAGS)
>> >>  DEFINE GCC49_ARM_ASLDLINK_FLAGS  = DEF(GCC48_ARM_ASLDLINK_FLAGS)
>> >>  DEFINE GCC49_AARCH64_ASLDLINK_FLAGS  = DEF(GCC48_AARCH64_ASLDLINK_FLAGS)
>> >> --
>> >> 2.5.0
>> >>
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Re: [edk2] [PATCH 3/6] BaseTools AARCH64: reduce tiny model function alignment

[Ard Biesheuvel]

On 27 December 2015 at 18:58, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Thu, Dec 24, 2015 at 02:03:16PM +0100, Ard Biesheuvel wrote:
>> The tiny code model for AARCH64 is the most efficient model, since its
>> symbol references are relative via a single 32-bit ADR instruction. This
>> gives us a range of only +/- 1 MB, but this is sufficient for the vast
>> majority of the modules that make up a typical EDK2 firmware. Since the
>> reference is relative, it does not result in a fixup entry in the PE/COFF
>> relocation table. Unlike the small code model, which uses ADRP instructions,
>> the tiny model does not impose section alignment requirements.
>>
>> However, in some cases, (e.g., the full Shell binary built in DEBUG mode)
>> the resulting binary exceeds 1 MB, which may result in build errors if
>> code at one end of the image references a symbol at the other end.
>>
>> Since the tiny and small code models can coexist in a single binary, we
>> can work around this problem by making sure that tiny model .text and
>> .data sections are emitted in close proximity to each other, by reducing
>> the function alignment for tiny model code (which by itself should also be
>> an improvement in terms of code size), and sorting the linker input by
>> alignment.
>
> Hmm...
>

Not elegant, but effective. And the best I could come up with ...

>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>  BaseTools/Conf/tools_def.template | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/BaseTools/Conf/tools_def.template 
>> b/BaseTools/Conf/tools_def.template
>> index 0cc85a6f359d..fbf0841fc91f 100644
>> --- a/BaseTools/Conf/tools_def.template
>> +++ b/BaseTools/Conf/tools_def.template
>> @@ -4437,10 +4437,10 @@ DEFINE GCC49_ASM_FLAGS   = 
>> DEF(GCC48_ASM_FLAGS)
>>  DEFINE GCC49_ARM_ASM_FLAGS   = DEF(GCC48_ARM_ASM_FLAGS)
>>  DEFINE GCC49_AARCH64_ASM_FLAGS   = DEF(GCC48_AARCH64_ASM_FLAGS)
>>  DEFINE GCC49_ARM_CC_FLAGS= DEF(GCC48_ARM_CC_FLAGS)
>> -DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
>> DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny DEF(GCC_AARCH64_CC_FLAGS)
>> +DEFINE GCC49_AARCH64_CC_FLAGS= $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
>> DEF(GCC44_ALL_CC_FLAGS) -mcmodel=tiny -falign-functions=4 
>> DEF(GCC_AARCH64_CC_FLAGS)
>
> My GCC manpage claims that
> "-Os disables the following optimization flags: -falign-functions ..."
> and -Os is set in GCC_ALL_CC_FLAGS, and as far as I can see not
> overridden for AARCH64, except for DEBUG builds.
>

OK, that means we will need to build the RELEASE Shell components with
-O2 rather than -Os if we ever hit the same issue for RELEASE builds.
Since those modules are not the ones where we are likely to care
deeply about code size, this is not a showstopper I think

>>  DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
>>  DEFINE GCC49_ARM_DLINK2_FLAGS= DEF(GCC48_ARM_DLINK2_FLAGS)
>> -DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS)
>> +DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS) 
>> --sort-section=alignment
>
> No objection to this one.
>
>>  DEFINE GCC49_AARCH64_DLINK2_FLAGS= DEF(GCC48_AARCH64_DLINK2_FLAGS)
>>  DEFINE GCC49_ARM_ASLDLINK_FLAGS  = DEF(GCC48_ARM_ASLDLINK_FLAGS)
>>  DEFINE GCC49_AARCH64_ASLDLINK_FLAGS  = DEF(GCC48_AARCH64_ASLDLINK_FLAGS)
>> --
>> 2.5.0
>>
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Re: [edk2] [PATCH 6/6] BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

[Ard Biesheuvel]

On 27 December 2015 at 19:02, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Thu, Dec 24, 2015 at 02:03:19PM +0100, Ard Biesheuvel wrote:
>> GCC for AARCH64 recognizes byte swapping sequences and replaces them
>> with rev instructions. In some cases (i.e., with GCC version 5 and later)
>> this may result in unaligned accesses, which are not allowed before we
>> turn the MMU on.
>>
>> So move the -mstrict-align compiler switch to the shared define for
>> all AARCH64 GCC versions.
>
> Happy with the change, but could you tweak the commit message so it
> does not suggest REV instructions can cause unaligned accesses?

Sure, that makes sense. Obviously, what happens is that adjacent byte
loads followed by byte stores in reverse order are replaced with a
wider load/rev/store sequence

> With that:
> Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
>

Thanks

>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> Reviewed-by: Liming Gao <liming@intel.com>
>> ---
>>  BaseTools/Conf/tools_def.template | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/BaseTools/Conf/tools_def.template 
>> b/BaseTools/Conf/tools_def.template
>> index fbf0841fc91f..bc2ff361502d 100644
>> --- a/BaseTools/Conf/tools_def.template
>> +++ b/BaseTools/Conf/tools_def.template
>> @@ -4323,7 +4323,7 @@ DEFINE GCC_IA32_CC_FLAGS   = 
>> DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double -
>>  DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
>> -Wno-address -mno-stack-arg-probe
>>  DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
>> -minline-int-divide-min-latency
>>  DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
>> -mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
>> -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
>> -DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
>> -fno-short-enums -save-temps -fverbose-asm -fsigned-char  
>> -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-builtin 
>> -Wno-address -fno-asynchronous-unwind-tables
>> +DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
>> -fno-short-enums -save-temps -fverbose-asm -fsigned-char  
>> -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-builtin 
>> -Wno-address -fno-asynchronous-unwind-tables -mstrict-align
>>  DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
>>  DEFINE GCC_DLINK2_FLAGS_COMMON = 
>> --script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
>>  DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) 
>> --gc-sections
>> @@ -5186,7 +5186,7 @@ DEFINE CLANG35_AARCH64_TARGET= -target 
>> aarch64-none-linux-gnu
>>
>>  DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
>> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
>> -Wno-empty-body
>>  DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
>> DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
>> DEF(CLANG35_WARNING_OVERRIDES)
>> -DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
>> DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
>> DEF(CLANG35_WARNING_OVERRIDES)
>> +DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
>> DEF(CLANG35_AARCH64_TARGET) -mcmodel=small DEF(CLANG35_WARNING_OVERRIDES)
>>
>>  ##
>>  # CLANG35 ARM definitions
>> --
>> 2.5.0
>>
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Re: [edk2] [PATCH 1/6] BaseTools CLANG35: use GNU target triplets explicitly

[Ard Biesheuvel]

On 27 December 2015 at 20:22, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Sun, Dec 27, 2015 at 08:08:27PM +0100, Ard Biesheuvel wrote:
>> On 27 December 2015 at 19:06, Leif Lindholm <leif.lindh...@linaro.org> wrote:
>> > On Thu, Dec 24, 2015 at 02:03:14PM +0100, Ard Biesheuvel wrote:
>> >> Since we are combining Clang with the GNU linker, make that explicit in
>> >> the target triplet. This affects certain builtin defines and other 
>> >> compiler
>> >> behavior that may be unspecified otherwise.
>> >
>> > Are there any potential conflicts here?
>> > Is it a safe assumption that only clang versions supporting the
>> > -linux-gnu* targets will be used to build ARM/AArch64 EDK2?
>> >
>>
>> Our CLANG35 toolchain depends on the GNU binutils cross-linker, and I
>> suppose it is possible to build Clang without such support. It is also
>> possible to build Clang without any aarch64 support. FWIW, I can build
>> ArmVirtQemu.dsc for AARCH64 with OSX's system clang and a
>> cross-binutils installed.
>
> Yeah, my question was really more (based in a lack of understanding of
> clang) - are we not actually removing support for toolchains that
> worked with the initial round of AArch64 clang support?
>
> I mean, like GCC comes with aarch64-elf flavours in addition to the
> aarch64-linux-gnu (both released by Linaro)? That should previously
> have "just worked" when not explicitly specifying the full triplet,
> but might now not?
>
> And if we're now restricting us to needing the -linux-gnu* support,
> would this actually need forking out into something similar to the
> ARMGCC/ARMLINUXGCC mess we had in the past in order to still work with
> all armv7/aarch64-capable clang toolchains?
>

We really need the -linux-gnu flavor here:

$ clang -target aarch64 -dM -E - <<<""|grep __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _

$ clang -target aarch64-linux-gnu -dM -E - <<<""|grep __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__

$ clang -target aarch64-none-gnu -dM -E - <<<""|grep __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _

(__USER_LABEL_PREFIX__ is used to set ASM_PFX in the EDK2 header files)

This simply means that your Clang is not suitable for building EDK2
combined with GNU binutils if it does not support the -linux-gnu
targets. This is because LD does not decorate with leading
underscores.

>> >> Contributed-under: TianoCore Contribution Agreement 1.0
>> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> >> ---
>> >>  BaseTools/Conf/tools_def.template | 11 +++
>> >>  1 file changed, 7 insertions(+), 4 deletions(-)
>> >>
>> >> diff --git a/BaseTools/Conf/tools_def.template 
>> >> b/BaseTools/Conf/tools_def.template
>> >> index 6e26bbca934b..8d3f20999303 100644
>> >> --- a/BaseTools/Conf/tools_def.template
>> >> +++ b/BaseTools/Conf/tools_def.template
>> >> @@ -5183,9 +5183,12 @@ RELEASE_GCC49_AARCH64_CC_FLAGS   = 
>> >> DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-s
>> >>  *_CLANG35_*_ASLCC_PATH   = ENV(CLANG35_BIN)clang
>> >>  *_CLANG35_*_ASLPP_PATH   = ENV(CLANG35_BIN)clang
>> >>
>> >> +DEFINE CLANG35_ARM_TARGET= -target armv7-none-linux-gnueabi
>> >> +DEFINE CLANG35_AARCH64_TARGET= -target aarch64-none-linux-gnu
>> >> +
>> >>  DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
>> >> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
>> >> -Wno-empty-body
>> >> -DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) -target armv7-a 
>> >> -mstrict-align -mllvm -arm-use-movt=0 DEF(CLANG35_WARNING_OVERRIDES)
>> >> -DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) -target 
>> >> aarch64 -mcmodel=small -mstrict-align DEF(CLANG35_WARNING_OVERRIDES)
>> >> +DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
>> >> DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
>> >> DEF(CLANG35_WARNING_OVERRIDES)
>> >> +DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
>> >> DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
>> >> DEF(CLANG35_WARNING_OVERRIDES)
>> >>
>> >>  ##
>> >>  # CLANG35 ARM definitions
>> >> @@ -5197,7 +5200,7 @@ DEFINE CLANG35_AARCH64_CC_FLAGS  = 
>> >> DEF(GCC_AARCH64_CC_FLAGS) -target aarch64 -mc
>> >>
>&g

Re: [edk2] [PATCH 7/8] BaseTools CLANG35: use GNU target triplets explicitly

[Ard Biesheuvel]

On 17 December 2015 at 11:01, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> Since we are combining Clang with the GNU linker, make that explicit in
> the target triplet. This affects certain builtin defines and other compiler
> behavior that may be unspecified otherwise.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
>  BaseTools/Conf/tools_def.template | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/BaseTools/Conf/tools_def.template 
> b/BaseTools/Conf/tools_def.template
> index ea321476a496..0cc85a6f359d 100644
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -5181,8 +5181,8 @@ RELEASE_GCC49_AARCH64_CC_FLAGS   = 
> DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-s
>  *_CLANG35_*_ASLCC_PATH   = ENV(CLANG35_BIN)clang
>  *_CLANG35_*_ASLPP_PATH   = ENV(CLANG35_BIN)clang
>
> -DEFINE CLANG35_ARM_TARGET= -target armv7-a
> -DEFINE CLANG35_AARCH64_TARGET= -target aarch64
> +DEFINE CLANG35_ARM_TARGET= -target armv7-none-linux-gnueabi
> +DEFINE CLANG35_AARCH64_TARGET= -target aarch64-none-linux-gnu
>
>  DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
> -Wno-empty-body
>  DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
> DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
> DEF(CLANG35_WARNING_OVERRIDES)

@Liming, Yonghong: are you ok with this patch? This needs to be
applied before the patch that sets the target for the various PP flags
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[edk2] [PATCH 5/6] ShellPkg AARCH64: remove DEBUG BuildOptions override

[Ard Biesheuvel]

The BuildOptions for AARCH64 in Application/Shell/Shell.inf only affect
the core Shell binary, and not the Shell component libraries which are
merged into the final Shell binary via NULL library class resolution.

This means we need to override the UEFI_APPLICATION build options in
the platform .DSC anyway, there is no point in setting these options
here as well. So remove them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ShellPkg/Application/Shell/Shell.inf | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/ShellPkg/Application/Shell/Shell.inf 
b/ShellPkg/Application/Shell/Shell.inf
index 253bfdbb224e..131200cb6a23 100644
--- a/ShellPkg/Application/Shell/Shell.inf
+++ b/ShellPkg/Application/Shell/Shell.inf
@@ -108,10 +108,3 @@ [Pcd]
   gEfiShellPkgTokenSpaceGuid.PcdShellForceConsole   ## CONSUMES
   gEfiShellPkgTokenSpaceGuid.PcdShellSupplier   ## CONSUMES
   gEfiShellPkgTokenSpaceGuid.PcdShellMaxHistoryCommandCount ## CONSUMES
-
-[BuildOptions.AARCH64]
-  # The tiny code model used by AARCH64 only supports binaries of up to 1 MB in
-  # size. Since the Shell application exceeds that when built in DEBUG mode,
-  # make sure we build it using the small code model instead.
-  GCC:DEBUG_*_*_CC_FLAGS = -mcmodel=small
-  GCC:DEBUG_*_*_DLINK_FLAGS = -z common-page-size=0x1000
-- 
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[edk2] [PATCH 0/6] AARCH64 code model and toolchain updates

[Ard Biesheuvel]

This is a followup to the patch 'BaseTools AARCH64: add -mstrict-align to
all AARCH64 GCC flavors' that I sent out yesterday. As it turns out, using
strict alignment results in a code size increase which breaks the build for
the DEBUG shell using the tiny code model we use for GCC49 and up.

(Note to Leif: D02 uses -mstrict-align in its platform specific C flags as
well, that is why we hit it there before anywhere else)

I have reproduced some patches here that I have already sent out separately
(#6) or as part of another series (#1, #2) but I included them again since
they need to be merged in order to prevent breaking bisect due to build
errors.

Patches #1 and #2 set the CLANG35 target to the GNU flavor of the respective
architectures, and adds the target to the preprocessor invocations as well.

Patch #3 reduces the function alignment for the tiny code model to 4 bytes,
and sorts the linker input by alignment. This ensures that all tiny model
code is kept in close proximity of each other when using small code model
.text using the default 8 byte function alignment in the same binary. This
prevents potential linker errors if the binary exceeds 1 MB in size.

Patch #4 overrides the code model and function alignment for all modules of
type UEFI_APPLICATION that are built as part of ArmVirtQemu or ArmVirtXen when
using GCC49. This combines with the changes in patch #3 to ensure that binaries
containing both small and tiny code model .text can link successfully.

Patch #5 removes the build options for AARCH64 from ShellPkg. They need to be
overridden anyway or they will only affect the core Shell binary and not all of
the Shell component libraries that are merged with the core binary at build 
time.
Also, we only need this override for GCC49, since GCC 48 and earlier use the
large code model, and CLANG35 uses the small code model.

Patch #6 moves the -mstrict-align compiler option to the common AARCH64/GCC
CFLAGS definition so that it applies to all GCC versions in addition to CLANG35.
This addresses an issue spotted by the Ubuntu/Debian folks (and which they
kindly never reported upstream, afaict) here:
https://bugs.launchpad.net/ubuntu/+source/edk2/+bug/1489560

Ard Biesheuvel (6):
  BaseTools CLANG35: use GNU target triplets explicitly
  BaseTools CLANG35: use -target in PP flags as well
  BaseTools AARCH64: reduce tiny model function alignment
  ArmVirtPkg: use small code model for all UEFI_APPLICATION modules
  ShellPkg AARCH64: remove DEBUG BuildOptions override
  BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

 ArmVirtPkg/ArmVirt.dsc.inc   | 21 ++
 BaseTools/Conf/tools_def.template| 29 +++-
 ShellPkg/Application/Shell/Shell.inf |  7 -
 3 files changed, 37 insertions(+), 20 deletions(-)

-- 
2.5.0

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[edk2] [PATCH 6/6] BaseTools AARCH64: add -mstrict-align to all AARCH64 GCC flavors

[Ard Biesheuvel]

GCC for AARCH64 recognizes byte swapping sequences and replaces them
with rev instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before we
turn the MMU on.

So move the -mstrict-align compiler switch to the shared define for
all AARCH64 GCC versions.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Liming Gao <liming@intel.com>
---
 BaseTools/Conf/tools_def.template | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index fbf0841fc91f..bc2ff361502d 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4323,7 +4323,7 @@ DEFINE GCC_IA32_CC_FLAGS   = 
DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double -
 DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
-Wno-address -mno-stack-arg-probe
 DEFINE GCC_IPF_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) 
-minline-int-divide-min-latency
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -save-temps -fsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft
-DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables
+DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -save-temps -fverbose-asm -fsigned-char  -ffunction-sections 
-fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address 
-fno-asynchronous-unwind-tables -mstrict-align
 DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -5186,7 +5186,7 @@ DEFINE CLANG35_AARCH64_TARGET= -target 
aarch64-none-linux-gnu
 
 DEFINE CLANG35_WARNING_OVERRIDES = -Wno-parentheses-equality 
-Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
-Wno-empty-body
 DEFINE CLANG35_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
DEF(CLANG35_ARM_TARGET) -mstrict-align -mllvm -arm-use-movt=0 
DEF(CLANG35_WARNING_OVERRIDES)
-DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small -mstrict-align 
DEF(CLANG35_WARNING_OVERRIDES)
+DEFINE CLANG35_AARCH64_CC_FLAGS  = DEF(GCC_AARCH64_CC_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) -mcmodel=small DEF(CLANG35_WARNING_OVERRIDES)
 
 ##
 # CLANG35 ARM definitions
-- 
2.5.0

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[edk2] [PATCH 4/6] ArmVirtPkg: use small code model for all UEFI_APPLICATION modules

[Ard Biesheuvel]

Unfortunately, compiling the DEBUG shell using the small code model is
not sufficient in all cases to get a successful build when the toolchain
defaults to the tiny code model. The reason is that not only the Shell binary
itself should be built using the small code model, all Shell component
libraries that are linked into the Shell binary via NULL library class
resolution should use the small code model as well.

So override the code model and function alignment for DEBUG builds of
UEFI_APPLICATION modules when using GCC 4.9 (which is the only toolchain
that uses the tiny model). This should affect all Shell component libraries
in addition to the Shell core binary.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/ArmVirt.dsc.inc | 21 
 1 file changed, 21 insertions(+)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 49e4264ee8a4..fbd710cb870d 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -406,3 +406,24 @@ [Components.common]
   gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
   gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
   }
+
+[BuildOptions.AARCH64.EDKII.UEFI_APPLICATION]
+  #
+  # The bulk of the Shell functionality is implemented by UEFI_APPLICATION
+  # libraries that are linked into the Shell binary via NULL library class
+  # resolution. Since the Shell built in DEBUG mode exceeds the 1 MB range of
+  # the AARCH64 tiny code model which we use by default on GCC 4.9 and later,
+  # the .text and .data sections of the remaining base libraries (which are
+  # built using the tiny code model regardless of the model we use for
+  # UEFI_APPLICATION modules) should be kept as close together as possible.
+  #
+  # By reverting to 8 byte function alignment for UEFI_APPLICATION modules
+  # (which is usually the default, but will be lowered to 4 if we are using the
+  # tiny code model) and letting the linker sort its input by alignment, we can
+  # force all UEFI_APPLICATION small code model .text input sections to appear
+  # first in the binary. The remaining base libraries will end up in close
+  # proximity of each other at the end of the image, preventing out of range
+  # problems when relocating their tiny model (+/- 1 MB) symbol references.
+  #
+  DEBUG_GCC49_*_CC_FLAGS = -mcmodel=small -falign-functions=8
+  DEBUG_GCC49_*_DLINK_FLAGS = -z common-page-size=0x1000
-- 
2.5.0

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[edk2] [PATCH 2/6] BaseTools CLANG35: use -target in PP flags as well

[Ard Biesheuvel]

The Clang preprocessor may rely on builtin defines that are target
dependent, so we should add the -target argument also when invoking
the preprocessor directly.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Liming Gao <liming@intel.com>
---
 BaseTools/Conf/tools_def.template | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 8d3f20999303..0cc85a6f359d 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -5169,9 +5169,7 @@ RELEASE_GCC49_AARCH64_CC_FLAGS   = 
DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-s
 *_CLANG35_*_ASL_PATH = DEF(UNIX_IASL_BIN)
 
 *_CLANG35_*_PP_FLAGS = DEF(GCC_PP_FLAGS)
-*_CLANG35_*_ASLPP_FLAGS  = DEF(GCC_ASLPP_FLAGS)
 *_CLANG35_*_ASLCC_FLAGS  = DEF(GCC_ASLCC_FLAGS)
-*_CLANG35_*_VFRPP_FLAGS  = DEF(GCC_VFRPP_FLAGS)
 *_CLANG35_*_APP_FLAGS=
 *_CLANG35_*_ASL_FLAGS= DEF(IASL_FLAGS)
 *_CLANG35_*_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
@@ -5204,9 +5202,10 @@ DEFINE CLANG35_AARCH64_CC_FLAGS  = 
DEF(GCC_AARCH64_CC_FLAGS) DEF(CLANG35_AARCH64
 *_CLANG35_ARM_DLINK_FLAGS= DEF(GCC_ARM_DLINK_FLAGS)
 *_CLANG35_ARM_DLINK2_FLAGS   = DEF(GCC_DLINK2_FLAGS_COMMON) 
--defsym=PECOFF_HEADER_SIZE=0x220
 *_CLANG35_ARM_PLATFORM_FLAGS =
-*_CLANG35_ARM_PP_FLAGS   = DEF(GCC_PP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_ARM_PP_FLAGS   = DEF(GCC_PP_FLAGS) DEF(CLANG35_ARM_TARGET) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
 *_CLANG35_ARM_RC_FLAGS   = DEF(GCC_ARM_RC_FLAGS)
-*_CLANG35_ARM_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_ARM_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) 
DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
+*_CLANG35_ARM_ASLPP_FLAGS= DEF(GCC_ASLPP_FLAGS) DEF(CLANG35_ARM_TARGET)
 
   DEBUG_CLANG35_ARM_CC_FLAGS = DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS) -O0
 RELEASE_CLANG35_ARM_CC_FLAGS = DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS) -Oz
@@ -5225,9 +5224,10 @@ RELEASE_CLANG35_ARM_CC_FLAGS = 
DEF(CLANG35_ARM_CC_FLAGS) $(ARCHCC_FLAGS) $(P
 *_CLANG35_AARCH64_DLINK_FLAGS= DEF(GCC_AARCH64_DLINK_FLAGS) -z 
common-page-size=0x1000
 *_CLANG35_AARCH64_DLINK2_FLAGS   = DEF(GCC_DLINK2_FLAGS_COMMON) 
--defsym=PECOFF_HEADER_SIZE=0x228
 *_CLANG35_AARCH64_PLATFORM_FLAGS =
-*_CLANG35_AARCH64_PP_FLAGS   = DEF(GCC_PP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_PP_FLAGS   = DEF(GCC_PP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
 *_CLANG35_AARCH64_RC_FLAGS   = DEF(GCC_AARCH64_RC_FLAGS)
-*_CLANG35_AARCH64_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) $(ARCHCC_FLAGS) 
$(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_VFRPP_FLAGS= DEF(GCC_VFRPP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
+*_CLANG35_AARCH64_ASLPP_FLAGS= DEF(GCC_ASLPP_FLAGS) 
DEF(CLANG35_AARCH64_TARGET)
 
   DEBUG_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -O0
 RELEASE_CLANG35_AARCH64_CC_FLAGS = DEF(CLANG35_AARCH64_CC_FLAGS) 
$(ARCHCC_FLAGS) $(PLATFORM_FLAGS) -Oz
-- 
2.5.0

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Re: [edk2] [PATCH v2 0/5] ArmVirtPkg: add ARM support to ArmVirtXen

[Ard Biesheuvel]

On 21 December 2015 at 18:59, Stefano Stabellini
<stefano.stabell...@eu.citrix.com> wrote:
> On Wed, 16 Dec 2015, Ard Biesheuvel wrote:
>> By special request, this implements ARM support to the ArmVirtXen
>> platform. This time, I managed to test it myself under Xen on actual
>> AArch64 hardware, after I figured out that 64-bit supports 32-bit guests
>> as well.
>>
>> Changes since v1:
>> - two patches have been merged, and hence dropped from this series
>> - new patch #1 which fixes an interworking issue with XenHypercall2()
>> - added Laszlo's acks to patches #2 to #5
>>
>> Ard Biesheuvel (5):
>>   OvfmPkg/XenHypercallLib: add missing GCC_ASM_EXPORT to XenHypercall2
>>   ArmVirtPkg/XenRelocatablePlatformLib: rewrite DTB memory node
>> retrieval in C
>>   ArmVirtPkg/PrePiRelocatable: add ARM support
>>   ArmVirtPkg/ArmXenRelocatablePlatformLib: add ARM support
>>   ArmVirtPkg/ArmVirtXen: add ARM support
>
> It works fine, thanks Ard!
>

Great! Thanks for testing
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Re: [edk2] [PATCH 0/3] ArmVirtPkg: add support for UEFI secure boot to 32-bit ARM

[Ard Biesheuvel]

On 27 November 2015 at 12:56, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Fri, Nov 27, 2015 at 09:51:50AM +0100, Ard Biesheuvel wrote:
>> Since UEFI on 32-bit ARM does not allow floating point arithmetic in 
>> hardware,
>> running OpenSslLib unmodified requires a softfloat library.
>>
>> This series factors out the minimally required bits of StdLib/LibC/Softfloat,
>> and copies them into a new library ArmPkg/Library/ArmSoftFloatLib. This 
>> library
>> dependency is wired into OpenSslLib, and its resolution added to 
>> ArmVirt.dsc.inc
>>
>> Ard Biesheuvel (3):
>>   ArmPkg: factor out softfloat support from StdLib/LibC/SoftFloat
>>   CryptoPkg: add softfloat dependency for ARM
>>   ArmVirtPkg: add secure boot support to 32-bit ARM targets
>
> For 1(+2 if needed)/3:
> Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
>

Thanks Leif.

I was considering adding the following to the .INF:

"""
[Binaries]
  # The softfloat library can only be built with GCC, so provide
  # a prebuilt binary for RVCT users.
  LIB|ArmSoftFloatLib.lib|*|RVCT
"""

and including the binary .lib, so that RVCT users (i.e., Eugene) are
not left out in the cold.

Any thoughts?
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Re: [edk2] [PATCH] ArmPkg: add typecast in UncachedMemoryAllocationLib to fix build warning

[Ard Biesheuvel]

On 25 November 2015 at 17:35, Cohen, Eugene  wrote:
> Small warning fix.
>

Hello Eugene,

Presumably, the warning is about the variable potentially being used
uninitialized?
If so, please drop the cast in the initializer, and update your
$subject accordingly.

I am not sure (cc'ing Laszlo since he probably knows from the top of
his head) whether the initialization should be separate from the
declaration, or does that apply only to structs?

Thanks,
Ard.

> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Eugene Cohen 
> ---
>  .../Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c   | 2 
> +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> index 1dfc740..58aca5d 100644
> --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> +++ b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> @@ -85,7 +85,7 @@ AllocatePagesFromList (
>  {
>EFI_STATUS   Status;
>LIST_ENTRY  *Link;
> -  FREE_PAGE_NODE  *Node;
> +  FREE_PAGE_NODE  *Node = (FREE_PAGE_NODE *)NULL;
>FREE_PAGE_NODE  *NewNode;
>UINTNAlignmentMask;
>EFI_PHYSICAL_ADDRESS Memory;
> --
>
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Re: [edk2] [PATCH] ArmPkg: add missing MigratePeiServicesTablePointer function required by update to the PeiServicesTablePointerLib in svn 15115

[Ard Biesheuvel]

On 25 November 2015 at 14:09, Cohen, Eugene <eug...@hp.com> wrote:
> Ard,
>
> Thanks - I'm still working on trying to get you and Leif included.  Wouldn't 
> it be a nice feature if the mail server detected 'ArmPkg' and then 
> automatically put you two on the To: line?
>
>> Also, you need to add your Signed-off-by and Contributed-under lines, or we 
>> will not be able to merge this.
>
> I did add the signoff/contribution but I now see I put it in the wrong place, 
> after the patch instead of after the commit message - I'll work on that.  One 
> of these days I might actually get all the parts of a patch submission 
> correct.
>

OK, I hadn't spotted that.

The patch itself looks fine.

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

I trimmed the subject line, word wrapped the commit log, moved your
Contributed-under and Signed-off-by lines into it, and committed it as
SVN r18953

Thanks,
Ard.

> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Tuesday, November 24, 2015 11:35 PM
> To: Cohen, Eugene <eug...@hp.com>
> Cc: edk2-devel@lists.01.org
> Subject: Re: [edk2] [PATCH] ArmPkg: add missing 
> MigratePeiServicesTablePointer function required by update to the 
> PeiServicesTablePointerLib in svn 15115
>
> On 24 November 2015 at 18:09, Cohen, Eugene <eug...@hp.com> wrote:
>> As of SVN 15115 the PEI core needs a MigratePeiServicesTablePointer function.
>>
>> Background: The ArmPkg variant of the PeiServicesTablePointerLib implements 
>> the standard PEI Services table retrieval mechanism as defined in the PI 
>> Specification Volume 1 section 5.4.4 using the PIDRURW registers.  No 
>> special action is required on ARM to migrate the PEI Services table pointer 
>> after main memory initialization but a function must be implemented 
>> nonetheless.
>>
>
> Thanks Eugene.
>
> Please cc me and Leif when you send patches to the list that you
> expect us to look at.
> Also, you need to add your Signed-off-by and Contributed-under lines,
> or we will not be able to merge this.
>
> Thanks,
> Ard.
>
>
>> ---
>>  .../PeiServicesTablePointer.c  | 23 
>> ++
>>  1 file changed, 23 insertions(+)
>>
>> diff --git 
>> a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c 
>> b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
>> index c2a4a35..9320637 100644
>> --- a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
>> +++ b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
>> @@ -60,3 +60,26 @@ GetPeiServicesTablePointer (
>>  {
>>return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw();
>>  }
>> +
>> +/**
>> +Perform CPU specific actions required to migrate the PEI Services Table
>> +pointer from temporary RAM to permanent RAM.
>> +
>> +For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
>> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
>> +For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
>> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
>> +For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
>> +a dedicated CPU register.  This means that there is no memory storage
>> +associated with storing the PEI Services Table pointer, so no additional
>> +migration actions are required for Itanium or ARM CPUs.
>> +
>> +**/
>> +VOID
>> +EFIAPI
>> +MigratePeiServicesTablePointer(
>> +VOID
>> +)
>> +{
>> +  return;
>> +}
>> --
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Eugene Cohen <eug...@hp.com>
>>
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[edk2] [PATCH v2 4/4] CryptoPkg: add softfloat dependency for ARM

[Ard Biesheuvel]

UEFI on 32-bit ARM does not allow the use of hardware floating point,
so in order to be able to run OpenSslLib, we need to fulfil its
floating point arithmetic dependencies using a software library.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
---
 CryptoPkg/Library/OpensslLib/OpensslLib.inf | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 2e74f6cbeccf..20200c33f621 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -850,6 +850,9 @@ [Packages]
 [LibraryClasses]
   DebugLib
 
+[LibraryClasses.ARM]
+  ArmSoftFloatLib
+
 [BuildOptions]
   #
   # Disables the following Visual Studio compiler warnings brought by openssl 
source, so we do not break the build with /WX option:
@@ -889,6 +892,6 @@ [BuildOptions]
   #  513: a value of type  cannot be assigned to an entity of type 
   #  188: enumerated type mixed with another type (i.e. passing an integer as 
an enum without a cast)
   # 1296: Extended constant initialiser used
-  RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) 
--library_interface=aeabi_clib99 --fpu=vfpv3 
--diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188
+  RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) 
--library_interface=aeabi_clib99 
--diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188
   XCODE:*_*_IA32_CC_FLAGS   = -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w
   XCODE:*_*_X64_CC_FLAGS= -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w
-- 
1.9.1

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[edk2] [PATCH v2 2/4] ArmPkg/ArmSoftFloatLib: add support for RVCT

[Ard Biesheuvel]

The ARM softfloat library in ArmSoftfloatLib currently does not build
under RVCT, simply because the code includes system header files that
RVCT does not provide. However, nothing exported by those include files
is actually used by the library when built in SOFTFLOAT_FOR_GCC mode,
so we can just drop all of them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c | 1 -
 ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf  | 1 +
 ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c   | 1 -
 ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize | 4 
 15 files changed, 1 insertion(+), 17 deletions(-)

diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c
index 8bde7a5489e2..614c7c61c8e1 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c
@@ -18,7 +18,6 @@
  * Written by Ben Harris, 2000.  This file is in the Public Domain.
  */
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmpeq.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c
index c153feb6a838..5062a286b7ef 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c
@@ -20,7 +20,6 @@
 #include "milieu.h"
 #include "softfloat.h"
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmpge.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c
index 5fb1606697a3..b98652bf940f 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c
@@ -22,7 +22,6 @@
 #include "milieu.h"
 #include "softfloat.h"
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmpgt.c,v 1.2 2013/04/16 13:38:34 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c
index a8327c5e5bec..8053985f9bc7 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c
@@ -22,7 +22,6 @@
 #include "milieu.h"
 #include "softfloat.h"
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmple.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c
index 8d0e143cb499..cd166440ef6c 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c
@@ -22,7 +22,6 @@
 #include "milieu.h"
 #include "softfloat.h"
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmplt.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c
index fa91120a6c39..36fd3468ccd6 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c
@@ -22,7 +22,6 @@
 #include "milieu.h"
 #include "softfloat.h"
 
-#include 
 #if defined(LIBC_SCCS) && !defined(lint)
 __RCSID("$NetBSD: __aeabi_dcmpun.c,v 1.1 2013/04/16 10:37:39 matt Exp $");
 #endif /* LIBC_SCCS and not lint */
diff --git a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c 
b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c
index 83db09e6a46e..ccea1f75e1cb 100644
--- a/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c
+++ b/ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c
@@ -18,7 +18,6 @@
  * Written by Ben Harris, 2000.  This

Re: [edk2] CryptoPkg: OpenSSL build issue with RVCT

[Ard Biesheuvel]

On 24 November 2015 at 16:53, Cohen, Eugene <eug...@hp.com> wrote:
> Ard, thanks - as you can tell this is an issue in the original flags and not 
> with the changes I've added.  I agree that we should not redefine the fpu in 
> this file but rather inherit from the build.
>

Looking at the repo history, it turns out that this has been present
since the original RVCT support was added to OpenSslLib in 2011. That
does not make it right, though, and using this library to implement
runtime services for authenticated variables is going to cause trouble
regardless.  So I am inclined to suggest it be removed, considering
that EDK2 is a reference implementation, and we should not be setting
bad examples.

> David, good comments - I'm working on an updated patch.  I'm running into 
> some issues related to printf and alloca that I need to address as well.
>
> I don't think we want each edk2 developer independently opening openssl 
> tickets as we encounter issues.  It would probably make more sense for Long 
> to do this or, if we think this is an RVCT-unique issue, for Ard or Leif to 
> do this.  Do we already have these responsibilities identified?
>

I'd like to see RVCT support in upstream OpenSSL first. Otherwise, it
will be a moving target, and we can never upgrade our OpenSSL version
without the risk of breaking the build for RVCT in a way that requires
new OpenSSL tickets to be created. Unfortunately, I don't have the
bandwidth to get involved in that, since RVCT is not a priority for
Linaro. (Note that RVCT is 32-bit only. The proprietary 64-bit ARM
compiler is based on Clang. Also, the RVCT asm dialect is completely
different, so none of the ALU and NEON accelerated ARM implementation
for AES and SHA can be built with it without major surgery on the
perlasm files)

Then, we can see what issues remain in the EDK2 integration, the most
important of which is the lack of softfloat support (but perhaps we
can port the code from StdLibPkg so that it can be used in DXE?)

Regards,
Ard.


> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Tuesday, November 24, 2015 8:49 AM
> To: David Woodhouse <dw...@infradead.org>
> Cc: Cohen, Eugene <eug...@hp.com>; Long, Qin <qin.l...@intel.com>; 
> edk2-devel@lists.01.org <edk2-de...@ml01.01.org>; Leif Lindholm 
> <leif.lindh...@arm.com>
> Subject: Re: [edk2] CryptoPkg: OpenSSL build issue with RVCT
>
> On 24 November 2015 at 15:47, David Woodhouse <dw...@infradead.org> wrote:
>> On Tue, 2015-11-24 at 14:19 +, Cohen, Eugene wrote:
>>>
>>> Here's a patch with this changes:
>>>
>>> ---
>>>  edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf| 
>>> 2 +-
>>>  edk2/CryptoPkg/Library/OpensslLib/openssl-1.0.2d/crypto/x509/x509_vfy.c | 
>>> 1 +
>>>  2 files changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
>>> b/edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>>> index 2e74f6c..261861b 100644
>>> --- a/edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>>> +++ b/edk2/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>>> @@ -889,6 +889,6 @@
>>>#  513: a value of type  cannot be assigned to an entity of type
>>>#  188: enumerated type mixed with another type (i.e. passing an integer 
>>> as an enum without a cast)
>>># 1296: Extended constant initialiser used
>>> -  RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) 
>>> --library_interface=aeabi_clib99 --fpu=vfpv3 
>>> --diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188
>>> +  RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) 
>>> --library_interface=aeabi_clib99 --fpu=vfpv3 
>>> --diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188,128,546
>
> This looks wrong. The UEFI spec disallows the use of hardware FP on
> 32-bit ARM, and yet we are passing --fpu=vfpv3. I actually tried
> building OpenSslLib for ARM using GCC, and got in trouble with the RNG
> routines that rely on FP, so my conclusion was that it requires some
> software FP routines (or a build time switch to omit those files and
> lose some functionality)
>
> Note that this is not a theoretical problem. Under Linux, you can only
> use FP in kernel mode if you explicitly wrap it with fp_begin/fp_end
> routines, and if you don't, anything that touches the FP register file
> will trap. This includes the UEFI runtime services invocations, since
> their entry/exit routines don't call those wrappers. And even if it
> wouldn't trap, you would still have to preserve the contents of the FP
> registers, since an ordinary context switch or syscall does 

Re: [edk2] [PATCH] ArmPkg/ArmLib: mark all cached mappings as (inner) shareable

[Ard Biesheuvel]

On 24 November 2015 at 14:49, Michael Zimmermann
<sigmaepsilo...@gmail.com> wrote:
> sry for the late answer.
>
> The value of this register is: 0x10211103
> I hope that helps.
>

Thanks.

This value decodes as;
InnerShr, bits [31:28] == 1, Implemented with hardware coherency support.
ShareLvl, bits [15:12] == 1, Two levels of shareability implemented.
OuterShr, bits [11: 8] == 1, Implemented with hardware coherency support.

So the performance regression you are seeing is most likely caused by
the fact that the L2 or other bits of the coherency hardware (CCI?)
are not configured yet, or configured incorrectly.

Note that I introduced a new feature PCD
'PcdNormalMemoryNonshareableOverride' that reverts to the old
behavior.

Regards,
Ard.


> On Wed, Nov 18, 2015 at 12:16 PM, Ard Biesheuvel <ard.biesheu...@linaro.org>
> wrote:
>>
>> On 16 November 2015 at 16:03, Michael Zimmermann
>> <sigmaepsilo...@gmail.com> wrote:
>> > Unfortunately I can't tell you much about how the L2 works or if it's
>> > configurable because it's a proprietary hw(I'm a opensource dev working
>> > with
>> > Qualcomm Android devices).
>> >
>> > Also, I'm using ARM PrePi so EDK2 doesn't configure any architectural hw
>> > besides exceptions and MMU.
>> >
>>
>> OK, I understand.
>>
>> I'd be interested in the contents of your ID_MMFR0 register
>>
>> MRC p15, 0, , c0, c1, 4 ; Read ID_MMFR0 into Rt
>>
>> Could you please run that and reply with the result?
>>
>> Thanks,
>> Ard.
>
>
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Re: [edk2] ArmPlatformPkg: Non-compliant PeiServicesTablePointerLib implementation

[Ard Biesheuvel]

On 24 November 2015 at 18:16, Cohen, Eugene  wrote:
> In ArmPlatformPkg there is an implementation of the PeiServicesTablePointer
> library that uses the "global variable" creation.  (I don't know what the
> purpose is of these "global variables" but they seem to be incompatible with
> the philosophy of PI/edk2 which is all about decentralizing stuff - hence
> the reason GUIDed HOBs exist in PEI.)
>
>
>
> This usage is not compatible with the PI specification (vol 1, section
> 5.4.4) and as such I recommend that we delete this library and ensure all
> ARM platforms use the library from ArmPkg.
>

Yes, I would gladly do that. This is the only use of these 'global
variables', as far as I can see, so we can remove them completely.

-- 
Ard.
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Re: [edk2] [PATCH] ArmPkg: add missing MigratePeiServicesTablePointer function required by update to the PeiServicesTablePointerLib in svn 15115

[Ard Biesheuvel]

On 24 November 2015 at 18:09, Cohen, Eugene  wrote:
> As of SVN 15115 the PEI core needs a MigratePeiServicesTablePointer function.
>
> Background: The ArmPkg variant of the PeiServicesTablePointerLib implements 
> the standard PEI Services table retrieval mechanism as defined in the PI 
> Specification Volume 1 section 5.4.4 using the PIDRURW registers.  No special 
> action is required on ARM to migrate the PEI Services table pointer after 
> main memory initialization but a function must be implemented nonetheless.
>

Thanks Eugene.

Please cc me and Leif when you send patches to the list that you
expect us to look at.
Also, you need to add your Signed-off-by and Contributed-under lines,
or we will not be able to merge this.

Thanks,
Ard.


> ---
>  .../PeiServicesTablePointer.c  | 23 
> ++
>  1 file changed, 23 insertions(+)
>
> diff --git 
> a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c 
> b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> index c2a4a35..9320637 100644
> --- a/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> +++ b/ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> @@ -60,3 +60,26 @@ GetPeiServicesTablePointer (
>  {
>return (CONST EFI_PEI_SERVICES **)ArmReadTpidrurw();
>  }
> +
> +/**
> +Perform CPU specific actions required to migrate the PEI Services Table
> +pointer from temporary RAM to permanent RAM.
> +
> +For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
> +For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
> +For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
> +a dedicated CPU register.  This means that there is no memory storage
> +associated with storing the PEI Services Table pointer, so no additional
> +migration actions are required for Itanium or ARM CPUs.
> +
> +**/
> +VOID
> +EFIAPI
> +MigratePeiServicesTablePointer(
> +VOID
> +)
> +{
> +  return;
> +}
> --
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Eugene Cohen 
>
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Re: [edk2] [PATCH v2 0/4] ArmVirtPkg: add support for UEFI secure boot to 32-bit ARM

[Ard Biesheuvel]

On 27 November 2015 at 16:21, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> Since UEFI on 32-bit ARM does not allow floating point arithmetic in hardware,
> running OpenSslLib unmodified requires a softfloat library.
>
> This series factors out the minimally required bits of StdLib/LibC/Softfloat,
> and copies them into a new library ArmPkg/Library/ArmSoftFloatLib. This 
> library
> dependency is wired into OpenSslLib, and its resolution added to 
> ArmVirt.dsc.inc
>
> Changes since v1:
> - added patch #2, which adds RVCT support to ArmSoftFloatLib
> - remove --fpu=vfpv3 switch from RVCT command line in patch #4
> - reordered patches
> - added RBs from Leif and Laszlo
>
> Ard Biesheuvel (4):
>   ArmPkg: factor out softfloat support from StdLib/LibC/SoftFloat
>   ArmPkg/ArmSoftFloatLib: add support for RVCT
>   ArmVirtPkg: add secure boot support to 32-bit ARM targets
>   CryptoPkg: add softfloat dependency for ARM
>

Thanks everyone

Committed as SVN r19030 .. r19033

-- 
Ard.


>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c  
>  |   34 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c  
>  |   41 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c  
>  |   36 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c  
>  |   41 +
>  ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h   
>  |  345 +++
>  ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf   
>  |   49 +
>  {StdLib/Include/Arm => ArmPkg/Library/ArmSoftFloatLib}/arm-gcc.h 
>  |0
>  {StdLib/LibC/Softfloat => 
> ArmPkg/Library/ArmSoftFloatLib}/bits32/softfloat-macros |0
>  ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c
>  | 2354 
>  {StdLib/Include/Arm => ArmPkg/Library/ArmSoftFloatLib}/milieu.h  
>  |0
>  {StdLib/LibC/Softfloat => 
> ArmPkg/Library/ArmSoftFloatLib}/softfloat-for-gcc.h |0
>  ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize  
>  |  525 +
>  ArmVirtPkg/ArmVirt.dsc.inc   
>  |3 +
>  CryptoPkg/Library/OpensslLib/OpensslLib.inf  
>  |5 +-
>  22 files changed, 3720 insertions(+), 1 deletion(-)
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
>  copy {StdLib/Include/Arm => ArmPkg/Library/ArmSoftFloatLib}/arm-gcc.h (100%)
>  copy {StdLib/LibC/Softfloat => 
> ArmPkg/Library/ArmSoftFloatLib}/bits32/softfloat-macros (100%)
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c
>  copy {StdLib/Include/Arm => ArmPkg/Library/ArmSoftFloatLib}/milieu.h (100%)
>  copy {StdLib/LibC/Softfloat => 
> ArmPkg/Library/ArmSoftFloatLib}/softfloat-for-gcc.h (100%)
>  create mode 100644 ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize
>
> --
> 1.9.1
>
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Re: [edk2] [PATCH 2/2] ArmVirtPkg: Add memory space for the memory nodes except the lowest one

[Ard Biesheuvel]

On 30 November 2015 at 11:01, Laszlo Ersek <ler...@redhat.com> wrote:
> On 11/30/15 10:50, Laszlo Ersek wrote:
>> On 11/30/15 10:28, Ard Biesheuvel wrote:
>>> On 30 November 2015 at 10:22, Shannon Zhao <zhaoshengl...@huawei.com> wrote:
>>>>
>>>>
>>>> On 2015/11/30 16:53, Laszlo Ersek wrote:
>>>>> On 11/29/15 07:31, Shannon Zhao wrote:
>>>>>> From: Shannon Zhao <shannon.z...@linaro.org>
>>>>>>
>>>>>> Here we add the memory space for the memory nodes except the lowest one
>>>>>> in FDT. So these spaces will show up in the UEFI memory map.
>>>>>>
>>>>>> Contributed-under: TianoCore Contribution Agreement 1.0
>>>>>> Signed-off-by: Shannon Zhao <shannon.z...@linaro.org>
>>>>>> ---
>>>>>>  ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.c   | 34 
>>>>>> ++
>>>>>>  ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.inf |  4 
>>>>>>  2 files changed, 38 insertions(+)
>>>>>>
>>>>>> diff --git a/ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.c 
>>>>>> b/ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.c
>>>>>> index 74f80d1..2c8d785 100644
>>>>>> --- a/ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.c
>>>>>> +++ b/ArmVirtPkg/VirtFdtDxe/VirtFdtDxe.c
>>>>>> @@ -27,6 +27,7 @@
>>>>>>  #include 
>>>>>>  #include 
>>>>>>  #include 
>>>>>> +#include 
>>>>>>
>>>>>>  #include 
>>>>>>  #include 
>>>>>> @@ -304,6 +305,8 @@ InitializeVirtFdtDxe (
>>>>>>UINT64 FwCfgDataSize;
>>>>>>UINT64 FwCfgDmaAddress;
>>>>>>UINT64 FwCfgDmaSize;
>>>>>> +  UINT64 CurBase;
>>>>>> +  UINT64 CurSize;
>>>>>>
>>>>>>Hob = GetFirstGuidHob();
>>>>>>if (Hob == NULL || GET_GUID_HOB_DATA_SIZE (Hob) != sizeof (UINT64)) {
>>>>>> @@ -332,6 +335,37 @@ InitializeVirtFdtDxe (
>>>>>>break;
>>>>>>  }
>>>>>>
>>>>>> +//
>>>>>> +// Check for memory node and add the memory spaces expect the 
>>>>>> lowest one
>>>>>> +//
>>>>>
>>>>> (1) Based on the DTB node, which looks like:
>>>>>
>>>>> memory {
>>>>> reg = <0x0 0x4000 0x0 0x800>;
>>>>> device_type = "memory";
>>>>> };
>>>>>
>>>>> I agree that checking it here, before we look at "compatible", is a good
>>>>> thing.
>>>>>
>>>>> However, can you please factor this out into a separate function? (Just
>>>>> within this file, as a STATIC function.)
>>>>>
>>>>> I propose that the function return a BOOLEAN:
>>>>> - TRUE if the node was a match (either successfully or unsuccessfully);
>>>>>   in which case you can "continue;" with the next iteration directly
>>>>> - FALSE, if there is no match (i.e., the current iteration must
>>>>>   proceed, in order to look for different device types)
>>>>>
>>>>
>>>> Sure.
>>>>
>>>>>> +Type = fdt_getprop (DeviceTreeBase, Node, "device_type", );
>>>>>> +if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
>>>>>> +  //
>>>>>> +  // Get the 'reg' property of this node. For now, we will assume
>>>>>> +  // two 8 byte quantities for base and size, respectively.
>>>>>> +  //
>>>>>> +  RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", );
>>>>>> +  if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
>>>>>> +
>>>>>> +CurBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
>>>>>> +CurSize = fdt64_to_cpu (((UINT64 *)RegProp)[1]);
>>>>>> +
>>>>>> +if (FixedPcdGet64 (PcdSystemMemoryBase) != CurBase) {
>>>>>> +  Status = gDS->A

[edk2] [PATCH] BaseTools RVCT: use scatter file to implement minimum section alignment

[Ard Biesheuvel]

Since debugging tools on ARM usually take the ELF image as input, while
the target runs the PE/COFF version, we need to take special care to
ensure that the two look identical in memory.

The minimum section alignment imposed by GenFw is 32 bytes, so introduce
a RVCT scatter file that sets this alignment for the .data section (and
subsequent .bss section. At the same time, set the start offset to 0x220
bytes (which is the size of our 32-bit PE/COFF header) so that the memory
layouts are identical between ELF and PE/COFF.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 BaseTools/Conf/tools_def.template  |  2 +-
 BaseTools/Scripts/Rvct-Align32.sct | 25 
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index db08e252d2b9..4449ddf1b6ec 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -6617,7 +6617,7 @@ RELEASE_XCODE5_X64_CC_FLAGS   = -target 
x86_64-pc-win32-macho -c-Os   -W
 
 DEFINE RVCT_ALL_ASM_FLAGS   = --diag_suppress=1786 --diag_error=warning --apcs 
/interwork
 DEFINE RVCT_ALL_CC_FLAGS= --c90 -c --no_autoinline --asm --gnu --apcs 
/interwork --signed_chars --no_unaligned_access --split_sections --enum_is_int 
--preinclude AutoGen.h --diag_suppress=186 --diag_warning 167 
--diag_error=warning --diag_style=ide --protect_stack
-DEFINE RVCT_ALL_DLINK_FLAGS = --ro-base 0 --no_scanlib --reloc --no_exceptions 
--datacompressor off --strict --symbols --diag_style=ide --no_legacyalign
+DEFINE RVCT_ALL_DLINK_FLAGS = --no_scanlib --no_exceptions --datacompressor 
off --strict --symbols --diag_style=ide --no_legacyalign --scatter 
$(EDK_TOOLS_PATH)/Scripts/Rvct-Align32.sct
 
 

 #
diff --git a/BaseTools/Scripts/Rvct-Align32.sct 
b/BaseTools/Scripts/Rvct-Align32.sct
new file mode 100644
index ..22d3d09c8e94
--- /dev/null
+++ b/BaseTools/Scripts/Rvct-Align32.sct
@@ -0,0 +1,25 @@
+/** @file
+
+  Copyright (c) 2015, Linaro Ltd. All rights reserved.
+
+  This program and the accompanying materials are licensed and made available 
under
+  the terms and conditions of the BSD License that accompanies this 
distribution.
+  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php.
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+REGION 0x0 {
+  ER_RO 0x220 FIXED {
+* (+RO)
+  }
+  ER_RW +0 ALIGN 32 {
+* (+RW)
+  }
+  ER_ZI +0 {
+* (+ZI)
+  }
+}
-- 
1.9.1

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Re: [edk2] Strange behavior of the DS-5 debugger on AARCH64 with step-by-step debugging in uefi

[Ard Biesheuvel]

On 1 December 2015 at 01:24, Vladimir Olovyannikov
<volov...@broadcom.com> wrote:
> Thank you Andrew, Ard.
>
> The problem was my wrong interpretation of the offset in DS-5 for the 
> ShellPkg,
> and therefore wrong entry point arithmetic.
>

OK, thanks for clearing that up.

Regards,
Ard.


>> -Original Message-
>> From: af...@apple.com [mailto:af...@apple.com]
>> Sent: Monday, November 30, 2015 10:02 AM
>> To: Vladimir Olovyannikov
>> Cc: edk2-devel@lists.01.org
>> Subject: Re: [edk2] Strange behavior of the DS-5 debugger on AARCH64 with
>> step-by-step debugging in uefi
>>
>>
>> > On Nov 23, 2015, at 11:31 PM, Ard Biesheuvel <ard.biesheu...@linaro.org>
>> wrote:
>> >
>> > On 24 November 2015 at 00:38, Vladimir Olovyannikov
>> > <volov...@broadcom.com> wrote:
>> >>
>> >>
>> >>> -Original Message-
>> >>> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> >>> Sent: Tuesday, November 10, 2015 10:04 AM
>> >>> To: Vladimir Olovyannikov
>> >>> Cc: Cohen, Eugene; edk2-devel@lists.01.org
>> >>> Subject: Re: [edk2] Strange behavior of the DS-5 debugger on AARCH64
>> with
>> >>> step-by-step debugging in uefi
>> >>>
>> >>> On 10 November 2015 at 18:41, Vladimir Olovyannikov
>> >>> <volov...@broadcom.com> wrote:
>> >>>> Ard,
>> >>>> Many thanks for your help. It works.
>> >>>>
>> >>>
>> >>> Great! Thanks for reporting back.
>> >>>
>> >>>
>> >>>> -Original Message-
>> >>>> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> >>>> Sent: Monday, November 09, 2015 10:31 PM
>> >>>> To: Vladimir Olovyannikov
>> >>>> Cc: Cohen, Eugene; edk2-devel@lists.01.org
>> >>>> Subject: Re: [edk2] Strange behavior of the DS-5 debugger on AARCH64
>> >>> with step-by-step debugging in uefi
>> >>>>
>> >>>> On 9 November 2015 at 19:01, Vladimir Olovyannikov
>> >>>> <volov...@broadcom.com> wrote:
>> >>>>> -Original Message-
>> >>>>> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> >>>>> Sent: Sunday, November 08, 2015 10:52 PM
>> >>>>> To: Vladimir Olovyannikov
>> >>>>> Cc: Cohen, Eugene; edk2-devel@lists.01.org
>> >>>>> Subject: Re: [edk2] Strange behavior of the DS-5 debugger on
>> AARCH64
>> >>> with step-by-step debugging in uefi
>> >>>>>
>> >>>>> On 6 November 2015 at 21:32, Vladimir Olovyannikov
>> >>>>> <volov...@broadcom.com>> wrote:
>> >>>>>>> Hello Ard, Eugene,
>> >>>>>>> Thank you for explanation.
>> >>>>>>>
>> >>>>>>> Ard, I tried the patch, but it cannot be applied to the latest 
>> >>>>>>> (pulled a
>> >>> minute ago, git-svn-id:
>> >>> https://svn.code.sf.net/p/edk2/code/trunk/edk2@18732 6f19259b-
>> 4bc3-
>> >>> 4df7-8a09-765794883524)
>> >>>>>>> tree: all 3 hunks failed. Which commit should I be based on to apply
>> the
>> >>> patch?
>> >>>>>>>
>> >>>>>>> Anyway I found the lines manually and changed them. However,
>> when
>> >>> I try to
>> >>>>>>>
>> >>>>>>> source /uefi/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f
>> >>> (0x8500,0x0028) -m (0x8000,0x4000) -a
>> >>>>>>> I am getting
>> >>>>>>>
>> >>>>>>> ERROR(?): ValueError: need more than 1 value to unpack
>> >>>>>>>  File " /uefi/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py",
>> line
>> >>> 94, in >
>> >>>>>>>armplatform_debugger.load_all_symbols()
>> >>>>>>> ERROR(CMD656):
>> >>>>>>> # in
>> /uefi/BroadcomPlatformPkg/NS2Pkg/Scripts/armpkg_syms.ds:2
>> >>> while executing: source
>> >>> /uefi/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f
>> >>> (0x8500,0x0028) -m (0x8000,0x4000) -a
>> >&

Re: [edk2] Armv8 64bit: System error booting linux from the UEFI

[Ard Biesheuvel]

On 30 November 2015 at 10:39, Michael Zimmermann
<sigmaepsilo...@gmail.com> wrote:
>> Unrelated note: *please* get rid of the ARM BDS and use the Intel BDS
>> instead. The ARM BDS violates the UEFI spec, (i.e., you cannot boot
>> installer images from it without a lot of hassle) and does not allow
>> you to enable UEFI secure boot.
>>
>> Look at the development history of ArmVExpress-FVP-AArch64.dsc for
>> hints how to do this.
>
> To make this easier for other, here is my commit for switching to Intel's
> BDS(my code is based on ArmPlatformPkg/ArmPlatformPkg-2ndstage):
> https://github.com/efidroid/uefi_edk2packages_LittleKernelPkg/commit/dbbf212823046e00db3879c6846d96532f703e30
>
> You may also need dynamic PCD support:
> https://github.com/efidroid/uefi_edk2packages_LittleKernelPkg/commit/673cd3bc2d71bf077e5744d9de1597a356b6d2d5
>

Thanks for sharing that. I hope it will be useful to other.

Since the Intel BDS support is fairly recent, please don't hesitate to
share observations or questions. There may be some issues lurking that
we haven't spotted yet ourselves.

Thanks,
Ard.


> On Tue, Nov 24, 2015 at 8:28 AM, Ard Biesheuvel <ard.biesheu...@linaro.org>
> wrote:
>>
>> On 24 November 2015 at 00:05, Vladimir Olovyannikov
>> <volov...@broadcom.com> wrote:
>> >> -Original Message-
>> >> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> >> Sent: Wednesday, November 18, 2015 11:32 PM
>> >> To: Vladimir Olovyannikov
>> >> Cc: Mark Rutland; edk2-devel@lists.01.org
>> >> Subject: Re: [edk2] Armv8 64bit: System error booting linux from the
>> >> UEFI
>> >>
>> >> On 19 November 2015 at 05:48, Vladimir Olovyannikov
>> >> <volov...@broadcom.com> wrote:
>> >> >
>> >> >
>> > [...]
>> >> > A side note: I got the u-boot source for that board and there are
>> >> > several
>> >> hacks made to avoid SError (writing 0x20 to the HCR register (reroute
>> >> SError
>> >> to EL2), and
>> >> > just ERET from SError exception handler, and then write 0x0 to HCR
>> >> > before
>> >> Linux boots), so it could be an HW issue I am not aware of as of yet.
>> >>
>> >> OK, that would explain it. Note that the kernel will replace the EL2
>> >> vector table if booted at EL2, so this is definitely not a workaround
>> >> that you would want to reuse in UEFI.
>> > [...]
>> >
>> > [...]
>> >> >>
>> >> >> I'd still like to double check the value of VBAR_EL2 as it is
>> >> >> written,
>> >> >> it should be a multiple of 2 KB
>> >> > It is always at 0x85008800 which is a multiple of 2K
>> >> > Any other things to verify?
>> >> >
>> >>
>> >> No, that looks fine. You need to get in touch with the authors of the
>> >> U-Boot code to figure out what it is they are working around. Simply
>> >> ignoring SErrors is obviously not a long term solution.
>> >>
>> > Thanks a lot for your help Ard, Mark,
>> > It is the ATF which has an issue. I will post additional information if
>> > there is still a problem after ATF implementation is fixed
>> >
>>
>> OK.
>> Thanks for reporting back.
>>
>> --
>> Ard.
>> ___
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>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
>
>
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Re: [edk2] [PATCH 1/2] ArmVirtPkg: Find the lowest memory node

[Ard Biesheuvel]

On 29 November 2015 at 07:31, Shannon Zhao  wrote:
> From: Shannon Zhao 
>
> If there are more than one /memory nodes in FDT, it needs to find the
> lowest one, and set PcdSystemMemorySize with thes size of this node.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Shannon Zhao 
> ---
>  ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c | 30 
> 
>  1 file changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c 
> b/ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c
> index 17f2686..7a0fc0e 100644
> --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c
> +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c
> @@ -72,8 +72,8 @@ ArmPlatformInitializeSystemMemory (
>  {
>VOID *DeviceTreeBase;
>INT32Node, Prev;
> -  UINT64   NewBase;
> -  UINT64   NewSize;
> +  UINT64   NewBase, CurBase;
> +  UINT64   NewSize, CurSize;
>CONST CHAR8  *Type;
>INT32Len;
>CONST UINT64 *RegProp;
> @@ -90,7 +90,7 @@ ArmPlatformInitializeSystemMemory (
>ASSERT (fdt_check_header (DeviceTreeBase) == 0);
>
>//
> -  // Look for a memory node
> +  // Look for the lowest memory node
>//
>for (Prev = 0;; Prev = Node) {
>  Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
> @@ -110,26 +110,30 @@ ArmPlatformInitializeSystemMemory (
>RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", );
>if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
>
> -NewBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
> -NewSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
> -
> -//
> -// Make sure the start of DRAM matches our expectation
> -//
> -ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
> -PcdSet64 (PcdSystemMemorySize, NewSize);
> +CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
> +CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
>
>  DEBUG ((EFI_D_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n",
> -   __FUNCTION__, NewBase, NewBase + NewSize - 1));
> +   __FUNCTION__, CurBase, CurBase + CurSize - 1));
> +
> +if (NewBase > CurBase || NewBase == 0) {
> +  NewBase = CurBase;
> +  NewSize = CurSize;
> +}

I wonder if it would not make more sense to search for the memory node
whose base == FixedPcdGet64 (PcdSystemMemoryBase) directly, rather
than find the lowest one and ASSERT() that it is the one we are
looking for.


>} else {
>  DEBUG ((EFI_D_ERROR, "%a: Failed to parse FDT memory node\n",
> __FUNCTION__));
>}
> -  break;
>  }
>}
>
>//
> +  // Make sure the start of DRAM matches our expectation
> +  //
> +  ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
> +  PcdSet64 (PcdSystemMemorySize, NewSize);
> +
> +  //
>// We need to make sure that the machine we are running on has at least
>// 128 MB of memory configured, and is currently executing this binary from
>// NOR flash. This prevents a device tree image in DRAM from getting
> --
> 2.0.4
>
>
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Re: [edk2] [PATCH 2/2] ArmVirtPkg: Add memory space for the memory nodes except the lowest one

[Ard Biesheuvel]

On 30 November 2015 at 12:09, Laszlo Ersek <ler...@redhat.com> wrote:
> On 11/30/15 11:03, Ard Biesheuvel wrote:
[...]
>>
>> Couldn't we simply add EFI_RESOURCE_SYSTEM_MEMORY resource descriptor
>> HOBs the first time we enumerate the nodes?
>
> I didn't suggest it for two reasons.
>
> (1) I recalled that last time we had had a very long discussion about how the 
> DXE core selects the initial range for memory allocations (for its own 
> purposes, primarily). I had trouble remembering all the details now. So there 
> were three options for me:
>
> - recommend the HOBs, and hope for the best, i.e., hope whatever the DXE core 
> picks will be good for us
>
> - recommend the HOBs, and actually review what the DXE core does (it was 
> modified a little bit last time)
>
> - recommend a single HOB (which implies the DXE core gets initialized exactly 
> the same as before, no thinking or code browsing needed), and delay the 
> installation of the addtional ranges until later.
>
> I picked the last option for simplicity.
>
> (2) The other reason is that I don't think that the HOB approach would solve 
> the question of caching attributes. I don't think the DXE core tries to set 
> any attributes on its own when the GCD is primed from the HOBs.
>
> Remember we have
>
> InitializeMemory()  
> [ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c]
>   ArmPlatformInitializeSystemMemory()   
> [ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c]
> PcdSet64 (PcdSystemMemorySize, ...)
>   MemoryPeim()  
> [ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c]
> PcdGet64 (PcdSystemMemorySize)
> BuildResourceDescriptorHob()
> InitMmu()   
> [ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c]
>   ArmPlatformGetVirtualMemoryMap()  
> [ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c]
> PcdGet64 (PcdSystemMemorySize)
>   ArmConfigureMmu() 
> [ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c]
>
> In other words, all of the following happens in the memory init PEIM (which 
> comes from ArmPlatformPkg, but it's plugged chock full of our ArmVirtPkg 
> library instances):
> - the in-DRAM DTB is initially parsed for the memory node
> - the size PCD is set
> - the base PCD is verified
> - a memory descriptor HOB is built, dependent on the PCDs
> - a virtual memory map is built, with caching attributes, dependent on the 
> PCDs
> - the MMU is configured
>
> Therefore we have a nice fast caching setting for the "base" memory node only 
> because you cover it explicitly in ArmPlatformGetVirtualMemoryMap() -- 
> dependent on the PCDs --, not because the DXE core covers it when it 
> processes the HOBs. So if you want to process several memory nodes *for real* 
> in the the memory init PEIM, then not only do you have to create the HOBs 
> there, but also extend the virtual memory map for the MMU similarly. And a 
> fixed count of PCDs won't be enough to carry the information from the DTB to 
> ArmPlatformGetVirtualMemoryMap() -- some loop would have to exist that 
> connects the DTB with the virtual memory map.
>
> This is what I meant in my original response by "having more flexibility in 
> DXE".
>

Yes, that does sound like a lot of work for little gain. But I am not
too crazy about adding more 'A PRIORI' modules, to avoid ending up in
dependency hell later.
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[edk2] [PATCH 03/23] BeagleBoardPkg: remove ArmPlatformGlobalVariableLib resolution

[Ard Biesheuvel]

Remove the ArmPlatformGlobalVariableLib library class resolution now
that BeagleBoardPkg no longer has a transitive dependency on it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 BeagleBoardPkg/BeagleBoardPkg.dsc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
b/BeagleBoardPkg/BeagleBoardPkg.dsc
index 533849228aad..18b031029945 100644
--- a/BeagleBoardPkg/BeagleBoardPkg.dsc
+++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
@@ -132,7 +132,6 @@ [LibraryClasses.common]
 
 [LibraryClasses.common.SEC]
   ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
 
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
@@ -178,7 +177,6 @@ [LibraryClasses.common.DXE_DRIVER]
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
   
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
-- 
1.9.1

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[edk2] [PATCH 10/23] ArmVirtPkg/PrePi: remove global variable allocation from lowlevel init

[Ard Biesheuvel]

Now that we dropped all ArmPlatformGlobalVariableLib dependencies,
there is no longer a need to allocate and clear out the global
variable region in the PrePi init code. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S |  7 -
 ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf |  3 --
 ArmVirtPkg/PrePi/PrePi.c| 33 ++--
 ArmVirtPkg/PrePi/PrePi.h|  1 -
 4 files changed, 2 insertions(+), 42 deletions(-)

diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S 
b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
index f0cf865b3c93..68049d5df2bf 100644
--- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -158,16 +158,10 @@ _GetStackBase:
   cmp   x0, #1
   bne   _PrepareArguments
 
-_ReserveGlobalVariable:
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x0)
-  // InitializePrimaryStack($GlobalVariableSize, $Tmp1, $Tmp2)
-  InitializePrimaryStack(x0, x1, x2)
-
 _PrepareArguments:
   mov   x0, x10
   mov   x1, x11
   mov   x2, x12
-  mov   x3, sp
 
   // Move sec startup address into a data register
   // Ensure we're jumping to FV version of the code (not boot remapped alias)
@@ -177,7 +171,6 @@ _PrepareArguments:
   //x0 = MpId
   //x1 = UefiMemoryBase
   //x2 = StacksBase
-  //x3 = GlobalVariableBase
   blr   x4
 
 _NeverReturn:
diff --git a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf 
b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
index 8a7a67c1b5d3..966f0185bbda 100755
--- a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
+++ b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
@@ -61,7 +61,6 @@ [Ppis]
   gArmMpCoreInfoPpiGuid
 
 [Guids]
-  gArmGlobalVariableGuid
   gArmMpCoreInfoGuid
 
 [FeaturePcd]
@@ -79,8 +78,6 @@ [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
 
-  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
-
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
 
   gArmPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/ArmVirtPkg/PrePi/PrePi.c b/ArmVirtPkg/PrePi/PrePi.c
index fe7612cec74b..c69cff249e80 100755
--- a/ArmVirtPkg/PrePi/PrePi.c
+++ b/ArmVirtPkg/PrePi/PrePi.c
@@ -25,14 +25,10 @@
 #include 
 #include 
 #include 
-#include 
 
 #include "PrePi.h"
 #include "LzmaDecompress.h"
 
-// Not used when PrePi in run in XIP mode
-UINTN mGlobalVariableBase = 0;
-
 EFI_STATUS
 EFIAPI
 ExtractGuidedSectionLibConstructor (
@@ -45,23 +41,6 @@ LzmaDecompressLibConstructor (
   VOID
   );
 
-VOID
-EFIAPI
-BuildGlobalVariableHob (
-  IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,
-  IN UINT32   GlobalVariableSize
-  )
-{
-  ARM_HOB_GLOBAL_VARIABLE  *Hob;
-
-  Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof 
(ARM_HOB_GLOBAL_VARIABLE));
-  ASSERT(Hob != NULL);
-
-  CopyGuid (&(Hob->Header.Name), );
-  Hob->GlobalVariableBase = GlobalVariableBase;
-  Hob->GlobalVariableSize = GlobalVariableSize;
-}
-
 EFI_STATUS
 GetPlatformPpi (
   IN  EFI_GUID  *PpiGuid,
@@ -90,7 +69,6 @@ VOID
 PrePiMain (
   IN  UINTN UefiMemoryBase,
   IN  UINTN StacksBase,
-  IN  UINTN GlobalVariableBase,
   IN  UINT64StartTimeStamp
   )
 {
@@ -133,9 +111,6 @@ PrePiMain (
   StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
   BuildStackHob (StacksBase, StacksSize);
 
-  // Declare the Global Variable HOB
-  BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 
(PcdPeiGlobalVariableSize));
-
   //TODO: Call CpuPei as a library
   BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
 
@@ -174,8 +149,7 @@ VOID
 CEntryPoint (
   IN  UINTN MpId,
   IN  UINTN UefiMemoryBase,
-  IN  UINTN StacksBase,
-  IN  UINTN GlobalVariableBase
+  IN  UINTN StacksBase
   )
 {
   UINT64   StartTimeStamp;
@@ -199,10 +173,7 @@ CEntryPoint (
   // Enable Instruction Caches on all cores.
   ArmEnableInstructionCache ();
 
-  // Define the Global Variable region
-  mGlobalVariableBase = GlobalVariableBase;
-
-  PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
+  PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 
   // DXE Core should always load and never return
   ASSERT (FALSE);
diff --git a/ArmVirtPkg/PrePi/PrePi.h b/ArmVirtPkg/PrePi/PrePi.h
index 15b91e49c9bd..9b828377adc3 100644
--- a/ArmVirtPkg/PrePi/PrePi.h
+++ b/ArmVirtPkg/PrePi/PrePi.h
@@ -41,7 +41,6 @@ VOID
 PrePiMain (
   IN  UINTN UefiMemoryBase,
   IN  UINTN StacksBase,
-  IN  UINTN GlobalVariableBase,
   IN  UINT64 

[edk2] [PATCH 09/23] ArmPlatformPkg: remove all ArmPlatformGlobalVariableLib implementations

[Ard Biesheuvel]

This removes the SEC, PEI and DXE variants of ArmPlatformGlobalVariableLib,
which is no longer used, and should not be used since it violates the PI
spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h  
 |  38 ---
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
   |  76 --
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
 |  44 
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
   |  84 ---
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
 |  40 
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
   | 107 
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
 |  44 
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.c
   |  81 ---
 
ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf
 |  39 ---
 9 files changed, 553 deletions(-)

diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h 
b/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h
deleted file mode 100644
index b1a080c00aa2..
--- a/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD 
License
-*  which accompanies this distribution.  The full text of the license may be 
found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-*
-**/
-
-#ifndef __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
-#define __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN VariableOffset,
-  IN  UINTN VariableSize,
-  OUT VOID* Variable
-  );
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN VariableOffset,
-  IN  UINTN VariableSize,
-  OUT VOID* Variable
-  );
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN VariableOffset
-  );
-
-#endif
-
diff --git 
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
 
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
deleted file mode 100644
index 511d0f69de60..
--- 
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD 
License
-*  which accompanies this distribution.  The full text of the license may be 
found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-*
-**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-UINTN  mGlobalVariableBase = 0;
-
-RETURN_STATUS
-EFIAPI
-ArmPlatformGlobalVariableConstructor (
-  VOID
-  )
-{
-  ARM_HOB_GLOBAL_VARIABLE  *Hob;
-
-  Hob = GetFirstGuidHob ();
-  ASSERT (Hob != NULL);
-
-  mGlobalVariableBase = Hob->GlobalVariableBase;
-
-  return EFI_SUCCESS;
-}
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN VariableOffset,
-  IN  UINTN VariableSize,
-  OUT VOID* Variable
-  )
-{
-  if (mGlobalVariableBase == 0) {
-ArmPlatformGlobalVariableConstructor ();
-  }
-
-  CopyMem (Variable, (VOID*)(mGlobalVariableBase + VariableOffset), 
VariableSize);
-}
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN VariableOffset,
-  IN  UINTN VariableSize,
-  OUT VOID* Variable
-  )
-{
-  if (mGlobalVariableBase == 0) {
-ArmPlatformGlobalVariableConstructor ();
-  }
-
-  CopyMem ((VOID*)(mGlobalVariableBase + VariableOffset), Variable, 
VariableSize);
-}
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN VariableOffset
-  )
-{
-  return (VOID*)(mGlobalVariableBase + VariableOffset);
-}
diff --git 
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
 
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
deleted file mode 100644
index e90d6a5811c3..

[edk2] [PATCH 11/23] ArmPlatformPkg/PrePi: remove global variable allocation from lowlevel init

[Ard Biesheuvel]

Now that we dropped all ArmPlatformGlobalVariableLib dependencies,
there is no longer a need to allocate and clear out the global
variable region in the PrePi init code. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S |  7 -
 ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S |  6 
 ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm   |  7 -
 ArmPlatformPkg/PrePi/MainMPCore.c   |  3 +-
 ArmPlatformPkg/PrePi/MainUniCore.c  |  3 +-
 ArmPlatformPkg/PrePi/PeiMPCore.inf  |  3 --
 ArmPlatformPkg/PrePi/PeiUniCore.inf |  3 --
 ArmPlatformPkg/PrePi/PrePi.c| 31 ++--
 ArmPlatformPkg/PrePi/PrePi.h|  2 --
 9 files changed, 4 insertions(+), 61 deletions(-)

diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S 
b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
index 0d0e3e17c170..f63fd44067fc 100644
--- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -133,16 +133,10 @@ _GetStackBase:
   cmp   x0, #1
   bne   _PrepareArguments
 
-_ReserveGlobalVariable:
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x0)
-  // InitializePrimaryStack($GlobalVariableSize, $Tmp1, $Tmp2)
-  InitializePrimaryStack(x0, x1, x2)
-
 _PrepareArguments:
   mov   x0, x10
   mov   x1, x11
   mov   x2, x12
-  mov   x3, sp
 
   // Move sec startup address into a data register
   // Ensure we're jumping to FV version of the code (not boot remapped alias)
@@ -152,7 +146,6 @@ _PrepareArguments:
   //x0 = MpId
   //x1 = UefiMemoryBase
   //x2 = StacksBase
-  //x3 = GlobalVariableBase
   blr   x4
 
 _NeverReturn:
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S 
b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
index f64934480ff4..1311efc5cb2c 100644
--- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -141,11 +141,6 @@ _GetStackBase:
   cmp   r0, #1
   bne   _PrepareArguments
 
-_ReserveGlobalVariable:
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)
-  // InitializePrimaryStack($GlobalVariableSize, $Tmp1)
-  InitializePrimaryStack(r0, r1)
-
 _PrepareArguments:
   mov   r0, r8
   mov   r1, r9
@@ -160,7 +155,6 @@ _PrepareArguments:
   //r0 = MpId
   //r1 = UefiMemoryBase
   //r2 = StacksBase
-  //r3 = GlobalVariableBase
   blx   r4
 
 _NeverReturn:
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm 
b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
index f73c56850d99..a20e3fde0bda 100644
--- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
@@ -143,16 +143,10 @@ _GetStackBase
   cmp   r0, #1
   bne   _PrepareArguments
 
-_ReserveGlobalVariable
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)
-  // InitializePrimaryStack($GlobalVariableSize, $Tmp1)
-  InitializePrimaryStack r0, r1
-
 _PrepareArguments
   mov   r0, r8
   mov   r1, r9
   mov   r2, r10
-  mov   r3, sp
 
   // Move sec startup address into a data register
   // Ensure we're jumping to FV version of the code (not boot remapped alias)
@@ -162,7 +156,6 @@ _PrepareArguments
   //r0 = MpId
   //r1 = UefiMemoryBase
   //r2 = StacksBase
-  //r3 = GlobalVariableBase
   blx   r4
 
 _NeverReturn
diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c 
b/ArmPlatformPkg/PrePi/MainMPCore.c
index bf813730d341..603f4bb8be3f 100644
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -22,7 +22,6 @@ VOID
 PrimaryMain (
   IN  UINTN UefiMemoryBase,
   IN  UINTN StacksBase,
-  IN  UINTN GlobalVariableBase,
   IN  UINT64StartTimeStamp
   )
 {
@@ -35,7 +34,7 @@ PrimaryMain (
 ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), 
ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
   }
 
-  PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
+  PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 
   // We must never return
   ASSERT(FALSE);
diff --git a/ArmPlatformPkg/PrePi/MainUniCore.c 
b/ArmPlatformPkg/PrePi/MainUniCore.c
index 43588a50ddb5..49b02338ebc2 100644
--- a/ArmPlatformPkg/PrePi/MainUniCore.c
+++ b/ArmPlatformPkg/PrePi/MainUniCore.c
@@ -18,7 +18,6 @@ VOID
 PrimaryMain (
   IN  UINTN UefiMemoryBase,
   IN  UINTN StacksBase,
-  IN  UINTN GlobalVariableBase,
   IN  UINT64StartTimeStamp
   )
 {
@@ -27,7 +26,7 @@ PrimaryMain (
 ASSERT(ArmIsMpCore() == 0);
   DEBUG_CODE_END();
 
-  PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
+  PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 
   // We must never return
   ASSERT(FALSE);
diff

[edk2] [PATCH 04/23] ArmVirtPkg/ArmVirtQemu: move to ArmPkg version of PeiServicesTablePointerLib

[Ard Biesheuvel]

As pointed out by Eugene, the ArmPlatformPkg implementation of
PeiServicesTablePointerLib violates the PI sec, since it uses
ArmPlatformGlobalVariableLib to store the PEI services table pointer
rather than the thread ID cpu registers as the spec requires.

So instead, move to the ArmPkg version of this library, which does
adhere to the PI spec.

Reported-by: Eugene Cohen <eug...@hp.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/ArmVirt.dsc.inc | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 8626919f3a2c..b3066d298009 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -156,7 +156,7 @@ [LibraryClasses.common.SEC]
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
   PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
 
 [LibraryClasses.common.PEI_CORE]
@@ -173,7 +173,7 @@ [LibraryClasses.common.PEI_CORE]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
 
 [LibraryClasses.common.PEIM]
@@ -191,7 +191,7 @@ [LibraryClasses.common.PEIM]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
 
 [LibraryClasses.common.DXE_CORE]
-- 
1.9.1

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[edk2] [PATCH 01/23] ArmPlatformPkg/PrePiHobListPointerLib: use thread ID register

[Ard Biesheuvel]

This updates the PrePiHobListPointerLib implementation in ArmPlatformPkg
to move away from ArmPlatformGlobalVariableLib and instead use the thread
ID CPU registers (TPIDRURW and TPIDR_EL0 for v7 and v8, respectively)
for storing the HobList pointer.

Since PrePiHobListPointerLib is specific to PrePi (where PEI core is skipped)
we can share these registers with the PEI services table pointer. By the
same reasoning, the PEI services table pointer and the HobList pointer
already shared the same offset in the ArmPlatformGlobalVariable array.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmPlatformPkg.dec|  3 
++-
 ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c  | 12 
+++-
 ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf |  7 
++-
 3 files changed, 7 insertions(+), 15 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 45aeaeee75f9..cb95516881c7 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -87,7 +87,8 @@ [PcdsFixedAtBuild.common]
   # PeiServicePtr and HobListPtr shares the same location in the PEI Global 
Variable list
   # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI 
Core is skipped.
   gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x0017
-  gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x0018
+  ## TO BE REMOVED
+  ## gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x0018
 
   # Size to reserve in the primary core stack for SEC Global Variables
   gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x0|UINT32|0x0031
diff --git 
a/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c 
b/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c
index 8932e1004970..23e366db2fab 100755
--- a/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c
+++ b/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointer.c
@@ -13,10 +13,9 @@
 **/
 
 #include 
-#include 
+#include 
 #include 
 #include 
-#include 
 
 /**
   Returns the pointer to the HOB list.
@@ -32,11 +31,7 @@ PrePeiGetHobList (
   VOID
   )
 {
-  VOID* HobList;
-
-  ArmPlatformGetGlobalVariable (PcdGet32 (PcdHobListPtrGlobalOffset), 
sizeof(VOID*), );
-
-  return HobList;
+  return (VOID *)ArmReadTpidrurw();
 }
 
 
@@ -53,8 +48,7 @@ PrePeiSetHobList (
   IN  VOID  *HobList
   )
 {
-  ArmPlatformSetGlobalVariable (PcdGet32 (PcdHobListPtrGlobalOffset), 
sizeof(VOID*), );
+  ArmWriteTpidrurw((UINTN)HobList);
 
   return EFI_SUCCESS;
 }
-
diff --git 
a/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf 
b/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
index 16b201e8f6f0..0b98f6ffda8b 100755
--- a/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+++ b/ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
@@ -25,11 +25,8 @@ [Sources]
 
 [Packages]
   MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
+  ArmPkg/ArmPkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
 
 [LibraryClasses]
-  ArmPlatformGlobalVariableLib
-
-[FixedPcd.common]
-  gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset
+  ArmLib
-- 
1.9.1

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[edk2] [PATCH 08/23] ArmPlatformPkg: remove PeiServicesTablePointerLib implementation

[Ard Biesheuvel]

This removes the PeiServicesTablePointerLib implementation under
ArmPlatformPkg that violates the PI spec, and hence should not be
used. Instead, the implementation that resides under ArmPkg should
be used.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmPlatformPkg.dec  
  |  3 +-
 ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
  | 91 
 
ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 | 44 --
 3 files changed, 2 insertions(+), 136 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index cb95516881c7..8147db982727 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -86,7 +86,8 @@ [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x0016
   # PeiServicePtr and HobListPtr shares the same location in the PEI Global 
Variable list
   # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI 
Core is skipped.
-  gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x0017
+  ## TO BE REMOVED
+  ## 
ArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x0017
   ## TO BE REMOVED
   ## gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x0018
 
diff --git 
a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c 
b/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
deleted file mode 100644
index 5c241fa59e3d..
--- 
a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/** @file
-  PEI Services Table Pointer Library.
-
-  This library is used for PEIM which does executed from flash device directly 
but
-  executed in memory.
-
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD 
License
-  which accompanies this distribution.  The full text of the license may be 
found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-/**
-  Caches a pointer PEI Services Table.
-
-  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
-  in a platform specific manner.
-
-  If PeiServicesTablePointer is NULL, then ASSERT().
-
-  @paramPeiServicesTablePointer   The address of PeiServices pointer.
-**/
-VOID
-EFIAPI
-SetPeiServicesTablePointer (
-  IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer
-  )
-{
-  ASSERT (PeiServicesTablePointer != NULL);
-
-  ArmPlatformSetGlobalVariable (PcdGet32 (PcdPeiServicePtrGlobalOffset), 
sizeof(EFI_PEI_SERVICES **), );
-}
-
-/**
-  Retrieves the cached value of the PEI Services Table pointer.
-
-  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
-  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
-  Initialization Core Interface Specification.
-
-  If the cached PEI Services Table pointer is NULL, then ASSERT().
-
-  @return  The pointer to PeiServices.
-
-**/
-CONST EFI_PEI_SERVICES**
-EFIAPI
-GetPeiServicesTablePointer (
-  VOID
-  )
-{
-  EFI_PEI_SERVICES **PeiServicesTablePointer;
-
-  ArmPlatformGetGlobalVariable (PcdGet32 (PcdPeiServicePtrGlobalOffset), 
sizeof(EFI_PEI_SERVICES **), );
-
-  return (CONST EFI_PEI_SERVICES**)PeiServicesTablePointer;
-}
-
-/**
-  Perform CPU specific actions required to migrate the PEI Services Table
-  pointer from temporary RAM to permanent RAM.
-
-  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
-  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
-  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-  a dedicated CPU register.  This means that there is no memory storage
-  associated with storing the PEI Services Table pointer, so no additional
-  migration actions are required for Itanium or ARM CPUs.
-
-**/
-VOID
-EFIAPI
-MigratePeiServicesTablePointer (
-  VOID
-  )
-{
-  return;
-}
diff --git 
a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
b/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
deleted file mode 100644
index 307cec844318..
--- 
a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+++ /dev/null
@@ -1,44 +

[edk2] [PATCH 07/23] ArmPlatformPkg: drop ArmPlatformGlobalVariableLib resolutions

[Ard Biesheuvel]

We can remove all mention of ArmPlatformGlobalVariableLib now that
there are no remaining [transitive] dependencies on it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc | 5 +
 ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc| 3 ---
 ArmPlatformPkg/ArmPlatformPkg.dsc | 9 +
 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc| 1 -
 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc | 6 +-
 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc | 6 +-
 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc | 4 
 7 files changed, 4 insertions(+), 30 deletions(-)

diff --git a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc 
b/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc
index f5af4267fee6..e2f9e32fa76c 100644
--- a/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc
+++ b/ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc
@@ -188,10 +188,7 @@ [Components.common]
   #
   # PEI Phase modules
   #
-  ArmPlatformPkg/PrePi/PeiMPCore.inf {
-
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
-  }
+  ArmPlatformPkg/PrePi/PeiMPCore.inf
 
   #
   # DXE
diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc 
b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
index dc21286e2b27..45d7427b780e 100644
--- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
@@ -129,8 +129,6 @@ [LibraryClasses.AARCH64]
   ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
 
 [LibraryClasses.common.SEC]
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
-
   
ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
   
DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
   
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
@@ -164,7 +162,6 @@ [LibraryClasses.common.DXE_DRIVER]
   
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   
UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc 
b/ArmPlatformPkg/ArmPlatformPkg.dsc
index 79004547bc56..bacd10f3cf5f 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg.dsc
@@ -134,7 +134,6 @@ [LibraryClasses.common.SEC]
   
ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf
 
   
ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf
 
   
DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
   
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
@@ -162,7 +161,6 @@ [LibraryClasses.common.PEI_CORE]
   
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
   
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
 [LibraryClasses.common.PEIM]
@@ -178,7 +176,6 @@ [LibraryClasses.common.PEIM]
   
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
   
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
 
@@ -198,7 +195,6 @@ [LibraryClasses.common.DXE_DRIVER]
   
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/L

[edk2] [PATCH 12/23] ArmPlatformPkg/PlatformPeim: remove ArmGlobalVariable lowlevel init

[Ard Biesheuvel]

Now that we dropped all ArmPlatformGlobalVariableLib dependencies,
there is no longer a need to query the ArmGlobalVariable PPI and install
the ArmGlobalVariable HOB. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/PlatformPei/PlatformPeim.c   | 33 
 ArmPlatformPkg/PlatformPei/PlatformPeim.inf |  6 
 2 files changed, 39 deletions(-)

diff --git a/ArmPlatformPkg/PlatformPei/PlatformPeim.c 
b/ArmPlatformPkg/PlatformPei/PlatformPeim.c
index 58ecb31ec2fc..e4535250c245 100755
--- a/ArmPlatformPkg/PlatformPei/PlatformPeim.c
+++ b/ArmPlatformPkg/PlatformPei/PlatformPeim.c
@@ -17,7 +17,6 @@
 //
 // The protocols, PPI and GUID defintions for this module
 //
-#include 
 #include 
 #include 
 #include 
@@ -32,8 +31,6 @@
 #include 
 #include 
 
-#include 
-
 EFI_STATUS
 EFIAPI
 InitializePlatformPeim (
@@ -62,24 +59,6 @@ CONST EFI_PEI_PPI_DESCRIPTOR  mPpiListRecoveryBootMode = {
   NULL
 };
 
-VOID
-EFIAPI
-BuildGlobalVariableHob (
-  IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,
-  IN UINT32   GlobalVariableSize
-  )
-{
-  EFI_STATUSStatus;
-  ARM_HOB_GLOBAL_VARIABLE   *Hob;
-
-  Status = PeiServicesCreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof 
(ARM_HOB_GLOBAL_VARIABLE), (VOID**));
-  if (!EFI_ERROR(Status)) {
-CopyGuid (&(Hob->Header.Name), );
-Hob->GlobalVariableBase = GlobalVariableBase;
-Hob->GlobalVariableSize = GlobalVariableSize;
-  }
-}
-
 /*++
 
 Routine Description:
@@ -105,23 +84,11 @@ InitializePlatformPeim (
 {
   EFI_STATUSStatus;
   UINTN BootMode;
-  ARM_GLOBAL_VARIABLE_PPI   *ArmGlobalVariablePpi;
-  EFI_PHYSICAL_ADDRESS  GlobalVariableBase;
 
   DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Platform PEIM Loaded\n"));
 
   PlatformPeim ();
 
-  Status = PeiServicesLocatePpi (, 0, NULL, 
(VOID**));
-  if (!EFI_ERROR(Status)) {
-Status = ArmGlobalVariablePpi->GetGlobalVariableMemory 
();
-
-if (!EFI_ERROR(Status)) {
-  // Declare the Global Variable HOB
-  BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 
(PcdPeiGlobalVariableSize));
-}
-  }
-
   BootMode  = ArmPlatformGetBootMode ();
   Status= (**PeiServices).SetBootMode (PeiServices, (UINT8) BootMode);
   ASSERT_EFI_ERROR (Status);
diff --git a/ArmPlatformPkg/PlatformPei/PlatformPeim.inf 
b/ArmPlatformPkg/PlatformPei/PlatformPeim.inf
index 3822b093503b..f466c1412ad3 100755
--- a/ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+++ b/ArmPlatformPkg/PlatformPei/PlatformPeim.inf
@@ -47,10 +47,6 @@ [LibraryClasses]
 [Ppis]
   gEfiPeiMasterBootModePpiGuid  # PPI ALWAYS_PRODUCED
   gEfiPeiBootInRecoveryModePpiGuid  # PPI SOMETIMES_PRODUCED
-  gArmGlobalVariablePpiGuid
-
-[Guids]
-  gArmGlobalVariableGuid
 
 [FixedPcd]
   gArmTokenSpaceGuid.PcdFdBaseAddress
@@ -62,8 +58,6 @@ [FixedPcd]
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
 
-  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
-
 [Depex]
   TRUE
 
-- 
1.9.1

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[edk2] [PATCH 13/23] ArmPlatformPkg/PrePeiCore: remove global variable allocation from lowlevel init

[Ard Biesheuvel]

Now that we dropped all ArmPlatformGlobalVariableLib dependencies,
there is no longer a need to allocate and clear out the global
variable region in the PrePeiCore init code. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S |  7 +-
 ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S |  7 +-
 ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm   |  7 +-
 ArmPlatformPkg/PrePeiCore/PrePeiCore.c   | 23 

 ArmPlatformPkg/PrePeiCore/PrePeiCore.h   |  5 -
 ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf   |  3 ---
 ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf  |  3 ---
 7 files changed, 3 insertions(+), 52 deletions(-)

diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S 
b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
index b84190cf3fd4..85d3450f62e4 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
@@ -101,10 +101,5 @@ _PrepareArguments:
   blr   x3
 
 _SetupPrimaryCoreStack:
-  // x1 contains the top of the primary stack
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x2)
-
-  // The reserved space for global variable must be 16-bytes aligned for 
pushing
-  // 128-bit variable on the stack
-  SetPrimaryStack (x1, x2, x3, x4)
+  mov   sp, x1
   b _PrepareArguments
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S 
b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
index a6f19aff0f8e..ba1bd09b67c7 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
+++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
@@ -82,12 +82,7 @@ _PrepareArguments:
   blx   r3
 
 _SetupPrimaryCoreStack:
-  // r1 contains the top of the primary stack
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
-
-  // The reserved space for global variable must be 8-bytes aligned for pushing
-  // 64-bit variable on the stack
-  SetPrimaryStack (r1, r2, r3)
+  mov   sp, r1
   b _PrepareArguments
 
 _NeverReturn:
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm 
b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
index edf479ff43e5..c316379f0538 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
+++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
@@ -84,12 +84,7 @@ _PrepareArguments
   blx   r3
 
 _SetupPrimaryCoreStack
-  // r1 contains the top of the primary stack
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
-
-  // The reserved space for global variable must be 8-bytes aligned for pushing
-  // 64-bit variable on the stack
-  SetPrimaryStack (r1, r2, r3)
+  mov   sp, r1
   b _PrepareArguments
 
 _NeverReturn
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c 
b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 491d7a6f851f..65b07b6d8941 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -17,23 +17,15 @@
 #include 
 #include 
 
-#include 
-
 #include "PrePeiCore.h"
 
 CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mTemporaryRamSupportPpi = { 
PrePeiCoreTemporaryRamSupport };
-CONST ARM_GLOBAL_VARIABLE_PPI mGlobalVariablePpi = { 
PrePeiCoreGetGlobalVariableMemory };
 
 CONST EFI_PEI_PPI_DESCRIPTOR  gCommonPpiTable[] = {
   {
 EFI_PEI_PPI_DESCRIPTOR_PPI,
 ,
 (VOID *) 
-  },
-  {
-EFI_PEI_PPI_DESCRIPTOR_PPI,
-,
-(VOID *) 
   }
 };
 
@@ -146,18 +138,3 @@ PrePeiCoreTemporaryRamSupport (
 
   return EFI_SUCCESS;
 }
-
-EFI_STATUS
-PrePeiCoreGetGlobalVariableMemory (
-  OUT EFI_PHYSICAL_ADDRESS*GlobalVariableBase
-  )
-{
-  ASSERT (GlobalVariableBase != NULL);
-
-  *GlobalVariableBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) +
-(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
-(UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
-
-  return EFI_SUCCESS;
-}
-
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.h 
b/ArmPlatformPkg/PrePeiCore/PrePeiCore.h
index 20684e2f904c..160894620ce4 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.h
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.h
@@ -40,11 +40,6 @@ PrePeiCoreTemporaryRamSupport (
   IN UINTNCopySize
   );
 
-EFI_STATUS
-PrePeiCoreGetGlobalVariableMemory (
-  OUT EFI_PHYSICAL_ADDRESS*GlobalVariableBase
-  );
-
 VOID
 SecSwitchStack (
   INTNStackDelta
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf 
b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
index 5ba0231a3e4b..ecdbccb8d620 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
@@ -59,7 +59,6 @@ [LibraryClasses]
 
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid
-  gArmGlobalVariablePpiGuid
   gArmMpCoreInfoPpiGuid
 
 [FeaturePcd

[edk2] [PATCH 20/23] ArmPlatformPkg/EblCmdLib: drop bogus ArmGlobalVariableHob.h include

[Ard Biesheuvel]

EblCmdLib does not use anything that is declared by ArmGlobalVariableHob.h,
so remove the include.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/Library/EblCmdLib/EblCmdFdt.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ArmPlatformPkg/Library/EblCmdLib/EblCmdFdt.c 
b/ArmPlatformPkg/Library/EblCmdLib/EblCmdFdt.c
index 8aae7b2c4e08..b0f6a72ee22d 100644
--- a/ArmPlatformPkg/Library/EblCmdLib/EblCmdFdt.c
+++ b/ArmPlatformPkg/Library/EblCmdLib/EblCmdFdt.c
@@ -26,7 +26,6 @@
 
 #include 
 
-#include 
 #include 
 
 #include 
-- 
1.9.1

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[edk2] [PATCH 18/23] ArmPlatformPkg/ArmJunoDxe: drop bogus gArmGlobalVariableGuid dependency

[Ard Biesheuvel]

ArmJunoDxe does not use gArmGlobalVariableGuid so drop the declaration
from the .inf.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf 
b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
index 6157f9807faf..d1f2f7bada95 100644
--- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
+++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf
@@ -52,7 +52,6 @@ [LibraryClasses]
   UefiDriverEntryPoint
 
 [Guids]
-  gArmGlobalVariableGuid
   gEfiEndOfDxeEventGroupGuid
   gEfiFileInfoGuid
 
-- 
1.9.1

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[edk2] [PATCH 06/23] ArmPlatformPkg: move to ArmPkg version of PeiServicesTablePointerLib

[Ard Biesheuvel]

As pointed out by Eugene, the ArmPlatformPkg implementation of
PeiServicesTablePointerLib violates the PI sec, since it uses
ArmPlatformGlobalVariableLib to store the PEI services table pointer
rather than the thread ID cpu registers as the spec requires.

So instead, move to the ArmPkg version of this library, which does
adhere to the PI spec.

Reported-by: Eugene Cohen <eug...@hp.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmPlatformPkg.dsc | 4 ++--
 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc 
b/ArmPlatformPkg/ArmPlatformPkg.dsc
index 5b857e57af40..79004547bc56 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg.dsc
@@ -163,7 +163,7 @@ [LibraryClasses.common.PEI_CORE]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
 [LibraryClasses.common.PEIM]
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@@ -179,7 +179,7 @@ [LibraryClasses.common.PEIM]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
 
 [LibraryClasses.common.DXE_CORE]
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc 
b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
index 4fce05b1bf3b..f47e21d282e5 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
@@ -193,7 +193,7 @@ [LibraryClasses.common.PEI_CORE]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
 [LibraryClasses.common.PEIM]
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@@ -209,7 +209,7 @@ [LibraryClasses.common.PEIM]
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
   
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  
PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
 [LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
   MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
-- 
1.9.1

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[edk2] [PATCH 15/23] EmbeddedPkg/AndroidFastboot: drop bogus gArmGlobalVariableGuid dependency

[Ard Biesheuvel]

This application lists gArmGlobalVariableGuid as a dependency, but
does not actually need it. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf   | 3 ---
 EmbeddedPkg/Application/AndroidFastboot/Arm/BootAndroidBootImg.c | 2 --
 2 files changed, 5 deletions(-)

diff --git a/EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf 
b/EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
index ca17af846627..3e115171ce01 100644
--- a/EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
+++ b/EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
@@ -56,6 +56,3 @@ [Packages]
 [Packages.ARM, Packages.AARCH64]
   ArmPkg/ArmPkg.dec
   ArmPlatformPkg/ArmPlatformPkg.dec
-
-[Guids.ARM, Guids.AARCH64]
-  gArmGlobalVariableGuid
diff --git a/EmbeddedPkg/Application/AndroidFastboot/Arm/BootAndroidBootImg.c 
b/EmbeddedPkg/Application/AndroidFastboot/Arm/BootAndroidBootImg.c
index 3053cf06873e..acedd3e0e3cd 100644
--- a/EmbeddedPkg/Application/AndroidFastboot/Arm/BootAndroidBootImg.c
+++ b/EmbeddedPkg/Application/AndroidFastboot/Arm/BootAndroidBootImg.c
@@ -21,8 +21,6 @@
 #include 
 #include 
 
-#include 
-
 #define LINUX_LOADER_COMMAND_LINE   L"%s -f %s -c %s"
 
 // This GUID is defined in the INGF file of ArmPkg/Application/LinuxLoader
-- 
1.9.1

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[edk2] [PATCH 19/23] ArmPlatformPkg/ArmVExpressFastBootDxe: drop bogus gArmGlobalVariableGuid dep

[Ard Biesheuvel]

ArmVExpressFastBootDxe does not use gArmGlobalVariableGuid so drop
the declaration from the .inf.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 
ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf 
| 3 ---
 1 file changed, 3 deletions(-)

diff --git 
a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf
 
b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf
index 468f5a479998..70cf04f4bd66 100644
--- 
a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf
+++ 
b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBootDxe.inf
@@ -46,9 +46,6 @@ [Packages]
   ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
   ArmPkg/ArmPkg.dec
 
-[Guids]
-  gArmGlobalVariableGuid
-
 [Pcd]
   gArmVExpressTokenSpaceGuid.PcdAndroidFastbootNvmDevicePath
   gArmPlatformTokenSpaceGuid.PcdFirmwareVendor
-- 
1.9.1

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[edk2] [PATCH 16/23] ArmPkg/BdsLib: drop bogus gArmGlobalVariableGuid dependency

[Ard Biesheuvel]

The BdsLib implementation under ArmPkg never references
gArmGlobalVariableGuid so it should not list it as a dependency.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/BdsLib/BdsLib.inf | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ArmPkg/Library/BdsLib/BdsLib.inf b/ArmPkg/Library/BdsLib/BdsLib.inf
index eb4543eb2018..458fc66ff026 100644
--- a/ArmPkg/Library/BdsLib/BdsLib.inf
+++ b/ArmPkg/Library/BdsLib/BdsLib.inf
@@ -44,7 +44,6 @@ [LibraryClasses]
 
 [Guids]
   gEfiFileInfoGuid
-  gArmGlobalVariableGuid
 
 [Protocols]
   gEfiBdsArchProtocolGuid
-- 
1.9.1

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[edk2] [PATCH 02/23] ArmPkg: remove ArmPlatformGlobalVariableLib resolution from ArmPkg.dsc

[Ard Biesheuvel]

ArmPkg does not depend on ArmPlatformGlobalVariableLib, and this library
is about to be removed, so remove all mention of it from ArmPkg.dsc.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/ArmPkg.dsc | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 1237eed65953..688244bd7c53 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -98,9 +98,6 @@ [LibraryClasses.common.PEIM]
   PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
   
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
-[LibraryClasses.common.DXE_DRIVER]
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
-
 [LibraryClasses.ARM, LibraryClasses.AARCH64]
   NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
 
-- 
1.9.1

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[edk2] [PATCH 14/23] ArmPlatformPkg/Sec: remove global variable allocation from lowlevel init

[Ard Biesheuvel]

Now that we dropped all ArmPlatformGlobalVariableLib dependencies,
there is no longer a need to allocate and clear out the global
variable region in the PrePi init code. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S | 6 +-
 ArmPlatformPkg/Sec/Arm/SecEntryPoint.S | 6 +-
 ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm   | 6 +-
 ArmPlatformPkg/Sec/Sec.inf | 2 --
 4 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S 
b/ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S
index 3512ccd84dd2..000b56f573e5 100644
--- a/ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/AArch64/SecEntryPoint.S
@@ -99,11 +99,7 @@ _SetupPrimaryCoreStack:
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
   add   x1, x1, x2
 
-  LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), x2)
-
-  // The reserved space for global variable must be 8-bytes aligned for pushing
-  // 64-bit variable on the stack
-  SetPrimaryStack (x1, x2, x3, x4)
+  mov   sp, x1
   b _PrepareArguments
 
 _SetupSecondaryCoreStack:
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S 
b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
index 51b91b965d8b..73c264810e66 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
@@ -81,11 +81,7 @@ _SetupPrimaryCoreStack:
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
   add   r1, r1, r2
 
-  LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
-
-  // The reserved space for global variable must be 8-bytes aligned for pushing
-  // 64-bit variable on the stack
-  SetPrimaryStack (r1, r2, r3)
+  mov   sp, r1
   b _PrepareArguments
 
 _SetupSecondaryCoreStack:
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm 
b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
index b30fab2141fe..c0cd41069991 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
@@ -83,11 +83,7 @@ _SetupPrimaryCoreStack
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
   add   r1, r1, r2
 
-  LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
-
-  // The reserved space for global variable must be 8-bytes aligned for pushing
-  // 64-bit variable on the stack
-  SetPrimaryStack (r1, r2, r3)
+  mov   sp, r1
   b _PrepareArguments
 
 _SetupSecondaryCoreStack
diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf
index 7c6e7ffba1c6..7f7243f98f77 100644
--- a/ArmPlatformPkg/Sec/Sec.inf
+++ b/ArmPlatformPkg/Sec/Sec.inf
@@ -81,7 +81,5 @@ [FixedPcd.common]
   gArmTokenSpaceGuid.PcdGicDistributorBase
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
 
-  gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize
-
 [FixedPcd.ARM]
   gArmTokenSpaceGuid.PcdArmNsacr
-- 
1.9.1

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[edk2] [PATCH 22/23] ArmPlatformPkg: remove ArmGlobalVariable PCD, GUID and PPI definitions

[Ard Biesheuvel]

Now that we removed all references to the ArmGlobalVariable definitions
in the various lowlevel PrePi and PrePeiCore init routines, and removed
the PPI and HOB references from PlatformPeim, it is time to say goodbye
to ArmGlobalVariable. So remove the includes and the .DEC declarations.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmPlatformPkg.dec  | 20 ---
 ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h | 51 --
 ArmPlatformPkg/Include/Ppi/ArmGlobalVariable.h | 55 
 3 files changed, 126 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 8147db982727..e881c13439e4 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -38,15 +38,8 @@ [Guids.common]
   #
   gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 
0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
 
-  ## Include/Guid/ArmGlobalVariableHob.h
-  gArmGlobalVariableGuid  = { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 
0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} }
-
   gArmBootMonFsFileInfoGuid   = { 0x41e26b9c, 0xada6, 0x45b3, { 0x80, 0x8e, 
0x23, 0x57, 0xa3, 0x5b, 0x60, 0xd6 } }
 
-[Ppis]
-  ## Include/Ppi/ArmGlobalVariable.h
-  gArmGlobalVariablePpiGuid = { 0xab1c1816, 0xd542, 0x4e6f, {0x9b, 0x1e, 0x8e, 
0xcd, 0x92, 0x53, 0xe2, 0xe7} }
-
 [PcdsFeatureFlag.common]
   # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is 
mapped at 0x0.
   gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x0012
@@ -81,19 +74,6 @@ [PcdsFixedAtBuild.common]
   # Size of the region used by UEFI in permanent memory (Reserved 128MB by 
default)
   
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x0800|UINT32|0x0015
 
-  # Size to reserve in the primary core stack for PEI Global Variables
-  #  = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */
-  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x0016
-  # PeiServicePtr and HobListPtr shares the same location in the PEI Global 
Variable list
-  # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI 
Core is skipped.
-  ## TO BE REMOVED
-  ## 
ArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x0017
-  ## TO BE REMOVED
-  ## gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x0018
-
-  # Size to reserve in the primary core stack for SEC Global Variables
-  gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x0|UINT32|0x0031
-
   # Boot Monitor FileSystem
   
gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L""|VOID*|0x003A
 
diff --git a/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h 
b/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h
deleted file mode 100644
index 844090b4e8d1..
--- a/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD 
License
-*  which accompanies this distribution.  The full text of the license may be 
found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-*
-**/
-
-#ifndef __ARM_GLOBAL_VARIABLE_GUID_H__
-#define __ARM_GLOBAL_VARIABLE_GUID_H__
-
-#include 
-#include 
-
-#define ARM_HOB_GLOBAL_VARIABLE_GUID  \
-  { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 
0xc9} };
-
-extern EFI_GUID gArmGlobalVariableGuid;
-
-///
-/// Describes all memory ranges used during the HOB producer
-/// phase that exist outside the HOB list. This HOB type
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
-  ///
-  /// The Guid HOB header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION
-  /// and  Header.Name= gArmGlobalVariableGuid
-  ///
-  EFI_HOB_GUID_TYPEHeader;
-
-  ///
-  /// The base address of memory allocated by this HOB. Type
-  /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
-  /// specification.
-  ///
-  EFI_PHYSICAL_ADDRESSGlobalVariableBase;
-
-  ///
-  /// The length in bytes of memory allocated by this HOB.
-  ///
-  UINT32  GlobalVariableSize;
-} ARM_HOB_GLOBAL_VARIABLE;
-
-#endif
diff --git a/ArmPlatformPkg/Include/Ppi/ArmGlobalVariable.h 
b/ArmPlatformPkg/Include/Ppi/ArmGlobalVariable.h
deleted file mode 100644
index 8a29b8346530..
--- a/ArmPlatformPkg/Include/Ppi/ArmGlobalVariable.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-*  This pr

[edk2] [PATCH 05/23] ArmVirtPkg: drop ArmPlatformGlobalVariableLib dependency

[Ard Biesheuvel]

Now that all PeiServicesTablePointerLib and PrePiHobListPointerLib
library dependencies in both ArmVirtQemu and ArmVirtXen are satisfied
by implemenations that do not depend on ArmPlatformGlobalVariableLib,
we can remove all mention of it from the various .dsc files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/ArmVirt.dsc.inc  | 4 
 ArmVirtPkg/ArmVirtQemu.dsc  | 5 +
 ArmVirtPkg/ArmVirtXen.dsc   | 1 -
 ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c | 1 -
 4 files changed, 1 insertion(+), 10 deletions(-)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index b3066d298009..a0a1c618 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -149,7 +149,6 @@ [LibraryClasses.common]
 [LibraryClasses.common.SEC]
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   
ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf
 
   
DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
   
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
@@ -172,7 +171,6 @@ [LibraryClasses.common.PEI_CORE]
   
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
   
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
 
@@ -190,7 +188,6 @@ [LibraryClasses.common.PEIM]
   
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
 
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
   
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
   
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
 
@@ -210,7 +207,6 @@ [LibraryClasses.common.DXE_DRIVER]
   
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   
UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 3e4dd229edb0..84dad40a28c3 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -233,10 +233,7 @@ [Components.common]
   #
   # PEI Phase modules
   #
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf {
-
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
-  }
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf
   ArmPlatformPkg/PlatformPei/PlatformPeim.inf
diff --git a/ArmVirtPkg/ArmVirtXen.dsc b/ArmVirtPkg/ArmVirtXen.dsc
index ac37cd2a4345..29c409f21b0f 100644
--- a/ArmVirtPkg/ArmVirtXen.dsc
+++ b/ArmVirtPkg/ArmVirtXen.dsc
@@ -168,7 +168,6 @@ [Components.common]
   
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
   ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
   
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
-  
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
   
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
   }
 
diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c 
b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
index e5536ecd8e28..666edb47ce97 100644
--- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
+++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
@@ -18,7 +18,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 // Number of Virtual Memory Map Descriptors
-- 
1.9.1

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[edk2] [PATCH 21/23] ArmPlatformPkg/PlatformIntelBdsLib: drop bogus gArmGlobalVariableGuid dep

[Ard Biesheuvel]

PlatformIntelBdsLib does not use gArmGlobalVariableGuid so drop
the declaration from the .inf.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf 
b/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
index 39df113288d2..daa0d91a2f76 100644
--- a/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+++ b/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
@@ -52,7 +52,6 @@ [LibraryClasses]
   GenericBdsLib
 
 [Guids]
-  gArmGlobalVariableGuid
   gEfiEndOfDxeEventGroupGuid
 
 [Pcd]
-- 
1.9.1

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[edk2] [PATCH 17/23] ArmPlatformPkg/Bds: drop bogus ArmGlobalVariable dependencies

[Ard Biesheuvel]

Remove the GUID references to gArmGlobalVariableGuid and includes
of ArmGlobalVariableHob.h since they are not used by the ARM BDS.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/Bds/Bds.inf  | 1 -
 ArmPlatformPkg/Bds/BootMenu.c   | 2 --
 ArmPlatformPkg/Bds/BootOption.c | 1 -
 3 files changed, 4 deletions(-)

diff --git a/ArmPlatformPkg/Bds/Bds.inf b/ArmPlatformPkg/Bds/Bds.inf
index 06e8d914fdc3..96bec16f0a2e 100644
--- a/ArmPlatformPkg/Bds/Bds.inf
+++ b/ArmPlatformPkg/Bds/Bds.inf
@@ -58,7 +58,6 @@ [LibraryClasses]
 [Guids]
   gEfiEndOfDxeEventGroupGuid
   gEfiFileSystemInfoGuid
-  gArmGlobalVariableGuid
   gFdtVariableGuid
 
 [Protocols]
diff --git a/ArmPlatformPkg/Bds/BootMenu.c b/ArmPlatformPkg/Bds/BootMenu.c
index 8caa3ce5ced7..5cbac1d2dc1a 100644
--- a/ArmPlatformPkg/Bds/BootMenu.c
+++ b/ArmPlatformPkg/Bds/BootMenu.c
@@ -14,8 +14,6 @@
 
 #include "BdsInternal.h"
 
-#include 
-
 #include 
 
 /**
diff --git a/ArmPlatformPkg/Bds/BootOption.c b/ArmPlatformPkg/Bds/BootOption.c
index bdd02b4ecda0..32a5679762f9 100644
--- a/ArmPlatformPkg/Bds/BootOption.c
+++ b/ArmPlatformPkg/Bds/BootOption.c
@@ -12,7 +12,6 @@
 *
 **/
 
-#include 
 #include "BdsInternal.h"
 
 EFI_STATUS
-- 
1.9.1

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[edk2] [PATCH 23/23] ArmPkg: remove SetPrimaryStack and InitializePrimaryStack macros

[Ard Biesheuvel]

The SetPrimaryStack and InitializePrimaryStack macros are no longer
used now that we removed support for ArmPlatformGlobalVariableLib.
So remove the various versions of them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/AsmMacroIoLib.h   | 36 ---
 ArmPkg/Include/AsmMacroIoLib.inc | 38 
 ArmPkg/Include/AsmMacroIoLibV8.h | 35 --
 3 files changed, 109 deletions(-)

diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index 6904bdc9b001..f94dcc619f7a 100644
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -201,37 +201,6 @@ _InitializePrimaryStackEnd:
 #define LoadConstantToReg(Data, Reg) \
   ldr  Reg, =Data
 
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp)  \
-  and Tmp, GlobalSize, #7 ; \
-  rsbne   Tmp, Tmp, #8; \
-  add GlobalSize, GlobalSize, Tmp ; \
-  sub sp, StackTop, GlobalSize; \
-  ; \
-  mov Tmp, sp ; \
-  mov GlobalSize, #0x0; \
-_SetPrimaryStackInitGlobals:  ; \
-  cmp Tmp, StackTop   ; \
-  beq _SetPrimaryStackEnd ; \
-  str GlobalSize, [Tmp], #4   ; \
-  b   _SetPrimaryStackInitGlobals ; \
-_SetPrimaryStackEnd:
-
-// Initialize the Global Variable with '0'
-#define InitializePrimaryStack(GlobalSize, Tmp1)\
-  and Tmp1, GlobalSize, #7; \
-  rsbne   Tmp1, Tmp1, #8  ; \
-  add GlobalSize, GlobalSize, Tmp1 ;\
-  ; \
-  mov Tmp1, sp; \
-  sub sp, GlobalSize  ; \
-  mov GlobalSize, #0x0; \
-_InitializePrimaryStackLoop:  ; \
-  cmp Tmp1, sp; \
-  bls _InitializePrimaryStackEnd  ; \
-  str GlobalSize, [Tmp1, #-4]!; \
-  b   _InitializePrimaryStackLoop ; \
-_InitializePrimaryStackEnd:
-
 #else
 
 //
@@ -293,11 +262,6 @@ _InitializePrimaryStackEnd:
 // conditional load testing eq flag
 #define LoadConstantToRegIfEq(Data, Reg)  LoadConstantToRegIfEqMacro Data, Reg
 
-#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, 
GlobalSize, Tmp
-
-// Initialize the Global Variable with '0'
-#define InitializePrimaryStack(GlobalSize, Tmp1) InitializePrimaryStack 
GlobalSize, Tmp1
-
 #endif
 
 #endif
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index 301bd890ac4d..95dc640d6fc3 100644
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -80,42 +80,4 @@
   ldr  $Reg, =($Data)
   MEND
 
-  ; The reserved place must be 8-bytes aligned for pushing 64-bit variable on 
the stack
-  ; Note: Global Size will be modified
-  MACRO
-  SetPrimaryStack $StackTop, $GlobalSize, $Tmp
-  and $Tmp, $GlobalSize, #7
-  rsbne   $Tmp, $Tmp, #8
-  add $GlobalSize, $GlobalSize, $Tmp
-  sub sp, $StackTop, $GlobalSize
-
-  ; Set all the global variables to 0
-  mov $Tmp, sp
-  mov $GlobalSize, #0x0
-_SetPrimaryStackInitGlobals
-  cmp $Tmp, $StackTop
-  beq _SetPrimaryStackEnd
-  str $GlobalSize, [$Tmp], #4
-  b   _SetPrimaryStackInitGlobals
-_SetPrimaryStackEnd
-  MEND
-
-  MACRO
-  InitializePrimaryStack $GlobalSize, $Tmp1
-  and $Tmp1, $GlobalSize, #7
-  rsbne   $Tmp1, $Tmp1, #8
-  add $GlobalSize, $GlobalSize, $Tmp1
-
-  mov $Tmp1, sp
-  sub sp, $GlobalSize
-  ; Set all the global variables to 0
-  mov $GlobalSize, #0x0
-_InitializePrimaryStackLoop
-  cmp $Tmp1, sp
-  bls _InitializePrimaryStackEnd
-  str $GlobalSize, [$Tmp1, #-4]!
-  b   _InitializePrimaryStackLoop
-_InitializePrimaryStackEnd
-  MEND
-
   END
diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h
index 2ee1081632ba..a9f8491bc922 100644
--- a/ArmPkg/Include/AsmMacroIoLibV8.h
+++ b/ArmPkg/Include/AsmMacroIoLibV8.h
@@ -18,41 +18,6 @@
 #ifndef __MACRO_IO_LIBV8_H__
 #define __MACRO_IO_LIBV8_H__
 
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1)  \
-  andsTmp, GlobalSize, #15;   \
-  mov Tmp1, #16   ;   \
-  sub Tmp1, Tmp1, Tmp ;   \
-  cselTmp, Tmp1, Tmp, ne  ;   \
-  add GlobalSize, GlobalSize, Tmp ;   \
-  sub sp, StackTop, GlobalSize;   \
-  ;   \
-  mov Tmp, sp ;   \
-  mov GlobalSize

Re: [edk2] [PATCH] ArmPlatformPkg/PrePeiCore: add missing entries to AArch64 vector table

[Ard Biesheuvel]

On 20 November 2015 at 13:46, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Fri, Nov 20, 2015 at 01:39:26PM +0100, Ard Biesheuvel wrote:
>> The PrePeiCore vector table for AArch64 mode is only half populated.
>> However unlikely, if exceptions from lower exception levels are ever
>> taken, they should be reported correctly, rather than causing a
>> recursive undefined instruction fault on the zero padding that was
>> introduced by commit SVN r18904 ("ArmPkg/ArmPlatformPkg: position
>> vectors relative to base"). So add the missing entries, and wire
>> them up to the default handler.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>
> Acked-by: Mark Rutland <mark.rutl...@arm.com>
>
> Mark.
>

Ping?

>> ---
>>  ArmPlatformPkg/PrePeiCore/AArch64/Exception.S | 40 
>>  1 file changed, 40 insertions(+)
>>
>> diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S 
>> b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
>> index b31854ced256..75cd98ff4863 100644
>> --- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
>> +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
>> @@ -77,4 +77,44 @@ _DefaultSError_h:
>>mov  x0, #EXCEPT_AARCH64_SERROR
>>TO_HANDLER
>>
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC)
>> +_DefaultSyncExceptHandler_LowerA64:
>> +  mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ)
>> +_DefaultIrq_LowerA64:
>> +  mov  x0, #EXCEPT_AARCH64_IRQ
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ)
>> +_DefaultFiq_LowerA64:
>> +  mov  x0, #EXCEPT_AARCH64_FIQ
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR)
>> +_DefaultSError_LowerA64:
>> +  mov  x0, #EXCEPT_AARCH64_SERROR
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC)
>> +_DefaultSyncExceptHandler_LowerA32:
>> +  mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ)
>> +_DefaultIrq_LowerA32:
>> +  mov  x0, #EXCEPT_AARCH64_IRQ
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ)
>> +_DefaultFiq_LowerA32:
>> +  mov  x0, #EXCEPT_AARCH64_FIQ
>> +  TO_HANDLER
>> +
>> +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR)
>> +_DefaultSError_LowerA32:
>> +  mov  x0, #EXCEPT_AARCH64_SERROR
>> +  TO_HANDLER
>> +
>>  VECTOR_END(PeiVectorTable)
>> --
>> 1.9.1
>>
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Re: [edk2] [PATCH] ArmPlatformPkg/PrePeiCore: add missing entries to AArch64 vector table

[Ard Biesheuvel]

On 26 November 2015 at 16:09, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Thu, Nov 26, 2015 at 04:06:40PM +0100, Ard Biesheuvel wrote:
>> On 20 November 2015 at 13:46, Mark Rutland <mark.rutl...@arm.com> wrote:
>> > On Fri, Nov 20, 2015 at 01:39:26PM +0100, Ard Biesheuvel wrote:
>> >> The PrePeiCore vector table for AArch64 mode is only half populated.
>> >> However unlikely, if exceptions from lower exception levels are ever
>> >> taken, they should be reported correctly, rather than causing a
>> >> recursive undefined instruction fault on the zero padding that was
>> >> introduced by commit SVN r18904 ("ArmPkg/ArmPlatformPkg: position
>> >> vectors relative to base"). So add the missing entries, and wire
>> >> them up to the default handler.
>> >>
>> >> Contributed-under: TianoCore Contribution Agreement 1.0
>> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> >
>> > Acked-by: Mark Rutland <mark.rutl...@arm.com>
>> >
>> > Mark.
>> >
>>
>> Ping?
>
> Applied locally.
>
> Thanks,
> Mark.
>
> p.s. I assume you're asking Leif to apply this upstream?
>

Well, I can apply it myself, but not without his ack (or R-b, in fact)

-- 
Ard.
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Re: [edk2] [PATCH 04/23] ArmVirtPkg/ArmVirtQemu: move to ArmPkg version of PeiServicesTablePointerLib

[Ard Biesheuvel]

On 26 November 2015 at 17:45, Laszlo Ersek <ler...@redhat.com> wrote:
> On 11/26/15 13:10, Ard Biesheuvel wrote:
>> As pointed out by Eugene, the ArmPlatformPkg implementation of
>> PeiServicesTablePointerLib violates the PI sec, since it uses
>> ArmPlatformGlobalVariableLib to store the PEI services table pointer
>> rather than the thread ID cpu registers as the spec requires.
>>
>> So instead, move to the ArmPkg version of this library, which does
>> adhere to the PI spec.
>>
>> Reported-by: Eugene Cohen <eug...@hp.com>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>  ArmVirtPkg/ArmVirt.dsc.inc | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
>> index 8626919f3a2c..b3066d298009 100644
>> --- a/ArmVirtPkg/ArmVirt.dsc.inc
>> +++ b/ArmVirtPkg/ArmVirt.dsc.inc
>> @@ -156,7 +156,7 @@ [LibraryClasses.common.SEC]
>>
>> SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
>>HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
>>PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
>> -  
>> PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>> +  
>> PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>>
>> MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
>>
>>  [LibraryClasses.common.PEI_CORE]
>> @@ -173,7 +173,7 @@ [LibraryClasses.common.PEI_CORE]
>>
>> ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
>>
>>
>> ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
>> -  
>> PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>> +  
>> PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>>
>> SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
>>
>>  [LibraryClasses.common.PEIM]
>> @@ -191,7 +191,7 @@ [LibraryClasses.common.PEIM]
>>
>> ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
>>
>>
>> ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
>> -  
>> PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>> +  
>> PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>>
>> SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
>>
>>  [LibraryClasses.common.DXE_CORE]
>>
>
> Out of curiosity -- do you know why ArmPlatformPkg's (non-conformant)
> version had been written in the first place? Or was it the first
> implementation, and the (conformant) ArmPkg version came about second?
>

The ArmPkg version was contributed by Eugene himself in June 2011, but
the ArmPlatformPkg version predates that. So for some reason, the
existing code was never ported.

> Reviewed-by: Laszlo Ersek <ler...@redhat.com>
>
> Thanks
> Laszlo
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Re: [edk2] please DO NOT commit unreviewed patches to subversion!

[Ard Biesheuvel]

On 26 November 2015 at 23:23, Laszlo Ersek  wrote:
> I notice that recently there have been patches committed to the
> subversion repository that had *never* been posted to the list, in the
> ultimately committed form. Examples:
>
> (1) Patches on the list:
>
> http://thread.gmane.org/gmane.comp.bios.edk2.devel/4770
>
> [edk2] [patch 1/3] UefiCpuPkg/PiSmmCpu: Add 2 APIs in SmmCpuFeaturesLib.
> [edk2] [patch 2/3] UefiCpuPkg/PiSmmCpu: Add NULL func for 2 new APIs in 
> SmmCpuFeaturesLib.
> [edk2] [patch 3/3] UefiCpuPkg/PiSmmCpu: Update function call for 2 new 
> APIs in SmmCpuFeatureLib.
>
> Committed patch (one patch!):
>
> http://sourceforge.net/p/edk2/code/18958
> Add 2 APIs in SmmCpuFeaturesLib.
>
> The series that had been posted to the list, and reviewed there, in
> a nice and structured way, got squashed into a single patch, and
> commited that way.
>
> (2) Patches on the list:
>
> http://thread.gmane.org/gmane.comp.bios.edk2.devel/4834
>
> [edk2] [patch 1/2] UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page 
> table by default.
> [edk2] [patch 2/2] UefiCpuPkg/PiSmmCpu: Always set WP in CR0.
>
> Committed patch (one patch!):
>
> http://sourceforge.net/p/edk2/code/18960
> Always set WP in CR0.
>
> Exactly same treatment.
>

I would argue that these patches need to be reverted, and committed in
their final reviewed form. That way, we preserve the bisectability of
the tree (since what was added as a single patch is removed as a
single patch as well)

> This practice abuses the trust of the community and makes patch review
> *absolutely pointless*. Patches must be committed to SVN *exactly* the
> way they were posted and reviewed, no ifs and buts, *unless* a reviewer
> gives explicit license to fix up trivial stuff right before committing.
>
> *Maybe* if a trivial conflict has to be fixed via a rebase -- because
> some light changes have crept in, between receiving reviews and
> committing -- than can be done, but even in that case, publicizing that
> fact on the list is the minimally expected courtesy.
>
> Squashing patches for committing is untolerable. It defeats the original
> structuring, prevents bisection and bug hunt, and prevents retroactive
> review and analysis.
>
> If I post a 30-50 part series, should I then commit it all in a single
> 3000-5000 SLOC bomb? That practice is *exactly* what we've been trying
> to extinguish!!!
>

I could not agree more. The importance of being able to bisect is
paramount, especially since not everyone takes the trouble to test
their changes on platforms or toolchains other than the ones they use
themselves, often resulting in breakage that needs to be tracked down
by someone else. So *please*, post *and* merge your patches in a
reviewable *and* bisectable way.

And yes, Laszlo, you need some time off:-)

-- 
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Re: [edk2] [PATCH] ArmPlatformPkg/PrePeiCore: add missing entries to AArch64 vector table

[Ard Biesheuvel]

On 26 November 2015 at 17:35, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Thu, Nov 26, 2015 at 04:20:00PM +0100, Ard Biesheuvel wrote:
>> On 26 November 2015 at 16:09, Mark Rutland <mark.rutl...@arm.com> wrote:
>> > On Thu, Nov 26, 2015 at 04:06:40PM +0100, Ard Biesheuvel wrote:
>> >> On 20 November 2015 at 13:46, Mark Rutland <mark.rutl...@arm.com> wrote:
>> >> > On Fri, Nov 20, 2015 at 01:39:26PM +0100, Ard Biesheuvel wrote:
>> >> >> The PrePeiCore vector table for AArch64 mode is only half populated.
>> >> >> However unlikely, if exceptions from lower exception levels are ever
>> >> >> taken, they should be reported correctly, rather than causing a
>> >> >> recursive undefined instruction fault on the zero padding that was
>> >> >> introduced by commit SVN r18904 ("ArmPkg/ArmPlatformPkg: position
>> >> >> vectors relative to base"). So add the missing entries, and wire
>> >> >> them up to the default handler.
>> >> >>
>> >> >> Contributed-under: TianoCore Contribution Agreement 1.0
>> >> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> >> >
>> >> > Acked-by: Mark Rutland <mark.rutl...@arm.com>
>> >> >
>> >> > Mark.
>> >> >
>> >>
>> >> Ping?
>> >
>> > Applied locally.
>> >
>> > Thanks,
>> > Mark.
>> >
>> > p.s. I assume you're asking Leif to apply this upstream?
>> >
>>
>> Well, I can apply it myself, but not without his ack (or R-b, in fact)
>
> Demands, demands :)
> Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>

Committed as SVN r18976

Thanks,
Ard.
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[edk2] [PATCH 3/3] ArmVirtPkg: add secure boot support to 32-bit ARM targets

[Ard Biesheuvel]

Building the 32-bit ARM targets with secure boot enabled requires
a library resolution for the ArmSoftfloatLib dependency of
OpenSslLib. So provide one.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/ArmVirt.dsc.inc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index a0a1c618..b4851e7fc035 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -234,6 +234,9 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
 !endif
 
+[LibraryClasses.ARM]
+  ArmSoftFloatLib|ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
+
 [BuildOptions]
   RVCT:RELEASE_*_*_CC_FLAGS  = -DMDEPKG_NDEBUG
 
-- 
1.9.1

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[edk2] [PATCH 2/3] CryptoPkg: add softfloat dependency for ARM

[Ard Biesheuvel]

UEFI on 32-bit ARM does not allow the use of hardware floating point,
so in order to be able to run OpenSslLib, we need to fulfil its
floating point arithmetic dependencies using a software library.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 CryptoPkg/Library/OpensslLib/OpensslLib.inf | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 2e74f6cbeccf..362c16a17ac3 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -850,6 +850,9 @@ [Packages]
 [LibraryClasses]
   DebugLib
 
+[LibraryClasses.ARM]
+  ArmSoftFloatLib
+
 [BuildOptions]
   #
   # Disables the following Visual Studio compiler warnings brought by openssl 
source, so we do not break the build with /WX option:
-- 
1.9.1

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[edk2] [PATCH v3 2/7] ArmPkg/ArmV7Lib: add support for reading the ID_MMFR0 system register

[Ard Biesheuvel]

Implement an accessor function for the ID_MMFR0 system register, which
contains information about the VMSA implementation. We will need this
to access the number of shareability levels and the nature of their
implementations.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h   | 6 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S   | 5 +
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm | 5 +
 3 files changed, 16 insertions(+)

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
index 50fba3824024..df770cf7d798 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
@@ -22,5 +22,11 @@ ArmV7AllDataCachesOperation (
   IN  ARM_V7_CACHE_OPERATION  DataCacheOperation
   );
 
+UINTN
+EFIAPI
+ArmReadIdMmfr0 (
+  VOID
+  );
+
 #endif // __ARM_V7_LIB_H__
 
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 93164b8f0ea4..7366eee6dc4f 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -51,6 +51,7 @@ GCC_ASM_EXPORT (ArmReadTpidrurw)
 GCC_ASM_EXPORT (ArmWriteTpidrurw)
 GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
 GCC_ASM_EXPORT (ArmReadIdPfr1)
+GCC_ASM_EXPORT (ArmReadIdMmfr0)
 
 .set DC_ON, (0x1<<2)
 .set IC_ON, (0x1<<12)
@@ -326,4 +327,8 @@ ASM_PFX(ArmReadIdPfr1):
   mrcp15, 0, r0, c0, c1, 1 @ Read ID_PFR1 Register
   bx lr
 
+ASM_PFX(ArmReadIdMmfr0):
+  mrcp15, 0, r0, c0, c1, 4 @ Read ID_MMFR0 Register
+  bx lr
+
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
index d6f249038a05..78a12e1629b4 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
@@ -48,6 +48,7 @@
 EXPORT  ArmWriteTpidrurw
 EXPORT  ArmIsArchTimerImplemented
 EXPORT  ArmReadIdPfr1
+EXPORT  ArmReadIdMmfr0
 
 AREAArmV7Support, CODE, READONLY
 PRESERVE8
@@ -320,4 +321,8 @@ ArmReadIdPfr1
   mrcp15, 0, r0, c0, c1, 1 ; Read ID_PFR1 Register
   bx lr
 
+ArmReadIdMmfr0
+  mrcp15, 0, r0, c0, c1, 4 ; Read ID_MMFR0 Register
+  bx lr
+
  END
-- 
1.9.1

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[edk2] [PATCH v3 6/7] ArmPkg/ArmV7Lib: fix definition of TTBR_NON_INNER_CACHEABLE

[Ard Biesheuvel]

The definition of TTBR_NON_INNER_CACHEABLE should be bit 0 cleared, not
bit 0 set. Furthermore, the name is inconsistent with the other definitions
so rename it to TTBR_INNER_NON_CACHEABLE.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/Chipset/ArmV7Mmu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h 
b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index f612154badc1..7fafc888fe94 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -23,7 +23,7 @@
 #define TTBR_SHAREABLE   BIT1
 #define TTBR_NON_SHAREABLE   0
 #define TTBR_INNER_CACHEABLE BIT0
-#define TTBR_NON_INNER_CACHEABLE BIT0
+#define TTBR_INNER_NON_CACHEABLE 0
 #define TTBR_RGN_INNER_NON_CACHEABLE 0
 #define TTBR_RGN_INNER_WRITE_BACK_ALLOC  BIT6
 #define TTBR_RGN_INNER_WRITE_THROUGH BIT0
-- 
1.9.1

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[edk2] [PATCH v3 0/7] ArmPkg: ARMv7 MMU fixes

[Ard Biesheuvel]

Yesterday's 3-piece series is now a 7-piece series, since I spotted some other
issues when looking at this code.

Patch #1 replaces the bogus TTBR_WRITE_THROUGH_NO_ALLOC with something that is
more aligned with what TTBRx actually allows.

Patch #2 adds an accessor to the ID_MMFR0 system id register.

Patch #3 adds a test for the presence of the multiprocessing extensions.

Patch #4 adds the shareable bit to the TTBR config to ensure that page table
accesses to cached memory are shareable.

Patch #5 adds a feature flag PCD that removes the shareable attribute from all
cached mappings.

Patch #6 fixes the definition of TTBR_NON_INNER_CACHEABLE, whose name and
value are inconsistent and incorrect, respectively

Patch #7 changes the TTBR memory attributes on systems without the
multiprocessing extensions.

Ard Biesheuvel (7):
  ArmPkg/ArmV7Mmu: fix write-through translation table accesses
  ArmPkg/ArmV7Lib: add support for reading the ID_MMFR0 system register
  ArmPkg/ArmV7Lib: add function to test for presence of MP extensions
  ArmPkg/ArmV7Mmu: make cached translation table accesses shareable
  ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory
non-shareable
  ArmPkg/ArmV7Lib: fix definition of TTBR_NON_INNER_CACHEABLE
  ArmPkg/ArmV7Lib: take MP extensions into account when programming TTBR

 ArmPkg/ArmPkg.dec   |  6 
 ArmPkg/Include/Chipset/ArmV7Mmu.h   | 15 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S   |  7 +
 ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm |  7 +
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h  | 12 
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf|  3 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf   |  3 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c  | 31 ++--
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S  |  5 
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm|  5 
 10 files changed, 86 insertions(+), 8 deletions(-)

-- 
1.9.1

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[edk2] [PATCH v3 4/7] ArmPkg/ArmV7Mmu: make cached translation table accesses shareable

[Ard Biesheuvel]

To align with the way normal cacheable memory is mapped, set the
shareable bit for cached accesses performed by the page table walker.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/Chipset/ArmV7Mmu.h  |  6 +++---
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 13 +
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h 
b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index 2545864775cf..f612154badc1 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -29,10 +29,10 @@
 #define TTBR_RGN_INNER_WRITE_THROUGH BIT0
 #define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)
 
-#define TTBR_WRITE_THROUGH  ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_RGN_INNER_WRITE_THROUGH )
-#define TTBR_WRITE_BACK_NO_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC )
+#define TTBR_WRITE_THROUGH  ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
+#define TTBR_WRITE_BACK_NO_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
 #define TTBR_NON_CACHEABLE  ( TTBR_RGN_OUTER_NON_CACHEABLE | 
TTBR_RGN_INNER_NON_CACHEABLE )
-#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC )
+#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
 
 
 #define TRANSLATION_TABLE_SECTION_COUNT 4096
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 8ed763cc8265..f03f609d21b2 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -265,6 +265,19 @@ ArmConfigureMmu (
 return RETURN_UNSUPPORTED;
   }
 
+  if (TTBRAttributes & TTBR_SHAREABLE) {
+//
+// Unlike the S bit in the short descriptors, which implies inner shareable
+// on an implementation that supports two levels, the meaning of the S bit
+// in the TTBR depends on the NOS bit, which defaults to Outer Shareable.
+// However, we should only set this bit after we have confirmed that the
+// implementation supports multiple levels, or else the NOS bit is UNK/SBZP
+//
+if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {
+  TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;
+}
+  }
+
   ArmCleanInvalidateDataCache ();
   ArmInvalidateInstructionCache ();
 
-- 
1.9.1

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[edk2] [PATCH v3 5/7] ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory non-shareable

[Ard Biesheuvel]

Even though mapping normal memory (inner) shareable is usually the
correct choice on coherent systems, it may be desirable in some cases
to use non-shareable mappings for normal memory, e.g., when hardware
managed coherency is not required and the memory system is not fully
configured yet. So introduce a PCD PcdNormalMemoryNonshareableOverride
that makes cacheable mappings of normal memory non-shareable.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
---
 ArmPkg/ArmPkg.dec |  6 
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf  |  3 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf |  3 ++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c| 30 ++--
 4 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 46e9894d3f56..ff4531e44106 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -73,6 +73,12 @@ [PcdsFeatureFlag.common]
   # Define if the GICv3 controller should use the GICv2 legacy
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x0042
 
+[PcdsFeatureFlag.ARM]
+  # Whether to map normal memory as non-shareable. FALSE is the safe choice, 
but
+  # TRUE may be appropriate to fix performance problems if you don't care about
+  # hardware coherency (i.e., no virtualization or cache coherent DMA)
+  
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x0043
+
 [PcdsFixedAtBuild.common]
   gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x0006
 
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
index 01bdfb699656..d56851a1409b 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
@@ -48,3 +48,6 @@ [LibraryClasses]
 
 [Protocols]
   gEfiCpuArchProtocolGuid
+
+[FeaturePcd.ARM]
+  gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
index ac081068db28..6eaf350c7b9d 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -48,3 +48,6 @@ [LibraryClasses]
 
 [Protocols]
   gEfiCpuArchProtocolGuid
+
+[FeaturePcd.ARM]
+  gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index f03f609d21b2..a9cb06d78e19 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -80,6 +80,10 @@ PopulateLevel2PageTable (
   break;
   }
 
+  if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
+PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
+  }
+
   // Check if the Section Entry has already been populated. Otherwise attach a
   // Level 2 Translation Table to it
   if (*SectionEntry != 0) {
@@ -178,6 +182,10 @@ FillTranslationTable (
   break;
   }
 
+  if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
+Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+  }
+
   // Get the first section entry for this mapping
   SectionEntry= 
TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, 
MemoryRegion->VirtualBase);
 
@@ -266,15 +274,19 @@ ArmConfigureMmu (
   }
 
   if (TTBRAttributes & TTBR_SHAREABLE) {
-//
-// Unlike the S bit in the short descriptors, which implies inner shareable
-// on an implementation that supports two levels, the meaning of the S bit
-// in the TTBR depends on the NOS bit, which defaults to Outer Shareable.
-// However, we should only set this bit after we have confirmed that the
-// implementation supports multiple levels, or else the NOS bit is UNK/SBZP
-//
-if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {
-  TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;
+if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
+  TTBRAttributes ^= TTBR_SHAREABLE;
+} else {
+  //
+  // Unlike the S bit in the short descriptors, which implies inner 
shareable
+  // on an implementation that supports two levels, the meaning of the S 
bit
+  // in the TTBR depends on the NOS bit, which defaults to Outer Shareable.
+  // However, we should only set this bit after we have confirmed that the
+  // implementation supports multiple levels, or else the NOS bit is 
UNK/SBZP
+  //
+  if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {
+TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;
+  }
 }
   }
 
-- 
1.9.1

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[edk2] [PATCH v3 1/7] ArmPkg/ArmV7Mmu: fix write-through translation table accesses

[Ard Biesheuvel]

The definition TTBR_WRITE_THROUGH_NO_ALLOC makes little sense, since
a) its meaning is unclear in the context of TTBRx, since write through
   always implies Read-Allocate and no Write-Allocate
b) its definition equals the definition of TTBR_WRITE_BACK_ALLOC

So instead, rename it to TTBR_WRITE_THROUGH and update the definition
to reflect the name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
---
 ArmPkg/Include/Chipset/ArmV7Mmu.h  | 2 +-
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h 
b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index e38c5f7b055d..2545864775cf 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -29,7 +29,7 @@
 #define TTBR_RGN_INNER_WRITE_THROUGH BIT0
 #define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)
 
-#define TTBR_WRITE_THROUGH_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC )
+#define TTBR_WRITE_THROUGH  ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_RGN_INNER_WRITE_THROUGH )
 #define TTBR_WRITE_BACK_NO_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC )
 #define TTBR_NON_CACHEABLE  ( TTBR_RGN_OUTER_NON_CACHEABLE | 
TTBR_RGN_INNER_NON_CACHEABLE )
 #define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC )
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index e05a51e0d901..8ed763cc8265 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -259,7 +259,7 @@ ArmConfigureMmu (
 TTBRAttributes = TTBR_WRITE_BACK_ALLOC;
   } else if ((TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH) ||
   (TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
-TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;
+TTBRAttributes = TTBR_WRITE_THROUGH;
   } else {
 ASSERT (0); // No support has been found for the attributes of the memory 
region that the translation table belongs to.
 return RETURN_UNSUPPORTED;
-- 
1.9.1

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Re: [edk2] [PATCH] ArmPkg/ArmLib: mark all cached mappings as (inner) shareable

[Ard Biesheuvel]

On 16 November 2015 at 16:03, Michael Zimmermann
 wrote:
> Unfortunately I can't tell you much about how the L2 works or if it's
> configurable because it's a proprietary hw(I'm a opensource dev working with
> Qualcomm Android devices).
>
> Also, I'm using ARM PrePi so EDK2 doesn't configure any architectural hw
> besides exceptions and MMU.
>

OK, I understand.

I'd be interested in the contents of your ID_MMFR0 register

MRC p15, 0, , c0, c1, 4 ; Read ID_MMFR0 into Rt

Could you please run that and reply with the result?

Thanks,
Ard.
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Re: [edk2] [PATCH v3 0/4] improve handling of device attributes on ARM/AARCH64

[Ard Biesheuvel]

On 18 November 2015 at 12:47, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> On Wed, Nov 18, 2015 at 11:29:15AM +, Leif Lindholm wrote:
>> On Wed, Nov 18, 2015 at 09:25:55AM +0100, Ard Biesheuvel wrote:
>> > This series fixes some issues that exist in the code with regard to how 
>> > device
>> > mappings are created. According to the architecture, read-sensitive devices
>> > should be mapped with the non-execute bits (XN/PXN/UXN) to prevent 
>> > speculative
>> > instruction fetches from accessing those regions.
>> >
>> > Changes since v2:
>> > - simplified patch #2 to simply override the FD image attributes instead of
>> >   introducing non-trivial logic to make all regions exactly adjacent
>> >
>> > Patch #1 removes GcdAttributeToArmAttribute() rather than fixing it, since 
>> > it
>> > is unused anyway. Note that it fails to set shareability attributes on 
>> > cached
>> > mappings as well, so it is broken in more than one way. (identical to v1)
>> >
>> > Patch #2 ensures that the ArmVirtQemu firmware is still executable in place
>> > after changing the device mapping attribute set to include the non-exec
>> > attributes. (new in v2)
>> >
>> > Patch #3 does the same for FVP-AArch64 and RTSM-A15_MPCore. (new in v2)
>>
>> Thanks Ard. For 1-3:
>
> Sorry - 1,3-4, that is (gmail reordered the patches for me).
>

Thanks. Committed as SVN r1 - r18891
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[edk2] [PATCH v3 7/7] ArmPkg/ArmV7Lib: take MP extensions into account when programming TTBR

[Ard Biesheuvel]

Bits 0 and 6 of the TTBRx system registers have different meanings
depending on whether a system implements the Multiprocessing
Extensions. So use separate memory attribute definitions for MP and
non-MP.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/Chipset/ArmV7Mmu.h  | 13 +
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c |  6 +++---
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h 
b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index 7fafc888fe94..549a5cd7d45a 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -29,10 +29,15 @@
 #define TTBR_RGN_INNER_WRITE_THROUGH BIT0
 #define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)
 
-#define TTBR_WRITE_THROUGH  ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
-#define TTBR_WRITE_BACK_NO_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
-#define TTBR_NON_CACHEABLE  ( TTBR_RGN_OUTER_NON_CACHEABLE | 
TTBR_RGN_INNER_NON_CACHEABLE )
-#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
+#define TTBR_WRITE_THROUGH  ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+#define TTBR_WRITE_BACK_NO_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+#define TTBR_NON_CACHEABLE  ( TTBR_RGN_OUTER_NON_CACHEABLE | 
TTBR_INNER_NON_CACHEABLE )
+#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
+
+#define TTBR_MP_WRITE_THROUGH   ( TTBR_RGN_OUTER_WRITE_THROUGH | 
TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
+#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
+#define TTBR_MP_NON_CACHEABLE   ( TTBR_RGN_OUTER_NON_CACHEABLE | 
TTBR_RGN_INNER_NON_CACHEABLE )
+#define TTBR_MP_WRITE_BACK_ALLOC( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | 
TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
 
 
 #define TRANSLATION_TABLE_SECTION_COUNT 4096
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index a9cb06d78e19..b2cfdba90049 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -261,13 +261,13 @@ ArmConfigureMmu (
   // Translate the Memory Attributes into Translation Table Register Attributes
   if ((TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED) ||
   (TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED)) {
-TTBRAttributes = TTBR_NON_CACHEABLE;
+TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_NON_CACHEABLE : 
TTBR_NON_CACHEABLE;
   } else if ((TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK) ||
   (TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK)) {
-TTBRAttributes = TTBR_WRITE_BACK_ALLOC;
+TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_WRITE_BACK_ALLOC : 
TTBR_WRITE_BACK_ALLOC;
   } else if ((TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH) ||
   (TranslationTableAttribute == 
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
-TTBRAttributes = TTBR_WRITE_THROUGH;
+TTBRAttributes = ArmHasMpExtensions () ? TTBR_MP_WRITE_THROUGH : 
TTBR_WRITE_THROUGH;
   } else {
 ASSERT (0); // No support has been found for the attributes of the memory 
region that the translation table belongs to.
 return RETURN_UNSUPPORTED;
-- 
1.9.1

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[edk2] [PATCH v3 3/7] ArmPkg/ArmV7Lib: add function to test for presence of MP extensions

[Ard Biesheuvel]

Some MMU manipulation is dependent on the presence of the multiprocessing
extensions. So add a function that returns this information.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S   | 7 +++
 ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm | 7 +++
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h  | 6 ++
 3 files changed, 20 insertions(+)

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S 
b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
index b94239f785c7..d9e3c86b6907 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
@@ -19,6 +19,7 @@
 .align 2
 
 GCC_ASM_EXPORT(ArmIsMpCore)
+GCC_ASM_EXPORT(ArmHasMpExtensions)
 GCC_ASM_EXPORT(ArmEnableAsynchronousAbort)
 GCC_ASM_EXPORT(ArmDisableAsynchronousAbort)
 GCC_ASM_EXPORT(ArmEnableIrq)
@@ -44,6 +45,12 @@ ASM_PFX(ArmIsMpCore):
   movne   R0, #0
   bx  LR
 
+ASM_PFX(ArmHasMpExtensions):
+  mrc p15,0,R0,c0,c0,5
+  // Get Multiprocessing extension (bit31)
+  lsr R0, R0, #31
+  bx  LR
+
 ASM_PFX(ArmEnableAsynchronousAbort):
   cpsie   a
   isb
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm 
b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
index 82daa3ce1698..817923225353 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
@@ -15,6 +15,7 @@
 
 
 EXPORT  ArmIsMpCore
+EXPORT  ArmHasMpExtensions
 EXPORT  ArmEnableAsynchronousAbort
 EXPORT  ArmDisableAsynchronousAbort
 EXPORT  ArmEnableIrq
@@ -43,6 +44,12 @@ ArmIsMpCore
   movne   R0, #0
   bx  LR
 
+ArmHasMpExtensions
+  mrc p15,0,R0,c0,c0,5
+  // Get Multiprocessing extension (bit31)
+  lsr R0, R0, #31
+  bx  LR
+
 ArmEnableAsynchronousAbort
   cpsie   a
   isb
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
index df770cf7d798..e138613ca548 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h
@@ -28,5 +28,11 @@ ArmReadIdMmfr0 (
   VOID
   );
 
+BOOLEAN
+EFIAPI
+ArmHasMpExtensions (
+  VOID
+  );
+
 #endif // __ARM_V7_LIB_H__
 
-- 
1.9.1

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Re: [edk2] [PATCH 0/3] AppPkg/Python-2.7.10/edk2module.c: Reviewable Revision Resubmission

[Ard Biesheuvel]

On 12 November 2015 at 23:52, Daryl McDaniel  wrote:
> AppPkg/Python-2.7.10: Present patch in three reviewable chunks.
>
> Due to the large number of changes, the previous submission of this patch
> was not reviewable.  This patch set presents the changes as three patches, 
> each
> containing a single type of change.
>
> Patch 1/3: Remove irrelevant code.
>   Remove sections of conditional code that are not relevant to the EDK II
>   or UEFI environments.
>
> Patch 2/3: Rename posix_ to edk2_.
>   Rename objects beginning with posix_ to edk2_.
>
> Patch 3/3: Update for Python 2.7.10.
>   Add copyright message.
>   Remove some redundant blank lines.
>   Remove a superfluous call to setup_confname_tables(m) from INITFUNC().
>

Thanks a *lot* for making the effort.

-- 
Ard.


>  .../PyMod-2.7.10/Modules/edk2module.c  | 5692 
> +---
>  1 file changed, 1253 insertions(+), 4439 deletions(-)
>
> --
> 1.9.5.msysgit.1
>
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[edk2] [PATCH v3 4/4] ArmPkg/Mmu: set required XN attributes for device mappings

[Ard Biesheuvel]

To prevent speculative intruction fetches from MMIO ranges that may
have side effects on reads, the architecture requires device mappings
to be created with the XN or UXN/PXN bits set (for the ARM/EL2 and
EL1&0 translation regimes, respectively.)

Note that, in the ARM case, this involves moving all accesses to a
client domain since permission attributes like XN are ignored from
a manager domain. The use of a client domain is actually mandated
explicitly by the UEFI spec.

Reported-by: Heyi Guo <heyi@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/Chipset/ArmV7Mmu.h  | 2 ++
 ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 5 -
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 2 +-
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h 
b/ArmPkg/Include/Chipset/ArmV7Mmu.h
index aaa0977205fa..e38c5f7b055d 100644
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ b/ArmPkg/Include/Chipset/ArmV7Mmu.h
@@ -192,6 +192,7 @@
 
TT_DESCRIPTOR_SECTION_S_NOT_SHARED  | \
 
TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
 
TT_DESCRIPTOR_SECTION_AP_RW_RW  | \
+
TT_DESCRIPTOR_SECTION_XN_MASK   | \
 
TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
 #define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure)  
(TT_DESCRIPTOR_SECTION_TYPE_SECTION 
  | \
((NonSecure) ?  
TT_DESCRIPTOR_SECTION_NS : 0)| \
@@ -215,6 +216,7 @@
 
TT_DESCRIPTOR_PAGE_NG_GLOBAL
  | \
 
TT_DESCRIPTOR_PAGE_S_NOT_SHARED 
  | \
 
TT_DESCRIPTOR_PAGE_AP_RW_RW 
  | \
+
TT_DESCRIPTOR_PAGE_XN_MASK  
  | \
 
TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)
 #define TT_DESCRIPTOR_PAGE_UNCACHED
(TT_DESCRIPTOR_PAGE_TYPE_PAGE   
| \
 
TT_DESCRIPTOR_PAGE_NG_GLOBAL
  | \
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c 
b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
index c8b3d4a121b1..377a7858d436 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
@@ -50,7 +50,10 @@ ArmMemoryAttributeToPageAttribute (
 ASSERT(0);
   case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
   case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
-return TT_ATTR_INDX_DEVICE_MEMORY;
+if (ArmReadCurrentEL () == AARCH64_EL2)
+  return TT_ATTR_INDX_DEVICE_MEMORY | TT_TABLE_XN;
+else
+  return TT_ATTR_INDX_DEVICE_MEMORY | TT_TABLE_UXN | TT_TABLE_PXN;
   }
 }
 
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c 
b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 1287dfb1a9bb..e05a51e0d901 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -294,7 +294,7 @@ ArmConfigureMmu (
  DOMAIN_ACCESS_CONTROL_NONE( 3) |
  DOMAIN_ACCESS_CONTROL_NONE( 2) |
  DOMAIN_ACCESS_CONTROL_NONE( 1) |
- DOMAIN_ACCESS_CONTROL_MANAGER(0));
+ DOMAIN_ACCESS_CONTROL_CLIENT(0));
 
   ArmEnableInstructionCache();
   ArmEnableDataCache();
-- 
1.9.1

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[edk2] [PATCH v3 3/4] ArmVExpressPkg/ArmVExpressLibRTSM: map NOR flash as cached

[Ard Biesheuvel]

Some users of this library (i.e., FVP-AArch64 and RTSM-A15_MPCore)
may be built to execute straight from NOR flash. Since device mappings
should have the XN attribute set (according to the architecture), mapping
the NOR flash as a device may prevent it from being executable.

Since the NOR flash DXE driver is perfectly capable of setting the correct
attributes for the region it needs to write to, and since we will be
executing from DRAM by that time anyway, we can simply map the NOR flash
as normal memory initially.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c 
b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
index 6c5e494d502c..c6df2e1b3de4 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
@@ -126,7 +126,7 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_NOR0_BASE;
   VirtualMemoryTable[Index].Length   = ARM_VE_SMB_NOR0_SZ + 
ARM_VE_SMB_NOR1_SZ;
-  VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+  VirtualMemoryTable[Index].Attributes   = CacheAttributes;
 
   // SMB CS2 - SRAM
   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
-- 
1.9.1

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[edk2] [PATCH v3 2/4] ArmVirtPkg/ArmVirtPlatformLib: do not map executable NOR region as device

[Ard Biesheuvel]

The ARM architecture version 7 and later mandates that device mappings
have the XN (non-executable) bit set, to prevent speculative instruction
fetches from read-sensitive regions. This implies that we should not map
regions as device if we want to execute from them, so the NOR region that
contains our FD image should be mapped as normal memory instead.

The MMU code deals correctly with overlapping ARM_MEMORY_REGION_DESCRIPTOR
entries, and later entries in the array take precedence over earlier ones.
So simply add an entry to the end of the array that overrides the mapping
attributes of the FD image, wherever it resides.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c 
b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
index d5d288fb1b48..530f7d608e0b 100644
--- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
+++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
@@ -22,7 +22,7 @@
 #include 
 
 // Number of Virtual Memory Map Descriptors
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  4
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  5
 
 // DDR attributes
 #define DDR_ATTRIBUTES_CACHEDARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
@@ -100,8 +100,14 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[2].Length   = ArmGetPhysAddrTop () - 
VirtualMemoryTable[2].PhysicalBase;
   VirtualMemoryTable[2].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
 
+  // Remap the FD region as normal executable memory
+  VirtualMemoryTable[3].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress);
+  VirtualMemoryTable[3].VirtualBase  = VirtualMemoryTable[3].PhysicalBase;
+  VirtualMemoryTable[3].Length   = FixedPcdGet32 (PcdFdSize);
+  VirtualMemoryTable[3].Attributes   = CacheAttributes;
+
   // End of Table
-  ZeroMem ([3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
+  ZeroMem ([4], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
 
   *VirtualMemoryMap = VirtualMemoryTable;
 }
-- 
1.9.1

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[edk2] [PATCH v3 1/4] ArmPkg/AArch64Mmu: remove unused GcdAttributeToArmAttribute()

[Ard Biesheuvel]

The function GcdAttributeToArmAttribute() is not used anywhere in the
code base, and is only defined for AARCH64 and not for ARM. It also
fails to set the bits for shareability and non-executability that we
require for correct operation. So remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Include/Chipset/AArch64.h   |  5 ---
 ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 42 
 2 files changed, 47 deletions(-)

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index 47993ec9fc3b..f6a89012898c 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -178,11 +178,6 @@ PageAttributeToGcdAttribute (
   IN UINT64 PageAttributes
   );
 
-UINT64
-GcdAttributeToPageAttribute (
-  IN UINT64 GcdAttributes
-  );
-
 UINTN
 ArmWriteCptr (
   IN  UINT64 Cptr
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c 
b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
index 8829c6286b36..c8b3d4a121b1 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
@@ -96,48 +96,6 @@ PageAttributeToGcdAttribute (
   return GcdAttributes;
 }
 
-UINT64
-GcdAttributeToPageAttribute (
-  IN UINT64 GcdAttributes
-  )
-{
-  UINT64  PageAttributes;
-
-  switch (GcdAttributes & 0xFF) {
-  case EFI_MEMORY_UC:
-PageAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
-break;
-  case EFI_MEMORY_WC:
-PageAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
-break;
-  case EFI_MEMORY_WT:
-PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;
-break;
-  case EFI_MEMORY_WB:
-PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;
-break;
-  default:
-DEBUG ((EFI_D_ERROR, "GcdAttributeToPageAttribute: 0x%X attributes is not 
supported.\n", GcdAttributes));
-ASSERT (0);
-// If no match has been found then we mark the memory as device memory.
-// The only side effect of using device memory should be a slow down in 
the performance.
-PageAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
-  }
-
-  // Determine protection attributes
-  if (GcdAttributes & EFI_MEMORY_WP) {
-// Read only cases map to write-protect
-PageAttributes |= TT_AP_RO_RO;
-  }
-
-  // Process eXecute Never attribute
-  if (GcdAttributes & EFI_MEMORY_XP) {
-PageAttributes |= (TT_PXN_MASK | TT_UXN_MASK);
-  }
-
-  return PageAttributes;
-}
-
 ARM_MEMORY_REGION_ATTRIBUTES
 GcdAttributeToArmAttribute (
   IN UINT64 GcdAttributes
-- 
1.9.1

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[edk2] [PATCH v3 0/4] improve handling of device attributes on ARM/AARCH64

[Ard Biesheuvel]

This series fixes some issues that exist in the code with regard to how device
mappings are created. According to the architecture, read-sensitive devices
should be mapped with the non-execute bits (XN/PXN/UXN) to prevent speculative
instruction fetches from accessing those regions.

Changes since v2:
- simplified patch #2 to simply override the FD image attributes instead of
  introducing non-trivial logic to make all regions exactly adjacent

Patch #1 removes GcdAttributeToArmAttribute() rather than fixing it, since it
is unused anyway. Note that it fails to set shareability attributes on cached
mappings as well, so it is broken in more than one way. (identical to v1)

Patch #2 ensures that the ArmVirtQemu firmware is still executable in place
after changing the device mapping attribute set to include the non-exec
attributes. (new in v2)

Patch #3 does the same for FVP-AArch64 and RTSM-A15_MPCore. (new in v2)

Patch #4 makes the changes to ensure that all device mappings have the XN bit
set. The v2 version now covers ARM as well.

Ard Biesheuvel (4):
  ArmPkg/AArch64Mmu: remove unused GcdAttributeToArmAttribute()
  ArmVirtPkg/ArmVirtPlatformLib: do not map executable NOR region as
device
  ArmVExpressPkg/ArmVExpressLibRTSM: map NOR flash as cached
  ArmPkg/Mmu: set required XN attributes for device mappings

 ArmPkg/Include/Chipset/AArch64.h   |  5 ---
 ArmPkg/Include/Chipset/ArmV7Mmu.h  |  2 +
 ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 47 
++--
 ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c |  2 +-
 ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c |  2 +-
 ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c| 10 -
 6 files changed, 16 insertions(+), 52 deletions(-)

-- 
1.9.1

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Re: [edk2] [PATCH v3 2/4] ArmVirtPkg/ArmVirtPlatformLib: do not map executable NOR region as device

[Ard Biesheuvel]

On 18 November 2015 at 10:02, Laszlo Ersek <ler...@redhat.com> wrote:
> On 11/18/15 09:25, Ard Biesheuvel wrote:
>> The ARM architecture version 7 and later mandates that device mappings
>> have the XN (non-executable) bit set, to prevent speculative instruction
>> fetches from read-sensitive regions. This implies that we should not map
>> regions as device if we want to execute from them, so the NOR region that
>> contains our FD image should be mapped as normal memory instead.
>>
>> The MMU code deals correctly with overlapping ARM_MEMORY_REGION_DESCRIPTOR
>> entries, and later entries in the array take precedence over earlier ones.
>> So simply add an entry to the end of the array that overrides the mapping
>> attributes of the FD image, wherever it resides.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>  ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c | 10 --
>>  1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c 
>> b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> index d5d288fb1b48..530f7d608e0b 100644
>> --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> @@ -22,7 +22,7 @@
>>  #include 
>>
>>  // Number of Virtual Memory Map Descriptors
>> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  4
>> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  5
>>
>>  // DDR attributes
>>  #define DDR_ATTRIBUTES_CACHEDARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
>> @@ -100,8 +100,14 @@ ArmPlatformGetVirtualMemoryMap (
>>VirtualMemoryTable[2].Length   = ArmGetPhysAddrTop () - 
>> VirtualMemoryTable[2].PhysicalBase;
>>VirtualMemoryTable[2].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>>
>> +  // Remap the FD region as normal executable memory
>> +  VirtualMemoryTable[3].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress);
>> +  VirtualMemoryTable[3].VirtualBase  = VirtualMemoryTable[3].PhysicalBase;
>> +  VirtualMemoryTable[3].Length   = FixedPcdGet32 (PcdFdSize);
>> +  VirtualMemoryTable[3].Attributes   = CacheAttributes;
>> +
>>// End of Table
>> -  ZeroMem ([3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
>> +  ZeroMem ([4], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
>>
>>*VirtualMemoryMap = VirtualMemoryTable;
>>  }
>>
>
> Thanks, this update is very welcome.
>
> Please don't forget to test it on phys hw / KVM. (If you haven't done so
> yet.)
>

Yes, both AARCH64 and ARM still work fine under KVM on my Seattle Overdrive

> Reviewed-by: Laszlo Ersek <ler...@redhat.com>

Thanks
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Re: [edk2] [PATCH v3 2/4] ArmVirtPkg/ArmVirtPlatformLib: do not map executable NOR region as device

[Ard Biesheuvel]

On 19 November 2015 at 00:55, Heyi Guo <heyi@linaro.org> wrote:
>
>
> On 11/18/2015 04:25 PM, Ard Biesheuvel wrote:
>>
>> The ARM architecture version 7 and later mandates that device mappings
>> have the XN (non-executable) bit set, to prevent speculative instruction
>> fetches from read-sensitive regions. This implies that we should not map
>> regions as device if we want to execute from them, so the NOR region that
>> contains our FD image should be mapped as normal memory instead.
>>
>> The MMU code deals correctly with overlapping ARM_MEMORY_REGION_DESCRIPTOR
>> entries, and later entries in the array take precedence over earlier ones.
>> So simply add an entry to the end of the array that overrides the mapping
>> attributes of the FD image, wherever it resides.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>   ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c | 10 --
>>   1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> index d5d288fb1b48..530f7d608e0b 100644
>> --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> @@ -22,7 +22,7 @@
>>   #include 
>> // Number of Virtual Memory Map Descriptors
>> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  4
>> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  5
>> // DDR attributes
>>   #define DDR_ATTRIBUTES_CACHEDARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
>> @@ -100,8 +100,14 @@ ArmPlatformGetVirtualMemoryMap (
>> VirtualMemoryTable[2].Length   = ArmGetPhysAddrTop () -
>> VirtualMemoryTable[2].PhysicalBase;
>> VirtualMemoryTable[2].Attributes   =
>> ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>>   +  // Remap the FD region as normal executable memory
>> +  VirtualMemoryTable[3].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress);
>> +  VirtualMemoryTable[3].VirtualBase  =
>> VirtualMemoryTable[3].PhysicalBase;
>> +  VirtualMemoryTable[3].Length   = FixedPcdGet32 (PcdFdSize);
>> +  VirtualMemoryTable[3].Attributes   = CacheAttributes;
>> +
>> // End of Table
>> -  ZeroMem ([3], sizeof
>> (ARM_MEMORY_REGION_DESCRIPTOR));
>> +  ZeroMem ([4], sizeof
>> (ARM_MEMORY_REGION_DESCRIPTOR));
>
>
> Just a minor suggestion: is it better to use
> MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS - 1 instead of 4 to avoid changing two
> pieces of code when changing descriptor number?
>

The end of table entry should follow directly after the last valid
one, while the maximum number of entries could be higher (e.g., I
could have changed it to 8, since we will end up using a single page
anyway).
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Re: [edk2] Armv8 64bit: System error booting linux from the UEFI

[Ard Biesheuvel]

On 19 November 2015 at 05:48, Vladimir Olovyannikov
<volov...@broadcom.com> wrote:
>
>
>> -Original Message-
>> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> Sent: Tuesday, November 17, 2015 11:03 PM
>> To: Mark Rutland
>> Cc: Vladimir Olovyannikov; edk2-devel@lists.01.org
>> Subject: Re: [edk2] Armv8 64bit: System error booting linux from the UEFI
>>
>> On 17 November 2015 at 12:22, Mark Rutland <mark.rutl...@arm.com>
>> wrote:
>> [...]
>> >> Did that. Regardless of ArmInstructionSycnhronizationBarrier() and
>> subsequent enabling of the async abort
>> >> SError happens right in the ArmWriteVBar.
>> >
>> > Ok.
>> >
>> > Two theories:
>> >
>> > * When we take an exception, SError is masked. So perhaps we take
>> >   another exception immediately after writing to VBAR_EL2, and that
>> >   exception handler triggers the SError. I imagine that must be an
>> >   asynchronous exception (i.e. one we can mask with DAIF).
>> >
>> >   We should be able to see if that's the case if we change the
>> >   ArmWriteVbar logic for EL2 to something like:
>> >
>> >   mrs   x1, daif
>> >   msr   daifset, #(0xb << 6) // D_IF masked
> After this instruction DAIF is 0x2C0 (bit A is not masked)
>> >   mrs   vbar_el2, x0
>  After msr vbar_el2, x0, isb+nop, and msr DAIFClr,#4 no SError - bit A was 
> not masked.
>> >   isb
>> >   nop
>> >   mrs   daif, x1
>> >   nop
>> >
>> >   If that is the case, I'd expect to take the SError immediately after
>> >   the write back to daif.
> Mark, I tried this and made some other experiments with DAIF masked.
> It looks like the x0 address is not accepted by msr vbar_el2,x0.
> I tried to write vector in the very beginning, like this:
> mov x0, #0800
> movk x0, #8500 lsl 16
> msr vbar_el2, x0
> isb
> nop
> and hit SError on the first msr DAIFClr,#4
> I run UEFI from within the u-boot. Probably better would be just flash the 
> UEFI and run UEFI only, and boot that way.
> Anyway when I setup vbar_el2 with u-boot exception vector address, at least  
> no SError happens.
> If I setup u-boot vector with the UEFI vector address, it hits SError right 
> away.
> (Boot into u-boot, load UEFI, then load u-boot and start execution with 
> 0x85008800 vector address)
>
> A side note: I got the u-boot source for that board and there are several 
> hacks made to avoid SError (writing 0x20 to the HCR register (reroute SError 
> to EL2), and
> just ERET from SError exception handler, and then write 0x0 to HCR before 
> Linux boots), so it could be an HW issue I am not aware of as of yet.

OK, that would explain it. Note that the kernel will replace the EL2
vector table if booted at EL2, so this is definitely not a workaround
that you would want to reuse in UEFI.

>> >
>> >   Ard, do we ever expect to take (non-fatal) synchronous exceptions?
>> >
>>
>> Never this early, since this version of the vector table is installed
>> very early, and deadloops on any exception that it takes.
>>
>> Only after CpuDxe is initialized, we can handle dispatch exceptions
>> and interrupts normally,  but this is typically only used for the
>> timer interrupt. I could not find any invocations of
>> RegisterInterruptHandler() that installs a handler for synchronous
>> exceptions.
>>
>> > * As Ard originally suggested, the VBAR_EL2 address is close to some
>> >   memory region we shouldn't speculatively fetch from, but for some
>> >   reason do.
>> >
>> >   Can you take a look at the new VBAR_EL2 value and your memory map,
>> and
>> >   see if it's close to anything that shouldn't be fetched from?
>> >
>>
>> I'd still like to double check the value of VBAR_EL2 as it is written,
>> it should be a multiple of 2 KB
> It is always at 0x85008800 which is a multiple of 2K
> Any other things to verify?
>

No, that looks fine. You need to get in touch with the authors of the
U-Boot code to figure out what it is they are working around. Simply
ignoring SErrors is obviously not a long term solution.

-- 
Ard.
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[edk2] [PATCH] ArmPlatformPkg/PrePeiCore: add missing entries to AArch64 vector table

[Ard Biesheuvel]

The PrePeiCore vector table for AArch64 mode is only half populated.
However unlikely, if exceptions from lower exception levels are ever
taken, they should be reported correctly, rather than causing a
recursive undefined instruction fault on the zero padding that was
introduced by commit SVN r18904 ("ArmPkg/ArmPlatformPkg: position
vectors relative to base"). So add the missing entries, and wire
them up to the default handler.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/PrePeiCore/AArch64/Exception.S | 40 
 1 file changed, 40 insertions(+)

diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S 
b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
index b31854ced256..75cd98ff4863 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
@@ -77,4 +77,44 @@ _DefaultSError_h:
   mov  x0, #EXCEPT_AARCH64_SERROR
   TO_HANDLER
 
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC)
+_DefaultSyncExceptHandler_LowerA64:
+  mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ)
+_DefaultIrq_LowerA64:
+  mov  x0, #EXCEPT_AARCH64_IRQ
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ)
+_DefaultFiq_LowerA64:
+  mov  x0, #EXCEPT_AARCH64_FIQ
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR)
+_DefaultSError_LowerA64:
+  mov  x0, #EXCEPT_AARCH64_SERROR
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC)
+_DefaultSyncExceptHandler_LowerA32:
+  mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ)
+_DefaultIrq_LowerA32:
+  mov  x0, #EXCEPT_AARCH64_IRQ
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ)
+_DefaultFiq_LowerA32:
+  mov  x0, #EXCEPT_AARCH64_FIQ
+  TO_HANDLER
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR)
+_DefaultSError_LowerA32:
+  mov  x0, #EXCEPT_AARCH64_SERROR
+  TO_HANDLER
+
 VECTOR_END(PeiVectorTable)
-- 
1.9.1

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Re: [edk2] [PATCH] ArmPkg: ArmLib: purge incorrect ArmDrainWriteBuffer () alias

[Ard Biesheuvel]

On 19 November 2015 at 17:25, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> In ArmLib, there exists an alias for ArmDataSynchronizationBarrier,
> named after one of several names for the pre-ARMv6 cp15 operation that
> was formalised into the Data Synchronization Barrier in ARMv6.
>
> This alias is also the one called from within ArmLib, in preference of
> the correct name. Through the power of code reuse, this name slipped
> into the AArch64 variant as well.
>
> Expunge it from the codebase.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Leif Lindholm <leif.lindh...@linaro.org>

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

> ---
>  ArmPkg/Include/Library/ArmLib.h| 6 --
>  ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 8 
>  ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 2 --
>  ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c | 8 
>  ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 2 --
>  ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm   | 2 --
>  6 files changed, 8 insertions(+), 20 deletions(-)
>
> diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
> index a328146..9622444 100644
> --- a/ArmPkg/Include/Library/ArmLib.h
> +++ b/ArmPkg/Include/Library/ArmLib.h
> @@ -393,12 +393,6 @@ ArmSetHighVectors (
>
>  VOID
>  EFIAPI
> -ArmDrainWriteBuffer (
> -  VOID
> -  );
> -
> -VOID
> -EFIAPI
>  ArmDataMemoryBarrier (
>VOID
>);
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c 
> b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> index dec125f..ec35097 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
> @@ -33,7 +33,7 @@ AArch64DataCacheOperation (
>
>AArch64AllDataCachesOperation (DataCacheOperation);
>
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>
>if (SavedInterruptState) {
>  ArmEnableInterrupts ();
> @@ -46,7 +46,7 @@ ArmInvalidateDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
>  }
>
> @@ -56,7 +56,7 @@ ArmCleanInvalidateDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
>  }
>
> @@ -66,6 +66,6 @@ ArmCleanDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
>  }
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S 
> b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> index df2dc93..c530d19 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> @@ -26,7 +26,6 @@ GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
>  GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
>  GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
>  GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmDrainWriteBuffer)
>  GCC_ASM_EXPORT (ArmEnableMmu)
>  GCC_ASM_EXPORT (ArmDisableMmu)
>  GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
> @@ -364,7 +363,6 @@ ASM_PFX(ArmDataMemoryBarrier):
>
>
>  ASM_PFX(ArmDataSynchronizationBarrier):
> -ASM_PFX(ArmDrainWriteBuffer):
>dsb   sy
>ret
>
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c 
> b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
> index b53f455..23a7f2f 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
> @@ -32,7 +32,7 @@ ArmV7DataCacheOperation (
>
>ArmV7AllDataCachesOperation (DataCacheOperation);
>
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>
>if (SavedInterruptState) {
>  ArmEnableInterrupts ();
> @@ -45,7 +45,7 @@ ArmInvalidateDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
>  }
>
> @@ -55,7 +55,7 @@ ArmCleanInvalidateDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
>  }
>
> @@ -65,6 +65,6 @@ ArmCleanDataCache (
>VOID
>)
>  {
> -  ArmDrainWriteBuffer ();
> +  ArmDataSynchronizationBarrier ();
>ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
>  }
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S 
> b/ArmPkg/Library/Ar

Re: [edk2] [PATCH V2 08/12] BeagleBoardPkg: Use SerialDxe in MdeModulePkg instead of EmbeddedPkg

[Ard Biesheuvel]

On 17 November 2015 at 12:07, Star Zeng <star.z...@intel.com> wrote:
> It is also to remove the reference to TemplateSerialPortExtLib in EmbeddedPkg.
>
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <liming@intel.com>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Star Zeng <star.z...@intel.com>

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

> ---
>  BeagleBoardPkg/BeagleBoardPkg.dsc | 4 ++--
>  BeagleBoardPkg/BeagleBoardPkg.fdf | 3 ++-
>  2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
> b/BeagleBoardPkg/BeagleBoardPkg.dsc
> index 5338492..b90576e 100644
> --- a/BeagleBoardPkg/BeagleBoardPkg.dsc
> +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
> @@ -2,6 +2,7 @@
>  # Beagle board package.
>  #
>  # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
> +# Copyright (c) 2015, Intel Corporation. All rights reserved.
>  #
>  #This program and the accompanying materials
>  #are licensed and made available under the terms and conditions of the 
> BSD License
> @@ -87,7 +88,6 @@ [LibraryClasses.common]
>PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
>
>SerialPortLib|Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf
> -  
> SerialPortExtLib|EmbeddedPkg/Library/TemplateSerialPortExtLib/TemplateSerialPortExtLib.inf
>SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
>
>RealTimeClockLib|Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.inf
> @@ -401,7 +401,7 @@ [Components.common]
>MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
>MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
>MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> -  EmbeddedPkg/SerialDxe/SerialDxe.inf
> +  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
>MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
>  #
>  # This version uses semi-hosting console
> diff --git a/BeagleBoardPkg/BeagleBoardPkg.fdf 
> b/BeagleBoardPkg/BeagleBoardPkg.fdf
> index fb1dc26..b17ad7d 100644
> --- a/BeagleBoardPkg/BeagleBoardPkg.fdf
> +++ b/BeagleBoardPkg/BeagleBoardPkg.fdf
> @@ -1,6 +1,7 @@
>  # FLASH layout file for Beagle board.
>  #
>  # Copyright (c) 2009, Apple Inc. All rights reserved.
> +# Copyright (c) 2015, Intel Corporation. All rights reserved.
>  #
>  #This program and the accompanying materials
>  #are licensed and made available under the terms and conditions of the 
> BSD License
> @@ -110,7 +111,7 @@ [FV.FvMain]
>INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
>INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
>INF 
> MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> -  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
> +  INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
>INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
>
>INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> --
> 1.9.5.msysgit.0
>
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Re: [edk2] [PATCH V2 12/12] EmbeddedPkg: Remove SerialDxe and SerialPortExtLib libraries

[Ard Biesheuvel]

On 17 November 2015 at 12:07, Star Zeng <star.z...@intel.com> wrote:
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <liming@intel.com>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Star Zeng <star.z...@intel.com>

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

> ---
>  EmbeddedPkg/EmbeddedPkg.dsc|   6 +-
>  EmbeddedPkg/Include/Library/SerialPortExtLib.h | 116 --
>  .../SerialPortExtLibNull/SerialPortExtLibNull.c|  48 ---
>  .../SerialPortExtLibNull/SerialPortExtLibNull.inf  |  30 --
>  .../TemplateSerialPortExtLib.c |  79 -
>  .../TemplateSerialPortExtLib.inf   |  36 --
>  EmbeddedPkg/SerialDxe/SerialDxe.inf|  55 ---
>  EmbeddedPkg/SerialDxe/SerialIo.c   | 391 
> -
>  8 files changed, 1 insertion(+), 760 deletions(-)
>  delete mode 100644 EmbeddedPkg/Include/Library/SerialPortExtLib.h
>  delete mode 100644 
> EmbeddedPkg/Library/SerialPortExtLibNull/SerialPortExtLibNull.c
>  delete mode 100644 
> EmbeddedPkg/Library/SerialPortExtLibNull/SerialPortExtLibNull.inf
>  delete mode 100644 
> EmbeddedPkg/Library/TemplateSerialPortExtLib/TemplateSerialPortExtLib.c
>  delete mode 100644 
> EmbeddedPkg/Library/TemplateSerialPortExtLib/TemplateSerialPortExtLib.inf
>  delete mode 100644 EmbeddedPkg/SerialDxe/SerialDxe.inf
>  delete mode 100644 EmbeddedPkg/SerialDxe/SerialIo.c
>
> diff --git a/EmbeddedPkg/EmbeddedPkg.dsc b/EmbeddedPkg/EmbeddedPkg.dsc
> index 6719eea..a5507ed 100644
> --- a/EmbeddedPkg/EmbeddedPkg.dsc
> +++ b/EmbeddedPkg/EmbeddedPkg.dsc
> @@ -2,7 +2,7 @@
>  # Embedded Package
>  #
>  #
> -# Copyright (c) 2007, Intel Corporation. All rights reserved.
> +# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
>  # Copyright (c) 2012-2015, ARM Ltd. All rights reserved.
>  #
>  #This program and the accompanying materials
> @@ -68,7 +68,6 @@ [LibraryClasses.common]
>PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
>
>
> SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
> -  
> SerialPortExtLib|EmbeddedPkg/Library/TemplateSerialPortExtLib/TemplateSerialPortExtLib.inf
>
> RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
>
> EfiResetSystemLib|EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
>GdbSerialLib|EmbeddedPkg/Library/GdbSerialLib/GdbSerialLib.inf
> @@ -249,8 +248,6 @@ [Components.common]
>EmbeddedPkg/Library/GdbSerialLib/GdbSerialLib.inf
>
> EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
>EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
> -  MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
> -  EmbeddedPkg/Library/SerialPortExtLibNull/SerialPortExtLibNull.inf
>EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
>EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
>
> EmbeddedPkg/Library/LzmaHobCustomDecompressLib/LzmaHobCustomDecompressLib.inf
> @@ -261,7 +258,6 @@ [Components.common]
>EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
>EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
>EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> -  EmbeddedPkg/SerialDxe/SerialDxe.inf
>EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
>EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf {
>  
> diff --git a/EmbeddedPkg/Include/Library/SerialPortExtLib.h 
> b/EmbeddedPkg/Include/Library/SerialPortExtLib.h
> deleted file mode 100644
> index 0d0abb3..000
> --- a/EmbeddedPkg/Include/Library/SerialPortExtLib.h
> +++ /dev/null
> @@ -1,116 +0,0 @@
> -/** @file
> -
> -  Serial I/O port control interface extension.
> -
> -  This library provides an extension to the library providing common
> -  serial I/O port functions that is defined in MdePkg. The aim is to
> -  provide more control over the functionalities of a serial port. The
> -  extension covers all the needs of the UEFI Serial I/O Protocol.
> -  Though, its use is not restricted to the UEFI Serial I/O Protocol.
> -  It could for example be used in the PEI phase of the boot sequence
> -  as well.
> -
> -  Copyright (c) 2012 - 2014, ARM Ltd. All rights reserved.
> -
> -  This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD 
> License
> -  which accompanies this distribution.  The full text of 

Re: [edk2] [PATCH] ArmPkg: Flush cache after allocating UC memory

[Ard Biesheuvel]

On 20 November 2015 at 06:32, Heyi Guo <heyi@linaro.org> wrote:
> It is implied that the memory returned from UncachedMemoryAllocationLib
> should have cache cleaned. So we clean and invalidate memory range after
> changing memory attribute to uncached.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Heyi Guo <heyi@linaro.org>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
>  .../Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c  | 3 
> +++
>  .../UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf| 1 +
>  2 files changed, 4 insertions(+)
>
> diff --git 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> index b859f63..3242579 100644
> --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> +++ b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> @@ -25,6 +25,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  VOID *
>  UncachedInternalAllocatePages (
> @@ -165,6 +166,8 @@ AllocatePagesFromList (
>  return Status;
>}
>
> +  WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Memory, 
> EFI_PAGES_TO_SIZE (Pages));
> +

I think invalidate only should be fine here, since it is a new
allocation, and we are allocating full pages. Since the architectural
max value of CWG is 2 KB, we could never end up discarding data that
is not covered by the allocation itself.

>NewNode = AllocatePool (sizeof (FREE_PAGE_NODE));
>if (NewNode == NULL) {
>  ASSERT (FALSE);
> diff --git 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> index 0a0b6cb..d7a0f2f 100644
> --- 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> +++ 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> @@ -38,6 +38,7 @@
>MemoryAllocationLib
>PcdLib
>DxeServicesTableLib
> +  CacheMaintenanceLib
>
>  [Pcd]
>gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold
> --
> 2.6.2
>
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Re: [edk2] [PATCH V2 07/12] Omap35xxPkg SerialPortLib: Add GetControl/SetControl/SetAttributes implementation

[Ard Biesheuvel]

On 17 November 2015 at 12:07, Star Zeng <star.z...@intel.com> wrote:
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <liming@intel.com>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Star Zeng <star.z...@intel.com>
> ---
>  Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c | 84 
> +++++++
>  1 file changed, 84 insertions(+)
>

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

> diff --git a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c 
> b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c
> index 58f70d5..b0a8f5e 100644
> --- a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c
> +++ b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c
> @@ -3,6 +3,7 @@
>
>
>Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +  Copyright (c) 2015, Intel Corporation. All rights reserved.
>
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD 
> License
> @@ -122,3 +123,86 @@ SerialPortPoll (
>}
>  }
>
> +/**
> +  Sets the control bits on a serial device.
> +
> +  @param[in] ControlSets the bits of Control that are settable.
> +
> +  @retval RETURN_SUCCESSThe new control bits were set on the serial 
> device.
> +  @retval RETURN_UNSUPPORTEDThe serial device does not support this 
> operation.
> +  @retval RETURN_DEVICE_ERROR   The serial device is not functioning 
> correctly.
> +
> +**/
> +RETURN_STATUS
> +EFIAPI
> +SerialPortSetControl (
> +  IN UINT32 Control
> +  )
> +{
> +  return RETURN_UNSUPPORTED;
> +}
> +
> +/**
> +  Retrieve the status of the control bits on a serial device.
> +
> +  @param[out] Control   A pointer to return the current control 
> signals from the serial device.
> +
> +  @retval RETURN_SUCCESSThe control bits were read from the serial 
> device.
> +  @retval RETURN_UNSUPPORTEDThe serial device does not support this 
> operation.
> +  @retval RETURN_DEVICE_ERROR   The serial device is not functioning 
> correctly.
> +
> +**/
> +RETURN_STATUS
> +EFIAPI
> +SerialPortGetControl (
> +  OUT UINT32 *Control
> +  )
> +{
> +  *Control = 0;
> +  if (!SerialPortPoll ()) {
> +*Control = EFI_SERIAL_INPUT_BUFFER_EMPTY;
> +  }
> +  return RETURN_SUCCESS;
> +}
> +
> +/**
> +  Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
> +  data buts, and stop bits on a serial device.
> +
> +  @param BaudRate   The requested baud rate. A BaudRate value of 0 
> will use the
> +device's default interface speed.
> +  @param ReveiveFifoDepth   The requested depth of the FIFO on the receive 
> side of the
> +serial interface. A ReceiveFifoDepth value of 0 
> will use
> +the device's default FIFO depth.
> +  @param TimeoutThe requested time out for a single character in 
> microseconds.
> +This timeout applies to both the transmit and 
> receive side of the
> +interface. A Timeout value of 0 will use the 
> device's default time
> +out value.
> +  @param Parity The type of parity to use on this serial device. 
> A Parity value of
> +DefaultParity will use the device's default 
> parity value.
> +  @param DataBits   The number of data bits to use on the serial 
> device. A DataBits
> +vaule of 0 will use the device's default data 
> bit setting.
> +  @param StopBits   The number of stop bits to use on this serial 
> device. A StopBits
> +value of DefaultStopBits will use the device's 
> default number of
> +stop bits.
> +
> +  @retval RETURN_SUCCESSThe new attributes were set on the 
> serial device.
> +  @retval RETURN_UNSUPPORTEDThe serial device does not support this 
> operation.
> +  @retval RETURN_INVALID_PARAMETER  One or more of the attributes has an 
> unsupported value.
> +  @retval RETURN_DEVICE_ERROR   The serial device is not functioning 
> correctly.
> +
> +**/
> +RETURN_STATUS
> +EFIAPI
> +SerialPortSetAttributes (
> +  IN OUT UINT64 *BaudRate,
> +  IN OUT UINT32 *ReceiveFifoDepth,
> +  IN OUT UINT32 *Timeout,
> +  IN OUT EFI_PARITY_TYPE*Parity,
> +  IN OUT UINT8  *DataBits,
> +  IN OUT EFI_STOP_BITS_TYPE *StopBits
> +  )
> +{
> +  return RETURN_UNSUPPORTED;
> +}
> +
> --
> 1.9.5.msysgit.0
>
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Re: [edk2] [PATCH V2] ArmPkg: Invalidate cache after allocating UC memory

[Ard Biesheuvel]

On 23 November 2015 at 07:13, Heyi Guo <heyi@linaro.org> wrote:
> It is implied that the memory returned from UncachedMemoryAllocationLib
> should have cache invalidated. So we invalidate memory range after
> changing memory attribute to uncached.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Heyi Guo <heyi@linaro.org>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
>  .../Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c  | 3 
> +++
>  .../UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf    | 1 +
>  2 files changed, 4 insertions(+)
>

Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

Thanks Heyi,
Committed as SVN r18920


> diff --git 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> index b859f63..1dfc740 100644
> --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> +++ b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c
> @@ -25,6 +25,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  VOID *
>  UncachedInternalAllocatePages (
> @@ -165,6 +166,8 @@ AllocatePagesFromList (
>  return Status;
>}
>
> +  InvalidateDataCacheRange ((VOID *)(UINTN)Memory, EFI_PAGES_TO_SIZE 
> (Pages));
> +
>NewNode = AllocatePool (sizeof (FREE_PAGE_NODE));
>if (NewNode == NULL) {
>  ASSERT (FALSE);
> diff --git 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> index 0a0b6cb..d7a0f2f 100644
> --- 
> a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> +++ 
> b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> @@ -38,6 +38,7 @@
>MemoryAllocationLib
>PcdLib
>DxeServicesTableLib
> +  CacheMaintenanceLib
>
>  [Pcd]
>gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold
> --
> 2.6.2
>
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Re: [edk2] [PATCH 1/2] ArmVirtPkg/ArmVirtPlatformLib: reduce ID map size to GCD region size

[Ard Biesheuvel]

On 23 November 2015 at 12:41, Laszlo Ersek <ler...@redhat.com> wrote:
> On 11/21/15 10:44, Ard Biesheuvel wrote:
>> The ID mapping routines on virtual platforms simply map the entire
>> address space as device memory, and then punch some holes for regions
>> that need to be mapped cacheable. On virtual platforms hosted on CPUs
>> that support a large physical address range, this may result in a lot
>> of overhead, i.e., 4 KB of page tables for each 512 GB of address
>> space, which quickly adds up (i.e. 2 MB for the architectural maximum
>> of 48 bits).
>>
>> Since there may be a platform specific limit to the size of the (I)PA
>> space that is not reflected by CPU id registers, restrict the range of
>> the ID mapping to gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize bits,
>> since we cannot manipulate mappings above that limit anwyay (because
>> they are not covered by GCD). This allows the PCD to be set by platforms
>> whose (I)PA space has a fixed limit.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>  ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf | 1 +
>>  ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c  | 4 +++-
>>  2 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf 
>> b/ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf
>> index 22ee3625c37a..3cb3fb1f3aea 100644
>> --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf
>> +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf
>> @@ -61,3 +61,4 @@ [FixedPcd]
>>gArmTokenSpaceGuid.PcdArmPrimaryCore
>>gArmTokenSpaceGuid.PcdFdBaseAddress
>>gArmTokenSpaceGuid.PcdFdSize
>> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
>> diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c 
>> b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> index 530f7d608e0b..f6f95b02827c 100644
>> --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c
>> @@ -97,7 +97,9 @@ ArmPlatformGetVirtualMemoryMap (
>>// Peripheral space after DRAM
>>VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + 
>> VirtualMemoryTable[1].Length;
>>VirtualMemoryTable[2].VirtualBase  = VirtualMemoryTable[2].PhysicalBase;
>> -  VirtualMemoryTable[2].Length   = ArmGetPhysAddrTop () - 
>> VirtualMemoryTable[2].PhysicalBase;
>> +  VirtualMemoryTable[2].Length   = MIN(1UL << FixedPcdGet8 
>> (PcdPrePiCpuMemorySize),
>> + ArmGetPhysAddrTop ()) -
>> +   VirtualMemoryTable[2].PhysicalBase;
>
> (2) Can you please confirm that ArmGetPhysAddrTop() also retuns an
> exclusive limit? (I think so, but let me be sure...)
>

Yes, it is (1 << PArange), where PArange is one of { 32, 36, 40, 42, 44, 48 }

> (3) (Just a remark, there's no need to act upon this.) I think that the
> "PrePi" part in "PcdPrePiCpuMemorySize" is a misnomer here, but I agree
> that it doesn't matter much and/or there's no good way around it. For
> example, I did a very similar thing in SVN r16902. The
> "ArmPkg/Drivers/CpuPei" driver simply wants these PCDs, end of story.
>

Oh, absolutely. I just haven't gotten around to cosmetics yet, since
there are still so many actual issues to address :-)

> (4) Can please you fix up the whitespace between "MIN" and "(", plus
> also indent ArmGetPhysAddrTop() so that it matches the edk2 coding style?
>

Re space before ), ok
Re indent: shouldn't the line wrapper arguments be indented two spaces
wrt to the function they belong to?

> (5) We already set PcdPrePiCpuMemorySize in
> "ArmVirtPkg/ArmVirt.dsc.inc", namely to 40, from SVN r18428. (It is only
> done for 32-bit.) That has two consequences:
>
> (5a) In patch #2, instead of the change being currently proposed, can we
> simply make the setting independent of ARM, and let it take effect also
> for AARCH64?
>

>From an editorial pov, that makes sense, of course, but the motivation
for their presence is different:
- for AARCH64, it is an optimization, since it reduces wasted memory
on page tables when we know we are running on KVM
- for ARM, the limit is increased from the default value of 32 to 40,
since the virtualization extensions on ARM imply support for LPAE


> (That could even take care of the Xen case -- see BuildCpuHob() in
> "ArmVirtPkg/PrePi/PrePi.c".)
>

I think Xen may decide to use a 

Re: [edk2] [PATCH v2 0/2] ArmVirtPkg: limit IPA space to prevent page table memory waste

[Ard Biesheuvel]

On 23 November 2015 at 21:55, Wei Huang <w...@redhat.com> wrote:
>
>
> On 11/23/2015 11:10 AM, Ard Biesheuvel wrote:
>> Hello all,
>>
>> After Drew pointed out that mach-virt now populates the memory region beyond
>> DRAM, I am proposing this approach instead. Since KVM limits its IPA space to
>> 40 bits, there is simply no point in supporting anything beyond that for
>> ArmVirtQemu.
>>
>> I am cc'ing the Xen guys since they may run into similar issues on ThunderX, 
>> or
>> any other hardware whose support PA space is so large. Their platform does 
>> not
>> use ArmVirtPkg/ArmVirtPlatformLib though, so a similar change may be 
>> necssary on
>> the Xen end.
>>
>> Changes since v1:
>> - inverted order of the patches
>> - added Laszlo's R-b to patch #1 (formerly patch #2)
>> - use an explicit 64-bit type the left shift left hand operand, since the 
>> right
>>   hand operand may (and will) exceed 32 even on 32-bit platforms (patch #2,
>>   formerly patch #1)
>> - add missing space between MIN and (
>>
>> Ard Biesheuvel (2):
>>   ArmVirtPkg/ArmVirtQemu: limit the (I)PA space to 40 bits
>>   ArmVirtPkg/ArmVirtPlatformLib: reduce ID map size to GCD region size
>>
>>  ArmVirtPkg/ArmVirtQemu.dsc   | 4 
>>  ArmVirtPkg/Library/ArmVirtPlatformLib/ArmVirtPlatformLib.inf | 1 +
>>  ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c  | 4 +++-
>>  3 files changed, 8 insertions(+), 1 deletion(-)
>
> Tested-by: Wei Huang <w...@redhat.com>
>

Thanks guys.

Committed as SVN r18928 .. r18929
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