EFI_PEI_CORE_FV_LOCATION_PPI definition.
Patch2: Support PeiCore not in BFV scenario when shadowing.
Patch3: SecCore to find PeiCore from either non-BFV or BFV.
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Jian J Wang
Cc: Hao Wu
Cc: Ray Ni
Cc: Star Zeng
Cc: Eric Dong
Cc: Laszlo Ersek
Chasel
1.1
Signed-off-by: Chasel Chiu
---
MdePkg/Include/Ppi/PeiCoreFvLocation.h | 53
+
MdePkg/MdePkg.dec | 11 +--
2 files changed, 62 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/Ppi/PeiCoreFvLocation.h
b
booting successfully.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
UefiCpuPkg/SecCore/SecMain.c | 35 +--
UefiCpuPkg/SecCore/SecCore.inf | 3 ++-
UefiCpuPkg/SecCore/SecMain.h
Cc: Ray Ni
Cc: Star Zeng
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 58
+-
MdeModulePkg/Core/Pei/PeiMain.h | 3 ++-
MdeModulePkg
1.1
Signed-off-by: Chasel Chiu
---
MdePkg/Include/Ppi/PeiCoreFvLocation.h | 53
+
MdePkg/MdePkg.dec | 11 +--
2 files changed, 62 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/Ppi/PeiCoreFvLocation.h
b
EFI_PEI_CORE_FV_LOCATION_PPI definition.
Patch2: Support PeiCore not in BFV scenario when shadowing.
Patch3: SecCore to find PeiCore from either non-BFV or BFV.
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Jian J Wang
Cc: Hao Wu
Cc: Ray Ni
Cc: Star Zeng
Cc: Eric Dong
Cc: Laszlo Ersek
Chasel
Cc: Ray Ni
Cc: Star Zeng
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 58
+-
MdeModulePkg/Core/Pei/PeiMain.h | 3 ++-
MdeModulePkg
booting successfully.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
UefiCpuPkg/SecCore/SecMain.c | 35 +--
UefiCpuPkg/SecCore/SecCore.inf | 3 ++-
UefiCpuPkg/SecCore/SecMain.h
1.1
Signed-off-by: Chasel Chiu
---
MdePkg/Include/Ppi/PeiCoreFvLocation.h | 48
MdePkg/MdePkg.dec | 11 +--
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/Ppi/PeiCoreFvLocation.h
b/MdePkg
booting successfully.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
UefiCpuPkg/SecCore/SecMain.c | 35 +--
UefiCpuPkg/SecCore/SecCore.inf | 3 ++-
UefiCpuPkg/SecCore/SecMain.h
EFI_PEI_CORE_FV_LOCATION_PPI definition.
Patch2: Support PeiCore not in BFV scenario when shadowing.
Patch3: SecCore to find PeiCore from either non-BFV or BFV.
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Jian J Wang
Cc: Hao Wu
Cc: Ray Ni
Cc: Star Zeng
Cc: Eric Dong
Cc: Laszlo Ersek
Chasel
Cc: Ray Ni
Cc: Star Zeng
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 53
-
MdeModulePkg/Core/Pei/PeiMain.h | 3 ++-
MdeModulePkg/Core
in each FV and correct debug information will
be reported.
Test: Booted with internal platform successfully.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
UefiCpuPkg/SecCore/FindPeiCore.c | 60
Agreement 1.1
Signed-off-by: Chasel Chiu
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c
| 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib
installed successfully.
Cc: Nate DeSimone
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/Ppi/FspmArchConfigPpi.h | 54
++
IntelFsp2Pkg/IntelFsp2Pkg.dec| 3
Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
Platform/Intel/MinPlatformPkg/PlatformInit/Library/SiliconPolicyInitLibNull/SiliconPolicyInitLibNull.inf
| 6 +++---
Platform/Intel/MinPlatformPkg/PlatformInit/Library/SiliconPolicyUpdateLibNull/SiliconPolicyUpdateLibNull.inf
| 6
Agreement 1.1
Signed-off-by: Chasel Chiu
---
Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconInitPreMem.c
| 8 +---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c
| 48
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1477
There was unused keyword added in FspmArchConfigPpi.h
header block and should be removed.
Cc: Nate DeSimone
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/Ppi
booting successfully
Cc: Nate DeSimone
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c | 27
++-
IntelFsp2Pkg/Include/Library/FspCommonLib.h | 21
internal platform and booting successfully
with both modes.
Cc: Nate DeSimone
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecMain.c | 86
FixedAtBuild PCD is suggested to be used instead
of FeatureFlag PCD so extend this tool to support.
Also skipped PCDs which commented out by '#'.
Cc: Jiewen Yao
Cc: Gao Liming
Cc: Zhu Yonghong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
In
UPD header files successfully.
Cc: Jiewen Yao
Cc: Gao Liming
Cc: Zhu Yonghong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/IntelFsp2Pkg/Tools/GenC
'*' in DSC and
generated UPD header files are correct.
Cc: Jiewen Yao
Cc: Gao Liming
Cc: Zhu Yonghong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 68 +++--
1 fil
: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index c9b7bc5373..7e61b00ab8 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools
Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.
Cc: Jiewen Yao
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
Liming
Cc: Zhu Yonghong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 15 +++
1 file changed, 15 insertions(+)
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 059cfcb7e4
input
Cc: Jiewen Yao
Cc: Gao Liming
Cc: Zhu Yonghong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b
Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspGlobalData.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 7de26606a7..ccc9ecd78a 100644
--- a/IntelFsp2Pkg
to DXE.
Test: Verified FSP API and DISPATCH modes on 2 internal
platforms and both boot successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c | 59
transferring
to DXE.
Test: Verified FSP API and DISPATCH modes on 2 internal
platforms and both boot successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecMain.c | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
b/IntelFsp2Pkg/FspSecCore/SecMain.c
index 37fd4dfdeb
many interrupts the FSP IDT table can support.
Test: Verified on internal platform and boots successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 1 +
IntelFsp2Pkg
: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecMain.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
b/IntelFsp2Pkg/FspSecCore/SecMain.c
index ddbfc4fcdf..f319c68cc5 100644
--- a/IntelFsp2Pkg
Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecMain.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
b/IntelFsp2Pkg/FspSecCore/SecMain.c
index f319c68cc5..aed8893ff0 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecMain.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
b/IntelFsp2Pkg/FspSecCore/SecMain.c
index f319c68cc5..70460a3c8b 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
modes booted successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 16 ++--
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14
modes booted successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 20
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14
AsmExecute32BitCode is assembly code and needs EFIAPI
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
FSP binary potentially can include X64 drivers to
simplify implementation or support new features so
update SplitFspBin.py to support x64 image headers.
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/SplitFspBin.py | 82
UPD allocation and patching can be done outside FspWrapper
as implementation choice so adding a PCD to select between
original FspWrapper allocation model or outside model
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu
---
.../FspmWrapperPeim
Commit message issue and reverted commit
90c5bc081d15d077606131a61114ddfdefe62e61.
Will re-submit with correct formats.
Cc: Jiewen Yao
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352
Fixed line ending format wrong issues on some files.
Test: Verified building successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Wu Hao A
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
booted successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Wu Hao A
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 2 +-
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 2 +-
2 files
some files
Patch2 fixed constant if statement issue.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Wu Hao A
Chasel, Chiu (2):
IntelFsp2WrapperPkg: Fix line ending format issue
IntelFsp2WrapperPkg: Fix constant if statements issue
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 32
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352
Fixed line ending format wrong issues on some files.
Test: Verified building successfully.
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Wu Hao A
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Zeng Star
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
Maintainers.txt | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Maintainers.txt b/Maintainers.txt
index 9a36f0232b
Cc: Jiewen Yao
Cc: Desimone Nathaniel L
Cc: Zeng Star
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
Maintainers.txt | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Maintainers.txt b/Maintainers.txt
index 9a36f0232b
-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/Ppi/FspmArchConfigPpi.h | 41
+
IntelFsp2Pkg/IntelFsp2Pkg.dec| 3 +++
2 files changed, 44 insertions(+)
diff --git a/IntelFsp2Pkg/Include/Ppi
-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/Ppi/FspmArchConfigPpi.h | 54
++
IntelFsp2Pkg/IntelFsp2Pkg.dec| 3 +++
2 files changed, 57 insertions(+)
diff --git a/IntelFsp2Pkg
: Bob Feng
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu
---
BaseTools/Source/C/GenFv/GenFvInternalLib.c | 82
+-
1 file changed, 41 insertions
PcdSerialIoUartDebugEnable UPD is platform specific and should not
be included in generic GenCfgOpt.py script. Remove this and platform
DSC should control the default value instead.
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu
Platform is eligible to use either PcdsFeatureFlag or
PcdsFixedAtBuild for build configuration and requires
GenCfgOpt.py support.
Cc: Jiewen Yao
Cc: Maurice, Ma
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 2 +-
1
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