On 11/02/2015 02:11 PM, Ryan Harkin wrote:
On 2 November 2015 at 15:44, Jeremy Linton <jeremy.lin...@arm.com> wrote:
-EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, 0, 0)
+EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, 351-224,
224)
I was t
.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec | 4 +
ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc | 12 +
ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf
On 11/06/2015 01:31 AM, Ard Biesheuvel wrote:
On 5 November 2015 at 22:51, Jeremy Linton <jeremy.lin...@arm.com> wrote:
[Guids.common]
gArmJunoTokenSpaceGuid= { 0xa1147a20, 0x3144, 0x4f8d, { 0x82, 0x95,
0xb4, 0x83, 0x11, 0xc8, 0xe4, 0xa4 } }
+ gArmJ
On 11/06/2015 09:21 AM, Ard Biesheuvel wrote:
I would much prefer duplicating this over adding dynamic PCDs and
BEFORE/AFTER depexes. If you really insist, you can break it out into
a separate static library, but I wouldn't even bother tbh.
That solves the short term problem, but I expect that
with a functional
USB and network adapter. Given the previous PCIe change posted by Supreeth, and
this
one, the PCIe host bridge works with RHEL and hopefully future version of linux.
Jeremy Linton (1):
Update the ACPI device information for ARM Juno.
ArmPlatformPkg/ArmJunoPkg/AcpiTables
1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl | 1 +
ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl| 14 --
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPkg/ArmJ
On 10/16/2015 09:19 AM, Leif Lindholm wrote:
So ... I'm not sure there are any ACPI-aware drivers for the Mali bits
yet - I would be happier to leave that out until we've verified it
works.
Could you resubmit with that single change please?
Leif,
I will pull them, those changes were a little
to a full 64k as documented in the
Juno Platform SoC TRM. This makes it match the values used in some
other places.
Finally, add some _DSD entries for the SMSC ethernet chip.
The latter changes are required for the mainline kernels to use the adapter.
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
the previous PCIe change posted by Supreeth, and
this
one, the PCIe host bridge works with RHEL and hopefully future version of linux.
Jeremy Linton (1):
Update the ACPI device information for ARM Juno.
ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl | 1 +
ArmPlatformPkg/ArmJunoPkg
On 11/24/2015 11:08 AM, Leif Lindholm wrote:
+// Memory device
>+STATIC CONST ARM_TYPE17 mArmDefaultType17 = {
>+ {
>+{ // SMBIOS_STRUCTURE Hdr
>+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type
>+ sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length
>+ SMBIOS_HANDLE_DIMM,
>+},
>+
.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc | 12 +
ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf | 6 +
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c
in ArmJunoDxe was hoisted into the
platform.h file on the recommendation of others (to avoid a AFTER
dependency).
With this patch, both the EFI shell and linux dmidecode commands
return useful information.
Jeremy Linton (3):
Code to detect what juno revision we are running on.
Convert ArmJunoDxe
regardless of buggy EFI applications.
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
b/MdeModulePkg/Bus/Ata/Ata
On 01/07/2016 04:07 PM, Alan Ott wrote:
Hi all,
I'm interested in the status of the Marvell Yukon driver mentioned in
this thread:
http://thread.gmane.org/gmane.comp.bios.tianocore.devel/17544/focus=697
It looks like Leif Lindholm expressed an interest in getting it into his
OpenPlatformPkg,
On 02/05/2016 10:55 AM, Ryan Harkin wrote:
Hi Jeremy,
I just wanted to follow up on this old patch series. I've pushed them
into my tree for the 16.02 Platforms release [1].
I have an updated version for R2 that solves part of the R0/R1/R2
detection problems, as well as adding the A72's,
Add the A72 CPU type which is used in JunoR2.
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPkg/Include/Chipset/AArch64.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index e53605f..12fcbf6
Now that the code to detect the Juno revision is in
the header go ahead and covert the ArmJunoDxe to use it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/ArmJuno.dsc | 12 +
ArmPlatformPkg/ArmJunoPkg/ArmJuno.fdf | 6 +
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c
The code to detect what juno revision we are running on
is fairly small put it in a common header where it may be
used in a couple places.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/I
information.
Jeremy Linton (4):
ArmPlatformPkg: Add A72 CPU type
Code to detect what juno revision we are running on.
Convert ArmJunoDxe to use common juno revision code
ArmPlatformPkg/ArmJunoPkg: Create SMBIOS/DMI data for Juno
ArmPkg/Include/Chipset/AArch64.h | 1
On 02/05/2016 10:55 AM, Ryan Harkin wrote:
Hi Jeremy,
I just wanted to follow up on this old patch series. I've pushed them
into my tree for the 16.02 Platforms release [1].
If your preparing another release, please also pick up:
"AtaBusDxe: Bounce buffer IO operations if unaligned" or
(trimming)
|Not wishing to influence the discussion, just out of curiosity: Jeremy
|mentions "numerous other BlockIo protocol providers in edk2 bounce IO
|operations rather than simply allowing them to fail" -- can we see some
|examples? I wonder if, upon seeing that code, we could use "git
1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Universal/BdsDxe/FrontPage.c | 45 +++---
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
b/IntelFrameworkModulePkg/Uni
On 02/18/2016 08:55 PM, Zeng, Star wrote:
Jeremy,
(trimming)
- );
-TokenToUpdate = STRING_TOKEN (STR_FRONT_PAGE_MEMORY_SIZE);
-HiiSetString (gFrontPagePrivate.HiiHandle, TokenToUpdate,
NewString, NULL);
-FreePool (NewString);
-Find[4] = TRUE;
+
: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Jeremy Linton (2):
IntelFrameworkModulePkg/Bds: Correct the total RAM calculation
MdeModulePkg/UiApp: Correct the total RAM calculation
.../Universal/BdsDxe/FrontPage.c
This change mirrors the change in InteFrameworkModulePkg.
We now account for all TYPE19 memory regions found in the
smbios data, as well as handling records with Extended Addresses.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Universal/BdsDxe/FrontPage.c | 44 +++---
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
b/IntelFrameworkModulePkg/Uni
On 04/20/2016 09:39 AM, G Gregory wrote:
On 20 April 2016 at 15:30, Sudeep Holla wrote:
XPress-RICH3 PCIe driver initializes the root complex with the source
and target address for IO window. The root complex resources in SSDT
should match these settings.
This patch
On 04/20/2016 10:54 AM, Sudeep Holla wrote:
On 20/04/16 16:44, Jeremy Linton wrote:
On 04/20/2016 10:35 AM, Sudeep Holla wrote:
[...]
Yes I got bitten by that and I failed to notice it :). I have fixed it
locally and tested correctly now.
DWordIo ( // IO window
On 04/20/2016 10:35 AM, Sudeep Holla wrote:
On 20/04/16 16:13, Jeremy Linton wrote:
On 04/20/2016 09:39 AM, G Gregory wrote:
On 20 April 2016 at 15:30, Sudeep Holla <sudeep.ho...@arm.com> wrote:
XPress-RICH3 PCIe driver initializes the root complex with the source
and target address
On 04/20/2016 11:00 AM, Sudeep Holla wrote:
On 20/04/16 16:54, Sudeep Holla wrote:
On 20/04/16 16:44, Jeremy Linton wrote:
On 04/20/2016 10:35 AM, Sudeep Holla wrote:
[...]
Yes I got bitten by that and I failed to notice it :). I have fixed it
locally and tested correctly now
t what the code is
doing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPk
The PCIe PIO translation is incorrect on the Juno, correct that.
While we are updating that module correct the comments to more
accurately reflect the code and what is actually happening.
Jeremy Linton (2):
ArmJuno: fix Juno PIO host bridge mapping
ArmJuno: Correct AXI->PCIe translat
On 07/14/2016 09:16 AM, Ard Biesheuvel wrote:
On 14 July 2016 at 15:58, Jeremy Linton <jeremy.lin...@arm.com> wrote:
The AXI<->PCIe translation comments are out of date with
respect to the code. In the first case the AXI master port
is incorrectly called a slave. In the
The Juno PIO mapping is 8M, so it should be using a 32-bit
PIO address translation. Further, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Re
On 07/28/2016 06:35 AM, Leif Lindholm wrote:
Thanks Jeremy, this looks good to me.
I have one comment on (EDK2) 2/3 and a minor one on (OpenPlatformPkg)
2/3. As I said in the comment, I would be happy to fix the EDK2 one on
commit if you're happy with the proposed change?
Sure, tweak away..
On 07/28/2016 06:23 AM, Leif Lindholm wrote:
On Wed, Jul 27, 2016 at 02:24:35PM -0500, Jeremy Linton wrote:
The code to detect what juno revision we are running on
is fairly small put it in a common header where it may be
used in a couple places.
Contributed-under: TianoCore Contribution
Add the A72 CPU type which is used in JunoR2.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPkg/Include/Chipset/AArch64.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/I
Now that the code to detect the Juno revision is in
the header go ahead and covert the ArmJunoDxe to use it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
Fill in the basic requirements of the SMBIOS specification by hardcoding
the minimum required structures and data using Juno information. Only the
juno revision, memory ranges and CPU types are dynamic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton
The code to detect what juno revision we are running on
is fairly small put it in a common header where it may be
used in a couple places.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
ArmPlatformPkg/ArmJunoPkg/I
hes apply against edk2, the last three against OpenPlatformPkg.
Jeremy Linton (3):
ArmPlatformPkg: Add A72 CPU type
Code to detect what juno revision we are running on.
Convert ArmJunoDxe to use common juno revision code
Jeremy Linton (3):
Platforms/ARM/Juno: Create SMBIOS/DMI data for J
Create the edk2 INF/metadata required to build the SmbiosPlatformDxe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++
1 file changed, 68 inse
The Juno PIO mapping is 8M, so it should be using 32-bit
PIO address translation. Futher, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c
The Juno PIO mapping is 8M, so it should be using 32-bit
PIO address translation. Futher, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../ArmJ
On 07/11/2016 11:39 AM, Ryan Harkin wrote:
On 11 July 2016 at 17:27, Leif Lindholm <leif.lindh...@linaro.org> wrote:
On Mon, Jul 11, 2016 at 11:17:09AM -0500, Jeremy Linton wrote:
The Juno PIO mapping is 8M, so it should be using 32-bit
PIO address translation. Futher,
"Futher&q
The Juno PIO mapping is 8M, so it should be using 32-bit
PIO address translation. Further, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
. It then forwards the FIS to
a new routine we will break out of the ATA pass-through
callback that manages the FIS submission to the adapter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3
-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c| 225 +
OpenPlatformPkg| 2 +-
2 files changed, 138 insertions(+), 89 deletions(-)
diff --git a/EmbeddedPkg/Drivers/SataSiI3
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
b/MdeModulePkg/B
to avoid build breaks now that the SiI has a dependency on the SCSI
libraries.
V1->V2:
Formatting corrections per Ard's comments and Daniil's
updated patch checker.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Jeremy
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure,
along with helpers and new entry points.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 93 +
Add some definitions to mask the sense key from sense data,
and check the validity of the returned sense data.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdePkg/Include/IndustryStandard/Scsi.h | 2 ++
1 file chan
Now that the SiI adapter supports ATAPI add the SCSI
pass- through protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
Platforms/ARM/Juno/ArmJuno.dsc | 3 +++
Platforms/ARM/Juno/ArmJuno.fdf | 2 ++
2 files chan
Add some definitions to mask the sense key from sense data,
and check the validity of the returned sense data.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdePkg/Include/IndustryStandard/Scsi.h | 2 ++
1 file chan
. It then forwards the FIS to
a new routine we will break out of the ATA pass-through
callback that manages the FIS submission to the adapter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3
-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c| 225 +
OpenPlatformPkg| 2 +-
2 files changed, 138 insertions(+), 89 deletions(-)
diff --git a/EmbeddedPkg/Drivers/SataSiI3
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure,
along with helpers and new entry points.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 93 +
Now that everything is in place, lets export the protocol,
build the module, and remove the ATAPI unsupported flags.
Now when we detect an ATAPI device on a port we flag it
as such.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
There can be either ATA or ATAPI devices connected to
each SATA port. We want to detect if the device is ATA
and create a SATA_DP path or a SCSI_DP for ATAPI devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../D
noCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Jeremy Linton (7):
EmbeddedPkg: SiI3132: Note that ARM is using this Dxe
MdePkg IndustryStandard/Scsi.h: Add sense code macro
EmbeddedPkg: SiI3132: Add ScsiProtocol callbacks
EmbeddedPkg: SiI3132: Add S
Now that the SiI adapter supports ATAPI add the SCSI
pass- through protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
Platforms/ARM/Juno/ArmJuno.dsc | 3 +++
Platforms/ARM/Juno/ArmJuno.fdf | 2 ++
2 files chan
Hi,
Please ignore this patch set, and rather look at the V3 version. I had a
stale set of patches in the directory I sent v2 from.
Sorry about the noise.
Thanks,
On 02/23/2017 04:03 PM, Jeremy Linton wrote:
The SiI isn't an AHCI compatible adapter so it implements the EFI ATA
pass
_INFO, "SiI3132ScsiPassRead() Key %X ASC(Q) %02X%02X\n",
+ EFI_SCSI_SK_VALUE (sense[2]), sense[12], sense[13]));
+}
Thanks
Feng
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Jeremy
Linton
Sent: Friday, Feb
On 11/15/2016 01:43 AM, Ard Biesheuvel wrote:
Hi Jeremy,
On 14 November 2016 at 21:09, Jeremy Linton <jeremy.lin...@arm.com> wrote:
The SiI isn't an AHCI compatible adapter so it implements the EFI ATA
pass-through protocol directly. This works for fixed hard drives, but
not ATAPI at
|-Original Message-
|From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
|Sent: Tuesday, November 15, 2016 8:58 AM
|To: Jeremy Linton
|Cc: edk2-devel-01; Steve Capper; Leif Lindholm; ryan.har...@linaro.org;
|linaro-uefi
|Subject: Re: [edk2] [PATCH 0/8] ATAPI support on SiI SATA adapter
-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c| 226 +
OpenPlatformPkg| 2 +-
2 files changed, 137 insertions(+), 91 deletions(-)
diff --git a/EmbeddedPkg/Drivers/SataSiI3
Now that everything is in place, lets export the protocol,
build the module, and remove the ATAPI unsupported flags.
Now when we detect an ATAPI device on a port we flag it
as such.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
Now that the SiI adapter supports ATAPI add the SCSI
pass-through protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
Platforms/ARM/Juno/ArmJuno.dsc | 3 +++
Platforms/ARM/Juno/ArmJuno.fdf | 2 ++
2 files chan
There can be either ATA or ATAPI devices connected to
each SATA port. We want to detect if the device is ATA
and create a SATA_DP path or a SCSI_DP for ATAPI devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../D
With the update to the DMA lib, and the FIS submission
cleanups the SiI driver now works fine with alignments
less than a full page. Large alignment requirements
cause problems with grub. Decrease it to a sane value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy
Add some definitions to mask the sense key from sense data,
and check the validity of the returned sense data.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdePkg/Include/IndustryStandard/Scsi.h | 2 ++
1 file chan
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure,
along with helpers and new entry points.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 89 +
. It then forwards the FIS to
a new routine we will break out of the ATA pass-through
callback that manages the FIS submission to the adapter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3
to avoid build breaks now that the SiI has a dependency on the SCSI
libraries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Jeremy Linton (7):
MdePkg IndustryStandard/Scsi.h: Add sense code macro
EmbeddedPkg: SiI3132: Add ScsiPr
On 11/14/2016 03:09 PM, Jeremy Linton wrote:
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure,
along with helpers and new entry points.
Of course, I noticed after posting that this patch is missing a prereq,
that should have been squashed into it.
(see below)
Contributed-under
Hi,
On 03/30/2017 05:45 AM, Ard Biesheuvel wrote:
In order to be able to switch to the generic PCI host bridge driver,
implement the glue library that exposes the PCIe parameters to the
common driver. Since the Juno performs some initialization of the
PCIe control registers as well, copy that
a similar set of patches against the juno, and everything
continues to work. The change also looks good.
So,
Reviewed-by: Jeremy Linton <jeremy.lin...@arm.com>
But I'm still concerned in general, since the HDLCD frame buffer is odd
in that its just system memory rather than being at
Hi,
On 09/09/2016 09:00 AM, Ard Biesheuvel wrote:
The new accelerated ARM and AARCH64 implementations take advantage of
features that are only available when the MMU and Dcache are on. So
restrict the use of this library to the DXE phase or later.
I don't think this is sufficient because DC
Hi,
On 02/24/2017 11:08 AM, Ard Biesheuvel wrote:
On 23 February 2017 at 22:33, Jeremy Linton <jeremy.lin...@arm.com> wrote:
Create a new module that adds the callbacks to support
the EFI SCSI pass-through protocol. These callbacks
wrap around the existing ATA pass-through cal
There can be either ATA or ATAPI devices connected to
each SATA port. We want to detect if the device is ATA
and create a SATA_DP path or a SCSI_DP for ATAPI devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../D
. It then forwards the FIS to
a new routine we will break out of the ATA pass-through
callback that manages the FIS submission to the adapter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3
Now that the SiI adapter supports ATAPI, add the SCSI
pass-through protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
Platforms/ARM/Juno/ArmJuno.dsc | 3 +++
Platforms/ARM/Juno/ArmJuno.fdf | 2 ++
2 files chan
-by: Jeremy Linton <jeremy.lin...@arm.com>
---
.../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c| 225 +
OpenPlatformPkg| 2 +-
2 files changed, 138 insertions(+), 89 deletions(-)
diff --git a/EmbeddedPkg/Drivers/SataSiI3
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure,
along with helpers and new entry points.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 103
Now that everything is in place, lets export the protocol,
build the module, and remove the ATAPI unsupported flags.
Now when we detect an ATAPI device on a port we flag it
as such.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
---
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
b/MdeModulePkg/B
rather than the one I was running
the patch checker against.
V1->V2:
Formatting corrections per Ard's comments and Daniil's
updated patch checker.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com>
Jeremy Linton (6):
Embed
Hi,
On 04/05/2017 03:34 PM, Ard Biesheuvel wrote:
On 5 April 2017 at 21:12, Jeremy Linton <jeremy.lin...@arm.com> wrote:
Hi,
On 09/09/2016 09:00 AM, Ard Biesheuvel wrote:
The new accelerated ARM and AARCH64 implementations take advantage of
features that are only available when t
On 09/18/2017 10:43 AM, Ard Biesheuvel wrote:
On 18 September 2017 at 06:52, Udit Kumar wrote:
Hi EDK-2 Experts,
I am looking to store NV variables on SD/NAND device.
While browsing, I came across some old post at link,
iginal Message-
From: Jeremy Linton [mailto:jeremy.lin...@arm.com]
Sent: Friday, October 27, 2017 11:16 PM
To: Ard Biesheuvel <ard.biesheu...@linaro.org>; Udit Kumar
<udit.ku...@nxp.com>
Cc: edk2-devel@lists.01.org; Andrew Fish <af...@apple.com>;
olivier.mar...@arm.com;
Hi,
On 10/27/2017 12:33 AM, Daniil Egranov wrote:
This set of patches fixes an issue with 64-bit DMA and implements
the missing exit boot event and driver stop functionality including
memory/protocols cleanup procedure.
Daniil Egranov (4):
Drivers/SataSiI3132Dxe: Fixed PCI IO read and write
On 09/20/2017 12:39 PM, Ard Biesheuvel wrote:
On 20 September 2017 at 10:34, Udit Kumar wrote:
When we want to have UEFI and OS accessing same media ,
Possibilities I see
1- Patch OS For status check of media (diversion from generic OS), Good case
will be modify low
Hi,
On 01/24/2018 11:56 PM, Huangming (Mark) wrote:
On 2018/1/24 5:29, Jeremy Linton wrote:
Hi,
On 01/18/2018 09:01 AM, Ming Huang wrote:
From: Jason Zhang <zhangjinso...@huawei.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <z
Hi,
On 02/01/2018 09:42 PM, Huangming (Mark) wrote:
On 2018/2/1 9:11, Jeremy Linton wrote:
Hi,
On 01/26/2018 02:00 AM, Ming Huang wrote:
Add Processor Properties Topology Table, PPTT include
(trimming)
+STATIC
+VOID
+InitCacheInfo (
+ VOID
+ )
+{
+ UINT8
MdePkg/MdePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ UefiDriverEntryPoint
+ UefiRuntimeServicesTableLib
+
+[Protocols]
+ gEfiAcpiSdtProtocolGuid ## PROTOCOL ALWAYS_CONSUMED
+ gEfiAcpiTableProtoc
Hi,
On 02/07/2018 09:50 AM, Haojian Zhuang wrote:
Hi all,
I have an issue on tty terminal. I setup PL011 serial console as the
tty terminal on HiKey platform. When it's built in debug mode, arrow
key works well. When it's built in release mode, arrow key can't work.
For example, DOWN key is
Hi,
On 02/02/2018 05:57 AM, Heyi Guo wrote:
1 Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214.
I've been trying to verify spectre fixes, and I don't get a smccc
version from this firmware (see this kernel branch
Hi,
On 03/08/2018 07:13 AM, Ard Biesheuvel wrote:
Add a ACPI Processor Properties Topology Table (PPTT) to the SynQuacer
builds. This information is used by the OS to tune the scheduler.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Hi,
On 03/08/2018 11:27 AM, Ard Biesheuvel wrote:
On 8 March 2018 at 17:24, Jeremy Linton <jeremy.lin...@arm.com> wrote:
Hi,
On 03/08/2018 07:13 AM, Ard Biesheuvel wrote:
Add a ACPI Processor Properties Topology Table (PPTT) to the SynQuacer
builds. This information is used by
1 - 100 of 102 matches
Mail list logo