[edk2] [PATCH] UefiCpuPkg/SecPeiDxeTimerLibUefiCpu: Add GetIntendFsbFrequency()

it by PcdFSBClock. Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Cc: Ruiyu Ni <ruiyu...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Library/SecPeiDxeTimerLibUef

[edk2] [PATCH v3 3/3] UefiCpuPkg/MpInitLib: Force to enable X2APIC if CPU number > 255

Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 +++- 1 file changed, 7 insertions(+), 1

[edk2] [PATCH v3 2/3] UefiCpuPkg/MpInitLib: Check APIC mode change around AP function

gt; Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg

[edk2] [PATCH v3 0/3] Enable X2APIC after MP service is ready

https://bugzilla.tianocore.org/show_bug.cgi?id=575 v2: Updated #1 comments v3: 1. Remove ASSERT() in #1 if X2APIC enable but user configuration is FALSE. 2. Add #3 to force X2APIC mode if CPU number > 255. Jeff Fan (3): UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC ena

[edk2] [PATCH v3 1/3] UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable

;= 255. Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 +

[edk2] [PATCH v2 2/2] UefiCpuPkg/MpInitLib: Check APIC mode change around AP function

gt; Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg

[edk2] [PATCH v2 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable

;= 255. Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 +

[edk2] [PATCH v2 0/2] Enable X2APIC after MP service is ready

https://bugzilla.tianocore.org/show_bug.cgi?id=575 v2: Updated #1 comments. Jeff Fan (2): UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable UefiCpuPkg/MpInitLib: Check APIC mode change around AP function .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15

[edk2] [PATCH 2/2] UefiCpuPkg/MpInitLib: Check APIC mode change around AP function

gt; Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg

[edk2] [PATCH 0/2] Enable X2APIC after MP service is ready

https://bugzilla.tianocore.org/show_bug.cgi?id=575 Jeff Fan (2): UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable UefiCpuPkg/MpInitLib: Check APIC mode change around AP function .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 + .../CpuCommonFeaturesLib

[edk2] [PATCH 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable

;= 255. Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 +

[edk2] [PATCH] UefiCpuPkg/DxeMpInitLib.inf: Add missing SynchronizationLib

Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Eric Dong <eric.d...@intel.com> Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Libra

[edk2] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix logic check error

Cc: Jiewen Yao <jiewen@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[edk2] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Check ProcessorId == INVALID_APIC_ID

eement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 3 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 7 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSm

[edk2] [PATCH 0/2] Fix SmmCpuFeaturesLib issues

Jeff Fan (2): UefiCpuPkg/SmmCpuFeaturesLib: Fix Ia32/SmiEntry.asm build issue UefiCpuPkg/SmmCpuFeaturesLib: Correct print level UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm| 6 +++--- .../Library/SmmCpuFeaturesLib/Ia32/SmiException.asm | 15 ++- UefiCpuPkg

[edk2] [PATCH 1/2] UefiCpuPkg/SmmCpuFeaturesLib: Fix Ia32/SmiEntry.asm build issue

Cc: Jiewen Yao <jiewen@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm| 6 +++--- .../Library/SmmC

[edk2] [PATCH 2/2] UefiCpuPkg/SmmCpuFeaturesLib: Correct print level

Cc: Jiewen Yao <jiewen@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 8 1 file changed, 4 insertions(+), 4

[edk2] [PATCH v2] UefiCpuPkg: Update package version to 0.80

Cc: Feng Tian <feng.t...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/UefiCpuPkg.dec | 2 +- UefiCpuPkg/UefiCpuPkg.dsc | 2 +- 2 files changed, 2 insertio

[edk2] [PATCH] UefiCpuPkg: Update package version to 0.80

Cc: Feng Tian <feng.t...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/UefiCpuPkg.dec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/UefiCpu

[edk2] [PATCH v2] UefiCpuPkg/MpLib.c: Set AP state after X2APIC mode enabled

Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 1 file changed, 8 insertions(+) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 03d6c2d..e502e36 100644 --- a/UefiCpuPkg

[edk2] [PATCH] UefiCpuPkg/MpLib.c: Set AP state after X2APIC mode enabled

Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 1 file changed, 8 insertions(+) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 03d6c2d..e502e36 100644 --- a/UefiCpuPkg

[edk2] [PATCH] PeCoffGetEntryPointLib: Fix spelling issue

*Serach* should be *Search* Cc: Liming Gao <liming@intel.com> Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> ---

[edk2] [PATCH] PeCoffGetEntryPointLib: Fix spelling issue

://bugzilla.tianocore.org/show_bug.cgi?id=503 Cc: Liming Gao <liming@intel.com> Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (1): PeC

[edk2] [PATCH 2/2] UefiCpuPkg/MpInitLib: needn't to allocate AP reset vector

ael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 22 +-- UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 6 +- UefiCpuPkg/Library/MpInitLib/Pei

[edk2] [PATCH 0/2] Borrow the space below 1MB for AP reset vector

/show_bug.cgi?id=500 Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (2): UefiCpuPkg/MpInitLib: save/restore original contents UefiCpuPkg/

[edk2] [PATCH 1/2] UefiCpuPkg/MpInitLib: save/restore original contents

ael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 16 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpL

[edk2] [PATCH] UefiCpuPkg: Move ProgramVirtualWireMode() to MpInitLib

Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuDxe/CpuDxe.c | 5 - UefiCpuPkg/Library/MpInitLib/MpLib.c | 4 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a

[edk2] [PATCH] MdeModulePkg/FirmwarePerformanceDxe: Error Level is not used correctly

Cc: Feng Tian <feng.t...@intel.com> Cc: Star Zeng <star.z...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.c | 4 ++-- 1 file changed,

[edk2] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Lock should be acquired

ent 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index a1d16b4..e03f1e0 100644 --- a/UefiCpuPkg/PiSmmCpu

[edk2] [PATCH 1/3] MdeModulePkg: Error Level is not used correctly

Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c | 10 +- .../Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntr

[edk2] [PATCH 0/3] Error Level is not used correctly

Some modules mis-used error level when outputting debug message. Jeff Fan (3): MdeModulePkg: Error Level is not used correctly SecurityPkg: Error Level is not used correctly UefiCpuPkg: Error Level is not used correctly .../Acpi/BootScriptExecutorDxe/ScriptExecute.c | 10

[edk2] [PATCH 2/3] SecurityPkg: Error Level is not used correctly

Cc: Jiewen Yao <jiewen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.c | 4 ++-- SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRou

[edk2] [PATCH 3/3] UefiCpuPkg: Error Level is not used correctly

Cc: Feng Tian <feng.t...@intel.com> Cc: Jiewen Yao <jiewen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 2 +- UefiCpuPkg/Universal/Acpi/S3Resume2P

[edk2] [PATCH v2 4/5] UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIs

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 18 + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 37 +++--- UefiCpuPkg/PiSmmCpuDxeSmm/P

[edk2] [PATCH v2 0/5] Export Dump CPU Context service

7, 8 to v2's patch 4. Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (5): MdePkg/PeC

[edk2] [PATCH v2 1/5] MdePkg/PeCoffGetEntryPointLib: Add PeCoffSerachImageBase()

d-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- MdePkg/Include/Library/PeCoffGetEntryPointLib.h| 20 +- .../PeCoffGetEntryPoint.c | 72 +- 2 files changed, 90 insertions(+), 2 deletions(-) dif

[edk2] [PATCH v2 2/5] MdeModulePkg/CpuExceptionHandlerLib: Add DumpCpuContext()

This API is used to display exception type and all processor context for debug purpose. Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-

[edk2] [PATCH v2 5/5] SourceLevelDebugPkg/DebugAgent.c: Consume PeCoffSerachImageBase()

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../DebugAgent/DebugAgentCommon

[edk2] [PATCH v2 3/5] UefiCpuPkg/CpuExceptionHandlerLib: Add DumpCpuContext() implementation

c: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuExceptionHandlerLib/CpuExceptionCommon.c| 82 ++ .../CpuExceptionHandlerLib/CpuExceptionCommon.h|

[edk2] [PATCH] UefiCpuPkg/CpuFeatures: Change CPU features name to follow IA32 SDM

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 4 ++-- 1 file changed, 2 insertio

[edk2] [PATCH] UefiCpuPkg/MpLib.c: Load microcode before mtrr sync per IA32 SDM

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=453 Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel

[edk2] [PATCH 6/9] UefiCpuPkg/CpuExceptionHandlerLib: Display PF Excption Data bit

Page-fault exception data bit displaying is very useful. Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan &

[edk2] [PATCH 8/9] UefiCpuPkg/PiSmmCpuDxeSmm: Consume DumpCpuContext()

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/I

[edk2] [PATCH 2/9] MdeModulePkg/CpuExceptionHandlerLib: Add DumpCpuContext()

This API is used to display exception type and all processor context for debug purpose. Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-

[edk2] [PATCH 4/9] UefiCpuPkg/CpuExceptionHandlerLib: Add DumpModuleImageInfo()

om> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuExceptionHandlerLib/CpuExceptionCommon.c| 75 ++ .../CpuExceptionHandlerLib/CpuExceptionCommon.h| 11 +--- .../Library/CpuExceptionHandler

[edk2] [PATCH 5/9] UefiCpuPkg/CpuExceptionHandlerLib: Add DumpCpuContext() implementation

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../CpuExceptionHandlerLib/CpuExceptionComm

[edk2] [PATCH 9/9] SourceLevelDebugPkg/DebugAgent.c: Consume PeCoffSerachImageBase()

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../DebugAgent/DebugAgentCommon

[edk2] [PATCH 7/9] UefiCpuPkg/PiSmmCpuDxeSmm: Consume PeCoffSerachImageBase()

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeS

[edk2] [PATCH 3/9] UefiCpuPkg/CpuExceptionHandlerLib: Rename internal DumpCpuContent()

Rename internal DumpCpuContent() to DumpImageAndCpuContent(). Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan &

[edk2] [PATCH 1/9] MdePkg/PeCoffGetEntryPointLib: Add PeCoffSerachImageBase()

d-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- MdePkg/Include/Library/PeCoffGetEntryPointLib.h| 20 +- .../PeCoffGetEntryPoint.c | 72 +- 2 files changed, 90 insertions(+), 2 deletions(-) dif

[edk2] [PATCH v2 0/3] UefiCpuPkg/PiSmmCpuDxeSmm: Check all SMM ranges found

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (3): UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables U

[edk2] [PATCH v2 3/3] UefiCpuPkg/PiSmmCpuDxeSmm: Update saved SMM ranges check in SmmProfile

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 42 +- 1 fil

[edk2] [PATCH v2 1/3] UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables

v2: Add #define SMRR_MAX_ADDRESS to clarify SMRR requirement. Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan &

[edk2] [PATCH 1/3] UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables

Cc: Jiewen Yao <jiewen@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeS

[edk2] [PATCH 3/3] UefiCpuPkg/PiSmmCpuDxeSmm: Update saved SMM ranges check in SmmProfile

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 42 +- 1 fil

[edk2] [PATCH 2/3] UefiCpuPkg/PiSmmCpuDxeSmm: Add IsInSmmRanges() to check SMM range

d-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 36 +- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiS

[edk2] [PATCH 0/3] UefiCpuPkg/PiSmmCpuDxeSmm: Check all SMM ranges found

Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (3): UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables UefiCpuPkg/PiSmmCpuDxeSmm: Add IsInSmmRanges() to check SMM range U

[edk2] [PATCH 2/3] UefiCpuPkg/PiSmmCpuDxeSmm: Add IsInSmmRanges() to check SMM range

d-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 36 +- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiS

[edk2] [PATCH 1/3] UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables

l.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 44 -- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 4

[edk2] [PATCH 3/3] UefiCpuPkg/PiSmmCpuDxeSmm: Update saved SMM ranges check in SmmProfile

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 42 +- 1 fil

[edk2] [PATCH 0/3] UefiCpuPkg/PiSmmCpuDxeSmm: Check all SMM ranges found

Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (3): UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables UefiCpuPkg/PiSmmCpuDxeSmm: Add IsInSmmRanges() to check SMM range U

[edk2] [PATCH v2] UefiCpuPkg/MpLib.c: Add checking CR0 PG bit

r: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 38 +++- 1 file changed, 24 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library

[edk2] [PATCH] UefiCpuPkg/MpLib.c: Add checking CR0 PG bit

0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 38 +++- 1 file changed, 24 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 55fe8

[edk2] [PATCH 1/5] UefiCpuPkg/RegisterCpuFeaturesLib: Fix the function header issues

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Include/Library/RegisterCpuFeaturesLib.h | 60 +++-- .../Regi

[edk2] [PATCH 0/5] [UefiCpuPkg/CpuFeatures] Fix some comments and meta data issues.

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Jeff Fan (5): UefiCpuPkg/RegisterCpuFeaturesLib: Fix the function header issues UefiCpuPkg/RegisterCpuFeaturesLib: Remove static type UefiCpuPkg/RegisterCpuFeaturesLib: Fix meta data comments

[edk2] [PATCH 2/5] UefiCpuPkg/RegisterCpuFeaturesLib: Remove static type

Using one specific name for global variable to save MP services protocol pointer. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com>

[edk2] [PATCH 3/5] UefiCpuPkg/RegisterCpuFeaturesLib: Fix meta data comments

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuFeatures/CpuFeaturesDxe.inf| 4 ++-- Uefi

[edk2] [PATCH 4/5] UefiCpuPkg/CpuCommonFeaturesLib: Generate new INF GUID value

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 2 +- 1 file changed,

[edk2] [PATCH 5/5] UefiCpuPkg: Add new PCDs PROMPT/HELP string in UNI file

Correct PCD declaration comments and add new PCDs in UNI file. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/U

[edk2] [PATCH] UefiCpuPkg/RegisterCpuFeaturesLib: Add ASSERT on allocated memory

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 6 ++ 1 file cha

[edk2] [PATCH 0/2] [UefiCpuPkg] Support 64bit MMIO address in CPU Register Table

The current CPU_REGISTER_TABLE_ENTRY structure only defined UINT32 Index to indicate MSR/MMIO address. It's ok for MSR because MSR address is UINT32 type actually. But for MMIO address, UINT32 limits MMIO address exceeds 4GB. https://bugzilla.tianocore.org/show_bug.cgi?id=347 Jeff Fan (2

[edk2] [PATCH 2/2] UefiCpuPkg/AcpiCpuData.h: Support >4GB MMIO address

intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Include/AcpiCpuData.h | 12 +++- .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 6 +++--- .../Library/Regi

[edk2] [PATCH 1/2] UefiCpuPkg/RegisterCpuFeaturesLib: Define Index to UINT64

feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 4 ++-- .../Library/R

[edk2] [PATCH] UefiCpuPkg/RegisterCpuFeaturesLib: Set CpuFeatureEntry initial value

: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/UefiCpuPkg/Li

[edk2] [PATCH] UefiCpuPkg/CpuCommonFeaturesLib: Fix case write issue

Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h | 2 +- 1 file changed,

[edk2] [PATCH v5 00/11] Add CPU features driver

AesniGetConfigData() to AesniSupport(). Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (11): UefiCpuPkg/AcpiCpuData: Update RegisterTableEntry

[edk2] [PATCH v5 03/11] UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0

intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 30 +- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Cpu

[edk2] [PATCH v5 10/11] UefiCpuPkg: Add NULL CPU Common Features Library instance

AesniGetConfigData() to AesniSupport(). Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c| 1

[edk2] [PATCH v4 03/11] UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0

Needn't to copy register table if AllocatedSize is 0. v4: Fix potential uninitialized variable issue. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jef

[edk2] [PATCH v4 00/11] Add CPU features driver

off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (11): UefiCpuPkg/AcpiCpuData: Update RegisterTableEntry type UefiCpuPkg/CpuS3DataDxe: Consume the existing PcdCpuS3DataAddress UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0 UefiCpuPkg/Msr: Add CPUID signature check M

[edk2] [PATCH v4 08/11] UefiCpuPkg/Include/Library: Add Register CPU Features Library

: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Include/Library/RegisterCpuFeaturesLib.h | 516 + UefiCpu

[edk2] [PATCH v4 09/11] UefiCpuPkg: Add PEI/DXE Register CPU Features Library instances

unused local variable. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../RegisterCpuFeaturesLib/CpuFeatures

[edk2] [PATCH v3 09/11] UefiCpuPkg: Add PEI/DXE Register CPU Features Library instances

<feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 747 .../DxeRegist

[edk2] [PATCH v3 10/11] UefiCpuPkg: Add NULL CPU Common Features Library instance

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c| 124 +++ UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c |

[edk2] [PATCH v3 00/11] Add CPU features driver

: Trim white space at end of line. #10: Add AesniGetConfigData() to get current register state. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com

[edk2] [PATCH v2 09/11] UefiCpuPkg: Add PEI/DXE Register CPU Features Library instances

Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 747 .../DxeRegisterCpuFeaturesLib.c

[edk2] [PATCH v2 10/11] UefiCpuPkg: Add NULL CPU Common Features Library instance

ibuted-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c| 94 +++ UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 79 ++ .../Library/CpuCommonFeaturesLib/ClockModulation.c | 106 +++ .../Cp

[edk2] [PATCH v2 00/11] Add CPU features driver

Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> Jeff Fan (11): UefiCpuPkg/AcpiCpuData: Update RegisterTableEntry type UefiCpuPkg/CpuS3DataDxe: Co

[edk2] [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check

lt;jiewen@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/UefiCpuPkg

[edk2] [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check

lt;jiewen@citrix.com> Cc: Feng Tian <feng.t...@citrix.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/UefiCpuP

[edk2] [PATCH 02/11] UefiCpuPkg/CpuS3DataDxe: Consume the existing PcdCpuS3DataAddress

intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 54 ++--- 1 file changed, 33 insertions(+), 21 deletions(-) diff --git a/UefiCpuPkg/CpuS3Data

[edk2] [PATCH 04/11] UefiCpuPkg/Msr: Add CPUID signature check MACROs

Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Include/Register/Msr/AtomMsr.h| 22 +- UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h | 21 -

[edk2] [PATCH 03/11] UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0

Needn't to copy register table if AllocatedSize is 0. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/PiSmmCpuD

[edk2] [PATCH 10/11] UefiCpuPkg: Add NULL CPU Common Features Library instance

by NULL CPU Common Features Library instance. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Library/CpuCommonFeaturesLi

[edk2] [PATCH 07/11] UefiCpuPkg: Add GUID gEdkiiCpuFeaturesInitDoneGuid

initialized. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/Include/Guid/CpuFeaturesInitDone.h | 26

[edk2] [PATCH 11/11] UefiCpuPkg: Add CPU Features PEI/DXE drivers

and PcdCpuFeaturesInitOnS3Resume that consumed by CpuFeaturesPei and CpuFeaturesDxe. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuFeature

[edk2] [PATCH 08/11] UefiCpuPkg/Include/Library: Add Register CPU Features Library

com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../Include/Library/RegisterCpuFeaturesLib.h | 516 + UefiCpuPkg/UefiCpuPkg.dec

[edk2] [PATCH 09/11] UefiCpuPkg: Add PEI/DXE Register CPU Features Library instances

intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 700 +++ .../DxeRegisterCpuFeaturesLib.c| 266 +++ .../DxeRegister

[edk2] [PATCH 06/11] UefiCpuPkg: Add GUID gEdkiiCpuFeaturesSetDoneGuid

gEdkiiCpuFeaturesSetDoneGuid Protocol will be installed after platform set CPU feature setting. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiC

[edk2] [PATCH 01/11] UefiCpuPkg/AcpiCpuData: Update RegisterTableEntry type

to EFI_PHYSICAL_ADDRESS and make RegisterTableEntry is fixed length. Cc: Feng Tian <feng.t...@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff@intel.com> --- UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 6

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