Re: [edk2] [PATCH v4 1/6] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask

2017-02-27 Thread Zeng, Star 
Reviewed-by: Star Zeng <star.z...@intel.com> to MdeModulePkg changes.

Thanks,
Star
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Duran, 
Leo
Sent: Monday, February 27, 2017 10:13 PM
To: Zeng, Star <star.z...@intel.com>; edk2-de...@ml01.01.org
Cc: Singh, Brijesh <brijesh.si...@amd.com>; Tian, Feng <feng.t...@intel.com>; 
Laszlo Ersek <ler...@redhat.com>
Subject: Re: [edk2] [PATCH v4 1/6] MdeModulePkg: Add PCD 
PcdPteMemoryEncryptionAddressOrMask

Please see below.

> -Original Message-
> From: Zeng, Star [mailto:star.z...@intel.com]
> Sent: Sunday, February 26, 2017 8:20 PM
> To: Duran, Leo <leo.du...@amd.com>; edk2-de...@ml01.01.org
> Cc: Tian, Feng <feng.t...@intel.com>; Laszlo Ersek 
> <ler...@redhat.com>; Singh, Brijesh <brijesh.si...@amd.com>; Zeng, 
> Star <star.z...@intel.com>
> Subject: RE: [PATCH v4 1/6] MdeModulePkg: Add PCD 
> PcdPteMemoryEncryptionAddressOrMask
> 
> We saw you defined 4K/2M/1G in previous patch series, #define
> PAGING_4K_ADDRESS_MASK_64 0x000FF000ull #define
> PAGING_2M_ADDRESS_MASK_64 0x000FFFE0ull #define
> PAGING_1G_ADDRESS_MASK_64 0x000FC000ull But only 1G mask is 
> defined and used in this patch series, is that on purpose?
> #define PAGING_1G_ADDRESS_MASK_64 0x000FC000ull
> 
> That means PcdPteMemoryEncryptionAddressOrMask will be just valid as 
> 1G aligned, right?
> 
> Thanks,
> Star
[Duran, Leo] Correct... The mask *must* allow for 1G pages, so I've simplified 
the logic.

> -Original Message-
> From: Leo Duran [mailto:leo.du...@amd.com]
> Sent: Monday, February 27, 2017 1:43 AM
> To: edk2-de...@ml01.01.org
> Cc: Leo Duran <leo.du...@amd.com>; Tian, Feng <feng.t...@intel.com>; 
> Zeng, Star <star.z...@intel.com>; Laszlo Ersek <ler...@redhat.com>; 
> Brijesh Singh <brijesh.si...@amd.com>
> Subject: [PATCH v4 1/6] MdeModulePkg: Add PCD 
> PcdPteMemoryEncryptionAddressOrMask
> 
> This PCD holds the address mask for page table entries when memory 
> encryption is enabled on AMD processors supporting the Secure 
> Encrypted Virtualization (SEV) feature.
> 
> Cc: Feng Tian <feng.t...@intel.com>
> Cc: Star Zeng <star.z...@intel.com>
> Cc: Laszlo Ersek <ler...@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Brijesh Singh <brijesh.si...@amd.com>
> Signed-off-by: Leo Duran <leo.du...@amd.com>
> Reviewed-by: Star Zeng <star.z...@intel.com>
> ---
>  MdeModulePkg/MdeModulePkg.dec | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MdeModulePkg/MdeModulePkg.dec 
> b/MdeModulePkg/MdeModulePkg.dec index 426634f..f45ca84 100644
> --- a/MdeModulePkg/MdeModulePkg.dec
> +++ b/MdeModulePkg/MdeModulePkg.dec
> @@ -6,6 +6,8 @@
>  # Copyright (c) 2007 - 2017, Intel Corporation. All rights 
> reserved.  # Copyright (c) 2016, Linaro Ltd. All rights 
> reserved.  # (C) Copyright 2016 Hewlett Packard Enterprise 
> Development LP
> +# Copyright (c) 2017, AMD Incorporated. All rights reserved. #
>  # This program and the accompanying materials are licensed and made 
> available under  # the terms and conditions of the BSD License that 
> accompanies this distribution.
>  # The full text of the license may be found at @@ -1702,6 +1704,12 @@
># @Prompt A list of system FMP ImageTypeId GUIDs
> 
> gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGu
> id|{0x0}|VOID*|0x30001046
> 
> +  ## This PCD holds the address mask for page table entries when 
> + memory encryption is  #  enabled on AMD processors supporting the 
> + Secure
> Encrypted Virtualization (SEV) feature.
> +  #  This mask should be applied when creating 1:1 virtual to 
> + physical
> mapping tables.
> +  #
> +
> +
> gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM
> ask|0x0
> + |UINT64|0x30001047
> +
>  [PcdsPatchableInModule]
>## Specify memory size with page number for PEI code when
>#  Loading Module at Fixed Address feature is enabled.
> --
> 2.7.4

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Re: [edk2] [PATCH v4 1/6] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask

2017-02-27 Thread Duran, Leo 
Please see below.

> -Original Message-
> From: Zeng, Star [mailto:star.z...@intel.com]
> Sent: Sunday, February 26, 2017 8:20 PM
> To: Duran, Leo ; edk2-de...@ml01.01.org
> Cc: Tian, Feng ; Laszlo Ersek ;
> Singh, Brijesh ; Zeng, Star 
> Subject: RE: [PATCH v4 1/6] MdeModulePkg: Add PCD
> PcdPteMemoryEncryptionAddressOrMask
> 
> We saw you defined 4K/2M/1G in previous patch series, #define
> PAGING_4K_ADDRESS_MASK_64 0x000FF000ull #define
> PAGING_2M_ADDRESS_MASK_64 0x000FFFE0ull #define
> PAGING_1G_ADDRESS_MASK_64 0x000FC000ull But only 1G mask
> is defined and used in this patch series, is that on purpose?
> #define PAGING_1G_ADDRESS_MASK_64 0x000FC000ull
> 
> That means PcdPteMemoryEncryptionAddressOrMask will be just valid as 1G
> aligned, right?
> 
> Thanks,
> Star
[Duran, Leo] Correct... The mask *must* allow for 1G pages, so I've simplified 
the logic.

> -Original Message-
> From: Leo Duran [mailto:leo.du...@amd.com]
> Sent: Monday, February 27, 2017 1:43 AM
> To: edk2-de...@ml01.01.org
> Cc: Leo Duran ; Tian, Feng ;
> Zeng, Star ; Laszlo Ersek ;
> Brijesh Singh 
> Subject: [PATCH v4 1/6] MdeModulePkg: Add PCD
> PcdPteMemoryEncryptionAddressOrMask
> 
> This PCD holds the address mask for page table entries when memory
> encryption is enabled on AMD processors supporting the Secure Encrypted
> Virtualization (SEV) feature.
> 
> Cc: Feng Tian 
> Cc: Star Zeng 
> Cc: Laszlo Ersek 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Brijesh Singh 
> Signed-off-by: Leo Duran 
> Reviewed-by: Star Zeng 
> ---
>  MdeModulePkg/MdeModulePkg.dec | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MdeModulePkg/MdeModulePkg.dec
> b/MdeModulePkg/MdeModulePkg.dec index 426634f..f45ca84 100644
> --- a/MdeModulePkg/MdeModulePkg.dec
> +++ b/MdeModulePkg/MdeModulePkg.dec
> @@ -6,6 +6,8 @@
>  # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.  #
> Copyright (c) 2016, Linaro Ltd. All rights reserved.  # (C) Copyright 2016
> Hewlett Packard Enterprise Development LP
> +# Copyright (c) 2017, AMD Incorporated. All rights reserved. #
>  # This program and the accompanying materials are licensed and made
> available under  # the terms and conditions of the BSD License that
> accompanies this distribution.
>  # The full text of the license may be found at @@ -1702,6 +1704,12 @@
># @Prompt A list of system FMP ImageTypeId GUIDs
> 
> gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGu
> id|{0x0}|VOID*|0x30001046
> 
> +  ## This PCD holds the address mask for page table entries when memory
> + encryption is  #  enabled on AMD processors supporting the Secure
> Encrypted Virtualization (SEV) feature.
> +  #  This mask should be applied when creating 1:1 virtual to physical
> mapping tables.
> +  #
> +
> +
> gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM
> ask|0x0
> + |UINT64|0x30001047
> +
>  [PcdsPatchableInModule]
>## Specify memory size with page number for PEI code when
>#  Loading Module at Fixed Address feature is enabled.
> --
> 2.7.4

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Re: [edk2] [PATCH v4 1/6] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask

2017-02-26 Thread Zeng, Star 
We saw you defined 4K/2M/1G in previous patch series,
#define PAGING_4K_ADDRESS_MASK_64 0x000FF000ull
#define PAGING_2M_ADDRESS_MASK_64 0x000FFFE0ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FC000ull
But only 1G mask is defined and used in this patch series, is that on purpose?
#define PAGING_1G_ADDRESS_MASK_64 0x000FC000ull

That means PcdPteMemoryEncryptionAddressOrMask will be just valid as 1G 
aligned, right?

Thanks,
Star
-Original Message-
From: Leo Duran [mailto:leo.du...@amd.com] 
Sent: Monday, February 27, 2017 1:43 AM
To: edk2-de...@ml01.01.org
Cc: Leo Duran ; Tian, Feng ; Zeng, Star 
; Laszlo Ersek ; Brijesh Singh 

Subject: [PATCH v4 1/6] MdeModulePkg: Add PCD 
PcdPteMemoryEncryptionAddressOrMask

This PCD holds the address mask for page table entries when memory encryption 
is enabled on AMD processors supporting the Secure Encrypted Virtualization 
(SEV) feature.

Cc: Feng Tian 
Cc: Star Zeng 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh 
Signed-off-by: Leo Duran 
Reviewed-by: Star Zeng 
---
 MdeModulePkg/MdeModulePkg.dec | 8 
 1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec 
index 426634f..f45ca84 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -6,6 +6,8 @@
 # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.  # 
Copyright (c) 2016, Linaro Ltd. All rights reserved.  # (C) Copyright 2016 
Hewlett Packard Enterprise Development LP
+# Copyright (c) 2017, AMD Incorporated. All rights reserved. #
 # This program and the accompanying materials are licensed and made available 
under  # the terms and conditions of the BSD License that accompanies this 
distribution.
 # The full text of the license may be found at @@ -1702,6 +1704,12 @@
   # @Prompt A list of system FMP ImageTypeId GUIDs
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x0}|VOID*|0x30001046
 
+  ## This PCD holds the address mask for page table entries when memory 
+ encryption is  #  enabled on AMD processors supporting the Secure Encrypted 
Virtualization (SEV) feature.
+  #  This mask should be applied when creating 1:1 virtual to physical mapping 
tables.
+  #
+  
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
+ |UINT64|0x30001047
+
 [PcdsPatchableInModule]
   ## Specify memory size with page number for PEI code when
   #  Loading Module at Fixed Address feature is enabled.
--
2.7.4

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[edk2] [PATCH v4 1/6] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask

2017-02-26 Thread Leo Duran 
This PCD holds the address mask for page table entries when memory
encryption is enabled on AMD processors supporting the Secure Encrypted
Virtualization (SEV) feature.

Cc: Feng Tian 
Cc: Star Zeng 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh 
Signed-off-by: Leo Duran 
Reviewed-by: Star Zeng 
---
 MdeModulePkg/MdeModulePkg.dec | 8 
 1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 426634f..f45ca84 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -6,6 +6,8 @@
 # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
 # Copyright (c) 2016, Linaro Ltd. All rights reserved.
 # (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
+#
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License that accompanies this 
distribution.
 # The full text of the license may be found at
@@ -1702,6 +1704,12 @@
   # @Prompt A list of system FMP ImageTypeId GUIDs
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x0}|VOID*|0x30001046
 
+  ## This PCD holds the address mask for page table entries when memory 
encryption is
+  #  enabled on AMD processors supporting the Secure Encrypted Virtualization 
(SEV) feature.
+  #  This mask should be applied when creating 1:1 virtual to physical mapping 
tables.
+  #
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0|UINT64|0x30001047
+
 [PcdsPatchableInModule]
   ## Specify memory size with page number for PEI code when
   #  Loading Module at Fixed Address feature is enabled.
-- 
2.7.4

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