Re: [edk2] [Patch 5/5] Vlv2TbltDevicePkg: Sync FLASH libraries from UDK2017 branch
Reviewed-by: Guo Mang-Original Message- From: Kinney, Michael D Sent: Wednesday, March 28, 2018 1:34 PM To: edk2-devel@lists.01.org Cc: Wei, David; Guo, Mang; Yao, Jiewen; Kinney, Michael D Subject: [Patch 5/5] Vlv2TbltDevicePkg: Sync FLASH libraries from UDK2017 branch https://bugzilla.tianocore.org/show_bug.cgi?id=911 Update Minnow Max FLASH libraries to match libraries in the UDK2017 development branch in edk2-platforms. https://github.com/tianocore/edk2-platforms/tree/devel-MinnowBoardMax-UDK2017 Cc: David Wei Cc: Mang Guo Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney --- .../PlatformFlashAccessLib.c | 491 - .../PlatformFlashAccessLib.inf | 19 +- .../Library/FlashDeviceLib/FlashDeviceLib.c| 158 ++- .../Library/FlashDeviceLib/FlashDeviceLib.inf | 6 +- .../Library/FlashDeviceLib/SpiChipDefinitions.h| 1 + 5 files changed, 639 insertions(+), 36 deletions(-) diff --git a/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c b/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c index f3cb31daaa..9162e025ed 100644 --- a/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c +++ b/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/P +++ latformFlashAccessLib.c @@ -1,7 +1,7 @@ /** @file Platform Flash Access library. - Copyright (c) 2016, Intel Corporation. All rights reserved. + Copyright (c) 2017, Intel Corporation. All rights reserved. This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -11,6 +11,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. **/ +#include #include @@ -19,14 +20,366 @@ #include #include #include -#include +//#include #include +#include +#include #include "PchAccess.h" +#include +#include +#include +#include -#define SECTOR_SIZE_64KB 0x1 // Common 64kBytes sector size -#define ALINGED_SIZE SECTOR_SIZE_64KB +//#define SECTOR_SIZE_64KB 0x1 // Common 64kBytes sector size +//#define ALINGED_SIZE SECTOR_SIZE_64KB + +#define BLOCK_SIZE 0x1000 +#define ALINGED_SIZE BLOCK_SIZE + +#define R_PCH_LPC_BIOS_CNTL 0xDC +#define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20///< SMM BIOS write protect disable + +// +// Prefix Opcode Index on the host SPI controller // typedef enum { + SPI_WREN, // Prefix Opcode 0: Write Enable + SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register +} PREFIX_OPCODE_INDEX; +// +// Opcode Menu Index on the host SPI controller // typedef enum { + SPI_READ_ID,// Opcode 0: READ ID, Read cycle with address + SPI_READ, // Opcode 1: READ, Read cycle with address + SPI_RDSR, // Opcode 2: Read Status Register, No address + SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address + SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address + SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address + SPI_PROG, // Opcode 6: Byte Program, Write cycle with address + SPI_WRSR, // Opcode 7: Write Status Register, No address +} SPI_OPCODE_INDEX; STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress; +EFI_SPI_PROTOCOL *mSpiProtocol; + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On output, the number +of bytes actually read. + @param[out] BufferThe destination data buffer for the read. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32*NumBytes, + OUT UINT8 *Buffer + ) +{ + EFI_STATUSStatus = EFI_SUCCESS; + UINTN Offset = 0; + + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); + + + //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) { +Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase); + +Status = mSpiProtocol->Execute ( + mSpiProtocol, + 1, //SPI_READ, + 0, //SPI_WREN, + TRUE, + TRUE, +
[edk2] [Patch 5/5] Vlv2TbltDevicePkg: Sync FLASH libraries from UDK2017 branch
https://bugzilla.tianocore.org/show_bug.cgi?id=911 Update Minnow Max FLASH libraries to match libraries in the UDK2017 development branch in edk2-platforms. https://github.com/tianocore/edk2-platforms/tree/devel-MinnowBoardMax-UDK2017 Cc: David WeiCc: Mang Guo Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney --- .../PlatformFlashAccessLib.c | 491 - .../PlatformFlashAccessLib.inf | 19 +- .../Library/FlashDeviceLib/FlashDeviceLib.c| 158 ++- .../Library/FlashDeviceLib/FlashDeviceLib.inf | 6 +- .../Library/FlashDeviceLib/SpiChipDefinitions.h| 1 + 5 files changed, 639 insertions(+), 36 deletions(-) diff --git a/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c b/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c index f3cb31daaa..9162e025ed 100644 --- a/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c +++ b/Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c @@ -1,7 +1,7 @@ /** @file Platform Flash Access library. - Copyright (c) 2016, Intel Corporation. All rights reserved. + Copyright (c) 2017, Intel Corporation. All rights reserved. This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -11,6 +11,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. **/ +#include #include @@ -19,14 +20,366 @@ #include #include #include -#include +//#include #include +#include +#include +#include "PchAccess.h" +#include +#include +#include +#include -#define SECTOR_SIZE_64KB 0x1 // Common 64kBytes sector size -#define ALINGED_SIZE SECTOR_SIZE_64KB +//#define SECTOR_SIZE_64KB 0x1 // Common 64kBytes sector size +//#define ALINGED_SIZE SECTOR_SIZE_64KB + +#define BLOCK_SIZE 0x1000 +#define ALINGED_SIZE BLOCK_SIZE + +#define R_PCH_LPC_BIOS_CNTL 0xDC +#define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20///< SMM BIOS write protect disable + +// +// Prefix Opcode Index on the host SPI controller +// +typedef enum { + SPI_WREN, // Prefix Opcode 0: Write Enable + SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register +} PREFIX_OPCODE_INDEX; +// +// Opcode Menu Index on the host SPI controller +// +typedef enum { + SPI_READ_ID,// Opcode 0: READ ID, Read cycle with address + SPI_READ, // Opcode 1: READ, Read cycle with address + SPI_RDSR, // Opcode 2: Read Status Register, No address + SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address + SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address + SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address + SPI_PROG, // Opcode 6: Byte Program, Write cycle with address + SPI_WRSR, // Opcode 7: Write Status Register, No address +} SPI_OPCODE_INDEX; STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress; +EFI_SPI_PROTOCOL *mSpiProtocol; + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On output, the number +of bytes actually read. + @param[out] BufferThe destination data buffer for the read. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32*NumBytes, + OUT UINT8 *Buffer + ) +{ + EFI_STATUSStatus = EFI_SUCCESS; + UINTN Offset = 0; + + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); + + + //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) { +Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase); + +Status = mSpiProtocol->Execute ( + mSpiProtocol, + 1, //SPI_READ, + 0, //SPI_WREN, + TRUE, + TRUE, + FALSE, + Offset, + BLOCK_SIZE, + Buffer, + EnumSpiRegionAll + ); +return Status; +} + +/** + Write NumBytes bytes of data from Buffer