al; Marcin Wojtas
> > Subject: Re: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit
> > IO widths
> >
> > On Fri, 1 Feb 2019 at 06:55, Wu, Hao A wrote:
> > >
> > > > -Original Message-
> > > > From: edk2-devel [mailto:edk2-devel-bou
9 7:59 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: Edgar Handal; Jeff Brasen
> > > Subject: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit
> IO
> > > widths
> > >
> > > From: Edgar Handal
> > >
> > > U
[mailto:jbra...@nvidia.com]
Sent: Saturday, February 02, 2019 1:53 AM
To: Wu, Hao A; edk2-devel@lists.01.org
Cc: Edgar Handal
Subject: Re: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO widths
From: Wu, Hao A
Sent: Friday, February 1, 2019 12:54 AM
: Edgar Handal; Jeff Brasen
> > Subject: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO
> > widths
> >
> > From: Edgar Handal
> >
> > Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register
> > accesses from being split up int
From: Wu, Hao A
Sent: Friday, February 1, 2019 12:54 AM
To: Jeff Brasen; edk2-devel@lists.01.org
Cc: Edgar Handal
Subject: RE: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO widths
> -Original Message-
> From: Jeff Brasen [mailt
> -Original Message-
> From: Jeff Brasen [mailto:jbra...@nvidia.com]
> Sent: Friday, February 01, 2019 3:12 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Edgar Handal
> Subject: RE: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO
> widths
>
>
-Original Message-
From: Wu, Hao A
Sent: Thursday, January 31, 2019 10:56 PM
To: Jeff Brasen ; edk2-devel@lists.01.org
Cc: Edgar Handal
Subject: RE: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO widths
> -Original Message-
> From: edk2-devel [mailto:edk2
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Jeff
> Brasen
> Sent: Thursday, January 31, 2019 7:59 AM
> To: edk2-devel@lists.01.org
> Cc: Edgar Handal; Jeff Brasen
> Subject: [edk2] [PATCH] MdeModulePkg/SdMmcPciHc
From: Edgar Handal
Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register
accesses from being split up into 8-bit accesses.
The SDHCI specification states that the registers shall be accessable in
byte, word, and double word accesses.
Contributed-under: TianoCore Contribution
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