To deal gracefully with the absence of the PL180 hardware on
the Foundation model, check the PrimeCell ID before proceeding
with the installation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 13 +++++++++++++
ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h | 17 +++++++++++++++++
2 files changed, 30 insertions(+)
diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
index 411a61ed040f..84096c557c76 100644
--- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
+++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
@@ -521,6 +521,19 @@ PL180MciDxeInitialize (
EFI_STATUS Status;
EFI_HANDLE Handle;
+ // Check if this is a PL180
+ if (MmioRead8 (MCI_PERIPH_ID_REG0) != MCI_PERIPH_ID0 ||
+ MmioRead8 (MCI_PERIPH_ID_REG1) != MCI_PERIPH_ID1 ||
+ MmioRead8 (MCI_PERIPH_ID_REG2) != MCI_PERIPH_ID2 ||
+ MmioRead8 (MCI_PERIPH_ID_REG3) != MCI_PERIPH_ID3 ||
+ MmioRead8 (MCI_PCELL_ID_REG0) != MCI_PCELL_ID0 ||
+ MmioRead8 (MCI_PCELL_ID_REG1) != MCI_PCELL_ID1 ||
+ MmioRead8 (MCI_PCELL_ID_REG2) != MCI_PCELL_ID2 ||
+ MmioRead8 (MCI_PCELL_ID_REG3) != MCI_PCELL_ID3) {
+
+ return EFI_NOT_FOUND;
+ }
+
Handle = NULL;
MCI_TRACE ("PL180MciDxeInitialize()");
diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h
b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h
index 6dc155ee9a61..ce38a9e70619 100644
--- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h
+++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h
@@ -51,6 +51,23 @@
#define MCI_SELECT_REG (MCI_SYSCTL + 0x044)
#define MCI_FIFOCOUNT_REG (MCI_SYSCTL + 0x048)
#define MCI_FIFO_REG (MCI_SYSCTL + 0x080)
+#define MCI_PERIPH_ID_REG0 (MCI_SYSCTL + 0xFE0)
+#define MCI_PERIPH_ID_REG1 (MCI_SYSCTL + 0xFE4)
+#define MCI_PERIPH_ID_REG2 (MCI_SYSCTL + 0xFE8)
+#define MCI_PERIPH_ID_REG3 (MCI_SYSCTL + 0xFEC)
+#define MCI_PCELL_ID_REG0 (MCI_SYSCTL + 0xFF0)
+#define MCI_PCELL_ID_REG1 (MCI_SYSCTL + 0xFF4)
+#define MCI_PCELL_ID_REG2 (MCI_SYSCTL + 0xFF8)
+#define MCI_PCELL_ID_REG3 (MCI_SYSCTL + 0xFFC)
+
+#define MCI_PERIPH_ID0 0x80
+#define MCI_PERIPH_ID1 0x11
+#define MCI_PERIPH_ID2 0x04
+#define MCI_PERIPH_ID3 0x00
+#define MCI_PCELL_ID0 0x0D
+#define MCI_PCELL_ID1 0xF0
+#define MCI_PCELL_ID2 0x05
+#define MCI_PCELL_ID3 0xB1
#define MCI_POWER_OFF 0
#define MCI_POWER_UP BIT1
--
1.9.1
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